JP2872290B2 - Semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for improving a soldering state of a semiconductor device, particularly, a semiconductor device having a surface-mount type package. The present invention relates to a device which is effective when used for a low thermal resistance type semiconductor device.

[Conventional technology]

As a low thermal resistance type semiconductor device having a surface mount type package, for example, as described in JP-A-61-152051, a plurality of radiating fins are integrally formed on one tab, A semiconductor device in which a part of the heat radiation fin is disposed outside the resin-sealed package, wherein the protrusion of the heat radiation fin is formed to be wide and bent in a gull wing shape. is there.

[Problems to be solved by the invention]

However, in such a low thermal resistance type semiconductor device, no consideration is given to the soldering state between the heat radiation fins and the mounting board, so that the semiconductor chip is sandwiched between the heat radiation fins and the land of the mounting board during the soldering operation. The present inventors have clarified that there is a problem that the gas of the volatile component contained in the cream solder material causes voids of the gas pool to be generated in the soldered portion by the wide radiating fins.

An object of the present invention is to provide a semiconductor device capable of preventing a void from being generated in a soldered portion of a radiation fin during surface mounting.

The above and other objects and novel features of the present invention are as follows.
It will be apparent from the description of this specification and the accompanying drawings.

[Means for solving the problem]

The outline of a representative invention among the inventions disclosed in the present application will be described as follows.

That is, a radiation fin is connected to the tab to which the semiconductor chip is adhered, and a part of the radiation fin projects out of the package from one side of the package, and one side of the package is sandwiched by the projected radiation fin. A plurality of outer leads projecting out of the package from the semiconductor device, wherein the radiation fins projecting outside the package are formed wider than the width of the outer leads, extend in a direction parallel to the package upper surface, and It is formed in a gull wing shape bent in the direction of the package lower surface and further bent in a direction parallel to the package lower surface, and is cut radially inward from an outer edge of a portion extending in a direction parallel to the package lower surface of the gull wing shape. A gas vent space consisting of a plurality of cutouts is opened, and the top surface of the package is opened. The portion that is bent in the direction of the portion and the package lower surface extending in a direction parallel, characterized in that not provided the degassing space.

[Action]

According to the above-described means, even if the gull-wing-shaped flat portion of the heat radiation fin is formed wide, the gas vent space is opened, so that when the heat radiation fin is soldered, the heat radiation fin is flattened. The gas emanating from the subordinates will be released very effectively from the vent space. Therefore, generation of voids in the soldered portion due to the gas is prevented.

In addition, since the gas vent space is formed only in the flat part of the fin wing shape of the radiating fin, the heat conduction area at the rising part of the gull wing shape is not reduced. The heat dissipation effect is not reduced regardless of the presence of the gas vent space.

〔Example〕

FIG. 1 is a perspective view showing a mounted state of a low thermal resistance type semiconductor device according to one embodiment of the present invention, FIG. 2 is an enlarged partial sectional view thereof, FIG. 3 is a partially cut front view thereof, and FIG. FIG. 5 is a partially cut plan view showing the low thermal resistance type semiconductor device.

In the present embodiment, a low thermal resistance type semiconductor device according to the present invention is a low thermal resistance type semiconductor integrated circuit device (hereinafter, referred to as a low thermal resistance type SO) having a small outline package.
It is called P · IC. ). This low thermal resistance type SOP / IC1 has a tab 2 formed in a substantially rectangular plate shape, and a plurality of inner leads 3 radially arranged close to both long sides of the tab 2, respectively. A plurality of outer leads 4 which are integrally connected to the respective inner leads 3 and are protruded to the side of the short side of the tab 2 and are bent in a gull wing shape; A pair of radiating fins 5 are disposed on both short sides of the radiator 2 and are integrally connected to each other.

The radiating fins 5 are arranged so that their protruding ends are located at the center of the outer lead 4 group row and protrude outward, and the protruding ends thereof have a gull-wing shape so as to substantially correspond to the outer leads 4. It is bent. And
The outer lead portion 5a as a protruding end portion of the radiating fin 5 is provided with a plurality of cutout portions 6 as gas venting spaces, arranged at substantially equal intervals in the width direction, radially inward from the outer end side, and Each of the notches 6 is formed so that the solid portion 5c of the flat portion 5b is substantially equal to the width of the outer lead 4 so as to stop near the end of the gull-wing-shaped flat portion 5b in the outer lead portion 5a. Respectively.

In addition, a groove 7 as an uneven surface is formed
Are formed so as to cross the radiation fins 5 at a substantially right angle by an appropriate means such as a plurality of strips, coining (coining) or the like. A plurality of bonding pads 8 are arranged in the groove 7 group on the upper surface of the radiation fin 5, and are formed by coining so that the upper surface becomes a flat surface. The bonding pad 8 is formed to have a circular planar shape, and the area thereof is set to a minimum area necessary for a wire bonding operation described later.

A pellet 9 in which an integrated circuit is formed is bonded on the tab 2 by an appropriate means, and a plurality of electrode pads 10 are formed in a substantially annular shape on the outer peripheral edge of the upper surface of the pellet 9. I have. Of these electrode pads 10, those connected to signal circuits and the like are arranged on the side of the inner lead 3 side of the pellet 9, respectively. Have been entangled. Therefore, a signal circuit or the like in the integrated circuit of the pellet 9 is electrically led to the outside via the electrode pad 10, the wire 11, the inner lead 3, and the outer lead 4.

On the other hand, of the electrode pads, the pad to be grounded
The ground pads 10a are arranged on the side edges of the pellets 9 facing the radiating fins 5, and the ground pads 10a are bonded to the bonding pads 8 formed on the radiating fins 5 by bonding wires 12 to the bridges. Have been entangled. That is, the wire 12 is firstly bonded to the ground pad 10 a and secondly bonded to the bonding pad 8 on the heat radiation fin 5. Therefore,
The ground circuit in the integrated circuit of the pellet 9 is electrically drawn to the outside via the electrode pad 10a, the wire 12, the bonding pad 8, the heat radiation fin 5, and the outer lead portion 6.

Here, since the bonding pads 8 are formed exclusively on the heat radiation fins 5 and the area required for performing the bonding is secured, the second bonding of the wire 12 impairs the function of the heat radiation fins 5. Without
It will be performed properly and easily. Further, since the bonding pad 8 is formed in a circular shape, a substantially uniform bonding area is secured from any position of the electrode pad 10a.

The low thermal resistance type SOP / IC1 has a package 13 which is integrally formed into a substantially rectangular flat plate shape by transfer molding using a resin.
By means of the tab 13, the tab 2, the inner lead 3, a part of the radiation fin 5, the pellet 9, and the wires 11 and 12 are hermetically sealed. That is, the outer leads 4 protrude from both long side surfaces of the package 13, and the radiation fins 5 are arranged such that the outer lead portions 5 a thereof are directed to the center of the outer leads 4 group row on both long side surfaces of the package 13. It is protruding. The outer lead 4 and the outer lead portion 5a are bent downward in the outside of the package 13 and then further bent in the horizontal direction to form a gull-wing shape.

 Next, the operation will be described.

The low thermal resistance type SOP / IC1 according to the above configuration is used by being surface-mounted on a printed wiring board as shown in FIG.

That is, a plurality of signal circuit lands 22 are arranged in two rows on the printed wiring board 21 so as to correspond to the outer leads 4 of the SOP / IC 1, and a substantially rectangular small land is formed using a solder material or the like. In addition to being formed in a flat plate shape, a land 23 for ground is provided at the center of the row of both lands 22.
The flat portion 5b of the outer lead portion 5a is disposed so as to correspond to the outer lead portion 5a of the heat radiation fin 5 of the SOP / IC1.
Is formed in a rectangular flat plate shape substantially corresponding to.

When the low thermal resistance type SOP / IC1 is surface-mounted on the printed wiring board 21, the outer leads 4 and the radiation fins 5 of the SOP / IC1 are connected to the lands 22 and 23 on the printed wiring board 21.
, A cream solder material (not shown) is sandwiched therebetween and is brought into contact with each other. Subsequently, when the cream solder material is melted and solidified by an appropriate means such as a reflow soldering process, a soldering portion 24 is provided between the outer leads 4 and the radiation fins 5 and the lands 22 and 23. and
Since each of the 25 is formed, the SOP / IC 1 is pneumatically and mechanically connected to the printed wiring board 21 and is in a surface-mounted state.

By the way, when the cutout 6 is not formed in the gull-wing shaped flat portion 5 b of the radiation fin 5, when the soldering portion 25 is formed between the radiation fin 5 and the land 23, Since the contact area with the land 23 is particularly large in the width direction, gas generated from volatile components and the like included in the cream solder material remains in the soldered portion 25, and voids are formed in the soldered portion 25. It may be formed.

However, in the present embodiment, since the notch 6 is formed in the gull-wing-shaped flat portion 5b of the heat radiation fin 5, the gas solder material interposed between the heat radiation fin 5 and the land 23 is used to remove the gas. Even if this occurs, no void is formed in the soldered portion 25.

That is, even if gas is generated from the cream solder material interposed between the radiation fin 5 and the land 23, the gas is generated from the cutout 6 formed in the gull-wing flat portion 5b of the radiation fin 5. Immediately and sufficiently released to the outside, no void is formed in the soldered portion 25 formed between the radiation fin 5 and the land 23.

During operation in the mounting state, when the pellet 9 generates heat, the pellet 9 is directly bonded to the tab 2 integrated with the radiation fin 5, so that heat is directly transmitted to the radiation fin 5, Is effectively radiated from the whole through the printed wiring board 21.

Here, the heat transmitted from the pellets 9 to the radiation fins 5 is radiated from the outer lead portions 5a of the radiation fins 5 to the printed wiring board 21 via the lands 25. At this time, since the notch 6 is cut out only in the gull-wing shaped flat portion 5 b of the heat radiation fin 5, the heat radiation effect of the heat radiation fin 5 is not reduced by the presence of the notch 6.

That is, since the cross-sectional area of the rising portion 5d of the outer lead portion 5a serving as a heat transfer path in the radiating fin 5 is not reduced by the notch portion 6, heat is transmitted without trouble in the outer lead portion 5a of the radiating fin 5, and The heat is radiated to the substrate 21.

When the low thermal resistance type SOP / IC1 is mounted on the printed wiring board, the outer lead portion 5a of the radiating fin 5 is electrically connected to the ground terminal. 12, the printed wiring board 21 is grounded through the bonding pad 8, the radiation fins 5, and the outer lead portions 6.

On the other hand, the radiation fin 5 has a
Since the interface between the heat radiation fins 5 and the package 13 is increased by projecting to the outside of the package 13, it is conceivable that the possibility of infiltration of moisture from the interface increases and the moisture resistance decreases.

However, in this embodiment, since the groove 7 is formed in the heat radiation fin 5 so as to cross the fin 5 inside the package 13, a decrease in the moisture resistance is effectively suppressed. That is, the leak path to the pellet 9 in the heat radiation fin 5 is lengthened by the groove 7.

 According to the above embodiment, the following effects can be obtained.

(1) By forming a gas vent space in the flat portion of the outer lead portion formed in a gull wing shape in the heat radiation fin of the low thermal resistance type semiconductor device, the lower portion of the flat portion of the outer lead portion can be formed during the soldering work of the heat radiation fin. Since the gas generated in step (1) can be released very effectively from the gas vent space, the generation of voids in the soldered portion due to the gas can be prevented.

(2) By preventing the occurrence of voids inside the soldered portion of the radiation fin, the soldering state can be properly maintained, so that the quality and reliability of the surface mount state of the low thermal resistance type semiconductor device can be maintained. Can be increased.

(3) By opening the gas venting space only in the flat part of the outer lead part formed in the gull wing shape in the heat radiation fin, it is possible to prevent the heat conduction area at the rising part of the outer lead part of the heat radiation fin from being reduced. Therefore, it is possible to prevent the radiation effect of the radiation fin from being reduced by the presence of the gas vent space.

(4) According to the above (1) to (3), the heat radiation performance of the low thermal resistance semiconductor device can be improved, so that the quality and reliability of the low thermal resistance semiconductor device can be further improved.

Although the invention made by the inventor has been specifically described based on the embodiments, the present invention is not limited to the embodiments, and it is needless to say that various changes can be made without departing from the gist of the invention. Nor.

For example, the gas vent space is not limited to the cutout portion, but is formed in the flat portion 5b of the outer lead portion 5a of the radiation fin 5 formed in a gull wing shape as shown in FIG. It may be constituted by the through hole 6A.

In the above description, the low heat resistance type SOP / I, which is a field of application in which the invention made by the inventor
The case of applying to C has been described, but the present invention is not limited to this, and the mini square package (MSP)
Low thermal resistance type IC with a low thermal resistance type SOP / IC or a low thermal resistance type M with a hermetically sealed package
It can be applied to SP / IC etc. The present invention can be provided at least for general low thermal resistance type semiconductor devices provided with heat radiation fins having a gull wing shape.

〔The invention's effect〕

The effect obtained by the representative one of the inventions disclosed in the present application will be briefly described as follows.

By forming a gas vent space in the flat part of the outer lead part formed in the gull wing shape in the heat radiation fin of the low thermal resistance type semiconductor device, this occurs under the flat part of the outer lead part at the time of soldering work of this heat radiation fin. Since the gas can be released very effectively from the degassing space, it is possible to prevent the generation of voids in the soldered portion due to the gas.

As a conventional technique for improving the soldering condition of a semiconductor device having J-shaped leads, Japanese Patent Application Laid-Open No.
There is one described in Japanese Patent No. 270856. That is,
In this technique, a cut is formed in the bottom surface of the vertex of the J-shaped lead, and the cut forms a substantially large meniscus region in the soldered portion.

On the other hand, the present invention relates to a low thermal resistance type semiconductor device provided with a radiation fin formed in a gull wing shape, and a solder formed between the radiation fin and the land during a soldering operation at the time of surface mounting. This is a technique for preventing the generation of voids inside the attachment portion, and has a completely different technical idea from the technique disclosed in JP-A-61-270856. Therefore, in the present invention, the above-described device not disclosed in this publication has been devised, and thereby, the above-described unique effects have been obtained.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a mounted state of a low thermal resistance type semiconductor device according to one embodiment of the present invention, FIG. 2 is an enlarged partial sectional view thereof, FIG. 3 is a partially cut front view thereof, and FIG. Similarly, FIG. 5 is a partially cut plan view showing the low thermal resistance type semiconductor device. FIG. 6 is an enlarged partial perspective view showing another embodiment of the present invention. 1. Low thermal resistance SOP / IC (semiconductor device) 2. Tab 3. Inner lead 4. Outer lead 5.
Radiation fins, 5a: outer lead, 5b: flat, 5c
…… Solid part, 5d …… Rising part, 6… Notch part (gas release space), 6A …… through hole (gas release space), 7… Groove,
8 ... bonding pad, 9 ... pellet, 10, 10a
… Electrode pad, 11, 12… Wire, 13… Package, 21… Printed circuit board, 22… Land, 23… Land for heat dissipation fin, 24, 25… Soldering part.

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Akio Hoshi 111 Nishiyokote-cho, Takasaki City, Gunma Prefecture Inside the Takasaki Plant of Hitachi, Ltd. (56) References JP-A-63-4661 (JP, A) (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 23/50

Claims (2)

(57) [Claims] 1. A radiating fin is connected to a tab to which a semiconductor chip is adhered, and a part of the radiating fin is projected from one side of the package to the outside of the package, and the package is sandwiched by the projected fin. A plurality of outer leads projecting out of the package from one side of the semiconductor device, wherein the radiation fins projecting out of the package are formed wider than the width of the outer leads and extend in a direction parallel to the upper surface of the package. A gull wing shape which extends and is bent in the direction of the package lower surface and further bent in a direction parallel to the package lower surface, and has a portion extending in a direction parallel to the lower surface of the gull wing shape and radially inward from an outer end side thereof. A gas vent space consisting of a plurality of cutouts formed in the The semiconductor device characterized by the portions bent in the direction of the portion and the package lower surface extending in a direction parallel not provided the degassing space with. 2. A heat radiation fin in the package, wherein a plurality of grooves are formed along a width direction of the heat radiation fin, and a bonding pad is selectively formed in the plurality of grooves. 2. The semiconductor device according to claim 1, wherein the electrodes of the semiconductor chip are connected by wires.