JP2854192B2 - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JP2854192B2
JP2854192B2 JP16918392A JP16918392A JP2854192B2 JP 2854192 B2 JP2854192 B2 JP 2854192B2 JP 16918392 A JP16918392 A JP 16918392A JP 16918392 A JP16918392 A JP 16918392A JP 2854192 B2 JP2854192 B2 JP 2854192B2
Authority
JP
Japan
Prior art keywords
integrated circuit
space
external lead
thermosetting resin
metal substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP16918392A
Other languages
Japanese (ja)
Other versions
JPH0613500A (en
Inventor
伸一 豊岡
秀史 西搭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Denki Co Ltd
Original Assignee
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Denki Co Ltd filed Critical Sanyo Denki Co Ltd
Priority to JP16918392A priority Critical patent/JP2854192B2/en
Publication of JPH0613500A publication Critical patent/JPH0613500A/en
Application granted granted Critical
Publication of JP2854192B2 publication Critical patent/JP2854192B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は混成集積回路装置に関
し、詳細には、シリコンゲル充填型の混成集積回路装置
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit device, and more particularly, to a silicon gel-filled hybrid integrated circuit device.

【0002】[0002]

【従来の技術】従来の混成集積回路装置は、図10に示
すように、略箱形状のケース材(60)、外部リード
(80)、集積回路素子(82)等を固着、搭載する第
1の絶縁金属基板(70)、主として、絶縁性向上のた
めに使用される第2の絶縁金属基板(90)から構成さ
れる。
2. Description of the Related Art As shown in FIG. 10, a conventional hybrid integrated circuit device has a first box-shaped case material (60), external leads (80), an integrated circuit element (82), etc., which are fixed and mounted. The insulating metal substrate (70) is mainly composed of a second insulating metal substrate (90) used for improving the insulating property.

【0003】ケース材(60)は第1の絶縁金属基板
(70)の周辺部に当接する壁体(62)を備える。外
部リードが導出される方向に形成される壁体(62)の
1つには、図10に示すように、シリコンゲル導入孔
(64)が形成される。また、通常、ケース材(60)
の長手方向端部に段部が形成され、この段部に、混成集
積回路装置を図示しない放熱板に結合するネジのための
孔が形成される。このケース材(60)は、例えばファ
イバグラス・レインホースPET(FRPET)を射出
成形して得られる。
[0003] The case material (60) has a wall (62) which comes into contact with the peripheral portion of the first insulating metal substrate (70). As shown in FIG. 10, a silicon gel introduction hole (64) is formed in one of the walls (62) formed in the direction in which the external lead is led out. Also, usually, the case material (60)
A step is formed at an end in the longitudinal direction, and a hole for a screw for connecting the hybrid integrated circuit device to a heat sink (not shown) is formed in the step. This case material (60) is obtained by injection molding, for example, fiberglass rain hose PET (FRPET).

【0004】第1および第2の絶縁金属基板(70)
(90)には放熱特性および加工性を考慮して略2mm
厚のアルミニウムが使用され、絶縁性の向上のためにそ
の表面が陽極酸化処理される。第1の絶縁金属基板(7
0)は矩形であり、混成集積回路装置が略完成した時点
で、数単位乃至十数単位の混成集積回路装置基板から単
位混成集積回路装置のサイズに分割プレスされる。ま
た、第2の絶縁金属基板(90)はケース材(60)と
略同一の平面形状であり、これを第1の絶縁金属基板
(70)に接着する接着層(92)が図示しない放熱板
と第1の絶縁金属基板(70)間の絶縁に寄与する。
First and second insulated metal substrates (70)
(90) is approximately 2 mm in consideration of heat radiation characteristics and workability.
Thick aluminum is used and its surface is anodized to improve insulation. First insulating metal substrate (7
0) is a rectangle, and when the hybrid integrated circuit device is substantially completed, the hybrid integrated circuit device substrate is divided into several units and several tens of units, and is divided into unit hybrid integrated circuit device sizes and pressed. The second insulating metal substrate (90) has substantially the same planar shape as the case material (60), and an adhesive layer (92) for bonding the second insulating metal substrate (90) to the first insulating metal substrate (70) is provided with a heat sink (not shown). And the first insulating metal substrate (70).

【0005】外部リード用パッド(74)、ダイボンド
パッド(76)、ワイアボンディングパッド(78)お
よび導電路(図示しない)は、ポリイミド樹脂等の接着
性を有する熱硬化性絶縁樹脂と略35μm厚の銅箔との
クラッド材を温度150℃〜170℃、1平方センチメ
ートル当り50〜100Kgの圧力で第1の絶縁金属基
板(70)にホットプレスした後、その銅箔をホトエッ
チングする等して所定パターンに形成される。なお、前
記熱硬化性絶縁樹脂はこのホットプレス工程で完全硬化
して略35μm厚の絶縁層(72)となる。
An external lead pad (74), a die bond pad (76), a wire bonding pad (78), and a conductive path (not shown) are made of a thermosetting insulating resin such as a polyimide resin having an adhesive property and having a thickness of about 35 μm. After the clad material with the copper foil is hot-pressed on the first insulating metal substrate (70) at a temperature of 150 ° C. to 170 ° C. and a pressure of 50 to 100 kg per square centimeter, the copper foil is subjected to a predetermined pattern by photoetching or the like. Formed. The thermosetting insulating resin is completely cured in this hot pressing step to form an insulating layer (72) having a thickness of about 35 μm.

【0006】集積回路素子(82)等の半導体素子およ
びその他の回路素子にはチップ部品が使用され、集積回
路素子(82)は銀ペースト等により第1の絶縁金属基
板(70)のダイボンドパッド(76)に固着され、チ
ップコンデンサあるいはチップ抵抗、外部リード(8
0)等の異型部品は所定のパッドに半田固着される。こ
れら回路素子および部品は所定のパッド(74)(7
6)(78)上にスクリーン印刷したソルダーペースト
に一時的に付着させた後、リフローして完全固着され
る。この第1の絶縁金属基板(70)の周辺部は、エポ
キシ含浸ポリエステル不繊布を接着シートとして、ケー
ス材(60)の壁体(62)に加熱圧着(125℃、8
時間)され、搭載回路素子が封止される。
Chip components are used for semiconductor elements such as the integrated circuit element (82) and other circuit elements, and the integrated circuit element (82) is formed of a die bond pad (70) on a first insulating metal substrate (70) using silver paste or the like. 76), chip capacitors or chip resistors, external leads (8
The odd-shaped parts such as 0) are fixed to predetermined pads by soldering. These circuit elements and components are provided with predetermined pads (74) (7).
6) After temporarily attaching to the solder paste screen-printed on (78), it is completely fixed by reflow. The peripheral portion of the first insulated metal substrate (70) is heat-pressed (125 ° C., 8
Time), and the mounted circuit element is sealed.

【0007】[0007]

【発明が解決しようとする課題】本発明は特に信頼性が
要求され、特殊なヒートサイクル試験が行われるシリコ
ンゲル充填型の混成集積回路装置に発生することがある
外部リード(80)のためのパッド(74)の剥離の原
因の解明の過程で成されたものである。即ち、発明者の
研究により、樹脂製のケース材(60)で封止した混成
集積回路装置をヒートサイクル試験すると、図10の矢
印で示すように、ケース材(60)の端部が上方に湾曲
することが知られた。また、熱硬化性樹脂(96)と第
1の絶縁金属基板(70)との固着が完全である場合に
はこの湾曲は僅少であることも知られた。
SUMMARY OF THE INVENTION The present invention is directed to an external lead (80) which may require reliability, and which may occur in silicon gel filled hybrid integrated circuit devices where special heat cycle tests are performed. This is made in the process of elucidating the cause of the separation of the pad (74). That is, according to the research of the inventor, when the hybrid integrated circuit device sealed with the resin case material (60) is subjected to the heat cycle test, as shown by the arrow in FIG. 10, the end of the case material (60) faces upward. It was known to bend. It has also been known that when the thermosetting resin (96) and the first insulating metal substrate (70) are completely fixed, the curvature is small.

【0008】そして、外部リード(80)固着領域に充
填されるエポキシ樹脂等の熱硬化性樹脂(96)とケー
ス材(60)との接着強度が極めて高いに対し、シリコ
ンゲル(94)と他の材料の接着強度が低いため、外部
リード(80)固着部にシリコンゲル(94)が付着す
る場合には、ケース材(60)の湾曲に応じて、熱硬化
性樹脂(96)および外部リード(80)が第1の絶縁
金属基板(70)から持ち上げられ、やがて、パッド
(74)の剥離に至ることが解明された。
The adhesive strength between the thermosetting resin (96) such as epoxy resin and the case material (60) filled in the area where the external leads (80) are fixed is extremely high, while the silicone gel (94) and other materials are used. When the silicon gel (94) adheres to the fixing portion of the external lead (80) due to the low adhesive strength of the material of the external lead (80), the thermosetting resin (96) and the external lead (80) was lifted from the first insulating metal substrate (70), and it was clarified that the pad (74) was eventually separated.

【0009】なお、外部リード(80)固着部にシリコ
ンゲル(94)が付着する理由は、従来の混成集積回路
装置では、ゾル状態のシリコンを外部リード(80)の
固着部から注入するため、注入パイプの外壁を濡らすシ
リコンゾルが外部リード(80)固着部に付着するため
である。また、注入するシリコンゾルの流動性が高いた
め、図10に示すように、外部リード(80)のための
電極パターンを浸透して、外部リード(80)固着部を
シリコンゾルで濡らすためであり、さらにまた、シリコ
ンゾルを高圧注入する場合に飛散するシリコンゾルが外
部リード(80)固着部に付着するためである。
The reason why the silicon gel (94) adheres to the fixing portion of the external lead (80) is that in the conventional hybrid integrated circuit device, silicon in a sol state is injected from the fixing portion of the external lead (80). This is because the silicon sol that wets the outer wall of the injection pipe adheres to the fixing portion of the external lead (80). In addition, since the fluidity of the silicon sol to be injected is high, as shown in FIG. 10, the electrode pattern for the external lead (80) penetrates to wet the external lead (80) fixing portion with the silicon sol. This is because the silicon sol scattered when the silicon sol is injected at a high pressure adheres to the fixing portion of the external lead (80).

【0010】また、従来構造の混成集積回路装置では一
対の外部リードが相対する面から導出されるため、外部
リード固着部の補強のための熱硬化性樹脂の充填、硬化
を同時に行うことが不可能であり製造工程が煩雑である
問題を有する。従って、本発明の第1の目的は過酷なヒ
ートサイクルが加えられる場合にも、パッドの剥離を生
じない高信頼のシリコンゲル充填型の混成集積回路装置
を提供することにあり、第2の目的は外部リード固着部
の補強のための熱硬化性樹脂の充填、硬化を同時に行う
ことが可能な混成集積回路装置を提供することにある。
Further, in the hybrid integrated circuit device having the conventional structure, since a pair of external leads are led out from opposite surfaces, it is impossible to simultaneously fill and cure a thermosetting resin for reinforcing the external lead fixing portion. There is a problem that it is possible and the manufacturing process is complicated. Accordingly, a first object of the present invention is to provide a highly reliable silicon gel-filled hybrid integrated circuit device which does not cause pad separation even when a severe heat cycle is applied. It is an object of the present invention to provide a hybrid integrated circuit device capable of simultaneously filling and curing a thermosetting resin for reinforcing an external lead fixing portion.

【0011】[0011]

【課題を解決するための手段】上述した課題を解決し、
目的を達成するため、この発明に係わる混成集積回路装
置は、絶縁金属基板に形成した回路パターン上に複数の
集積回路素子および外部リード端子を固着、搭載した集
積回路基板と、集積回路素子搭載領域と外部リード端子
固着領域とを分割する壁体を少なくとも備える略枠状の
樹脂製ケース材と、集積回路素子搭載空間内に順次積層
されたシリコンゲルおよび第1の熱硬化性樹脂と、外部
リード端子導出辺の空間に充填される第2の熱硬化性樹
脂とを具備し、壁体の内面にシリコンゲルのはい上りを
防止する第1の突出部を設け、その第1の突出部より上
段に第1の熱硬化性樹脂と咬止状態となる第2の突出部
を設けたことを特徴としている。
Means for Solving the Problems The above-mentioned problems are solved,
In order to achieve the object, a hybrid integrated circuit device according to the present invention includes an integrated circuit board having a plurality of integrated circuit elements and external lead terminals fixed and mounted on a circuit pattern formed on an insulated metal substrate, and an integrated circuit element mounting area. A substantially frame-shaped resin case material having at least a wall for dividing the external lead terminal fixing region, a silicon gel and a first thermosetting resin sequentially laminated in an integrated circuit element mounting space, and an external lead A second thermosetting resin filled in the space of the terminal lead-out side, a first protrusion for preventing the silicon gel from climbing up is provided on the inner surface of the wall, and a step above the first protrusion is provided. Is provided with a second projecting portion which is in a state of being engaged with the first thermosetting resin.

【0012】また、この発明に係わる混成集積回路装置
は、絶縁金属基板に形成した回路パターン上に複数の集
積回路素子および外部リード端子を固着、搭載した集積
回路基板と、集積回路素子搭載領域と外部リード端子固
着領域とを分割し前記外部リード端子固着パッド近傍に
配置された壁体を少なくとも備え且つ、シリコンゲルと
熱硬化性樹脂の充填のための開口部を同一方向に形成し
た略枠状の樹脂製ケース材と、集積回路素子搭載空間内
に順次積層されたシリコンゲルおよび第1の熱硬化性樹
脂と、外部リード端子導出辺の空間に充填される第2の
熱硬化性樹脂とを具備し、壁体の内面に前記シリコンゲ
ルの界面と実質的に同一面となる位置にシリコンゲルの
はい上りを防止する第1の突出部を断続的に設け、その
第1の突出部より上段で且つ重畳しない領域に第1の熱
硬化性樹脂と咬止状態となる第2の突出部を設けたこと
を特徴としている。
Further, a hybrid integrated circuit device according to the present invention provides an integrated circuit board having a plurality of integrated circuit elements and external lead terminals fixed and mounted on a circuit pattern formed on an insulated metal substrate; A substantially frame-like shape having at least a wall divided from an external lead terminal fixing region and arranged near the external lead terminal fixing pad, and an opening for filling the silicone gel and the thermosetting resin formed in the same direction; Resin case material, silicon gel and the first thermosetting resin sequentially laminated in the integrated circuit element mounting space, and the second thermosetting resin filled in the space of the lead-out side of the external lead terminal. A first protruding portion for intermittently providing a silicon gel at an inner surface of a wall at a position substantially flush with an interface of the silicon gel; It is characterized in that a second projecting portion to be the first thermosetting resin and 咬止 state in a region which is not and superimposed stages.

【0013】[0013]

【作用】以上のように構成される混成集積回路装置にお
いては、ケース材に集積回路素子搭載領域と外部リード
固着領域を分割する壁体を形成することにより、シリコ
ンゾル注入パイプの外部リード固着領域への接近を回避
し、シリコンゾル注入パイプ外壁のシリコンゾルが外部
リード固着領域に付着する問題、飛散シリコンゾルが外
部リード固着領域に付着する問題を解決することができ
る。
In the hybrid integrated circuit device configured as described above, the external lead fixing region of the silicon sol injection pipe is formed by forming a wall dividing the integrated circuit element mounting region and the external lead fixing region in the case material. Thus, the problem that the silicon sol on the outer wall of the silicon sol injection pipe adheres to the external lead fixing region and the problem that the scattered silicon sol adheres to the external lead fixing region can be solved.

【0014】また、ケース材に集積回路素子搭載領域と
外部リード固着領域を分割する壁体を形成し、シリコン
ゲルと熱硬化性樹脂の充填のための開口部を単一方向に
形成することにより、シリコンゾルの飛散等による外部
リード固着部の汚染の問題が解決されると共に、シリコ
ンゾル注入と熱硬化性樹脂の充填を単一治具上で行うこ
とが可能になる。
Further, a wall is formed in the case material to divide the integrated circuit element mounting area and the external lead fixing area, and an opening for filling the silicon gel and the thermosetting resin is formed in a single direction. In addition, the problem of contamination of the external lead fixing portion due to scattering of the silicon sol or the like can be solved, and the injection of the silicon sol and the filling of the thermosetting resin can be performed on a single jig.

【0015】さらに、シリコンゲルと熱硬化性樹脂の充
填のための開口部を単一方向に形成したケース材の外部
リード固着領域およびシリコンゲル上部に熱硬化性樹脂
を同時充填することができ、シリコンゾルの飛散等によ
る外部リード固着部の汚染の問題が解決されると共に、
熱硬化性樹脂充填を一回で完了することができる。さら
に、壁体の内面にシリコンゲルのはい上りを防止する第
1の突出部と熱硬化性樹脂と咬止状態となる第2の突出
部を設けることにより、条件の極めて厳しい熱衝撃試験
を行ったとしてもシリコンゲルの伸縮、膨張によりシリ
コンゲル上の熱硬化性樹脂が剥離することがない。
Further, the thermosetting resin can be simultaneously filled into the outer lead fixing region of the case material having the opening for filling the silicone gel and the thermosetting resin in a single direction and the upper portion of the silicon gel, The problem of contamination of the external lead fixing part due to scattering of silicon sol is solved,
Thermosetting resin filling can be completed in one go. Further, by providing a first protrusion for preventing the silicone gel from rising and a second protrusion for engaging with the thermosetting resin on the inner surface of the wall, a very severe thermal shock test is performed. Even if the silicone gel expands and contracts and expands, the thermosetting resin on the silicone gel does not peel off.

【0016】[0016]

【実施例】以下に、図1〜図9に示した実施例に基づい
て本発明を説明する。図1および図2を参照すると、デ
ュアルインライン・パッケージの混成集積回路装置を例
示する実施例は、枠(12)内に一対の壁体(14)を
備え、この壁体(14)により絶縁金属基板(30)上
の領域を集積回路素子搭載領域(16)と外部リード固
着領域(18)とに分割するケース材(10)、集積回
路素子(46)等の半導体素子、外部リード(44)等
を固着、搭載する第1の絶縁金属基板(30)、主とし
て絶縁性向上のために使用される第2の絶縁金属基板
(50)、集積回路素子搭載領域(16)に充填される
シリコンゲル(56)、このシリコンゲル(56)上部
および外部リード固着領域(18)に充填される熱硬化
性樹脂(58)からなる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the embodiments shown in FIGS. Referring to FIGS. 1 and 2, an embodiment illustrating a hybrid integrated circuit device in a dual in-line package includes a pair of walls (14) in a frame (12), the walls (14) providing an insulating metal. A case material (10) for dividing an area on the substrate (30) into an integrated circuit element mounting area (16) and an external lead fixing area (18), semiconductor elements such as an integrated circuit element (46), and external leads (44). A first insulating metal substrate (30) for fixing and mounting, etc., a second insulating metal substrate (50) mainly used for improving insulation properties, and a silicon gel filling the integrated circuit element mounting area (16). (56) A thermosetting resin (58) filled in the upper portion of the silicon gel (56) and the external lead fixing region (18).

【0017】耐候性等の向上のために充填されるシリコ
ンゲル(56)は図示しないポンプ等により、ゾル状態
で一対の壁体(14)で形成された集積回路素子搭載領
域(16)の所定の深さまで注入され、注入後に熱処理
してゲル化される。本実施例によれば、その際、集積回
路素子搭載領域(16)の面積が大きい理由、および集
積回路素子搭載領域(16)と外部リード固着領域(1
8)間に分離のための壁体(14)が形成されている理
由のため、シリコンゾル注入パイプの外部リード固着領
域(18)への接近が回避され、シリコンゾル注入パイ
プ外壁のシリコンゾルが外部リード固着領域(18)に
付着する問題、飛散シリコンゾルが外部リード固着領域
(18)に付着する問題が生じない。
The silicon gel (56) filled for the purpose of improving the weather resistance or the like is formed in a sol state by a pump or the like (not shown) in a predetermined area of the integrated circuit element mounting region (16) formed by the pair of walls (14). And then heat-treated after injection to gel. According to the present embodiment, at this time, the reason why the area of the integrated circuit element mounting area (16) is large, and the reason why the integrated circuit element mounting area (16) and the external lead fixing area (1)
8) Because of the formation of the separation wall (14) between the silicon sol injection pipe and the outer lead fixing area (18) of the silicon sol injection pipe is prevented from approaching, and the silicon sol on the outer wall of the silicon sol injection pipe is reduced. The problem of adhesion to the external lead fixing region (18) and the problem of scattering silicon sol adhering to the external lead fixing region (18) do not occur.

【0018】そして、熱硬化性樹脂(58)を前記シリ
コンゲル(56)上部および一対の外部リード固着領域
(18)に充填し、熱処理して図1の構造が完成する。
図3〜図5を参照して本実施例をさらに詳細に説明す
る。図3はケース材(10)の斜視図、図4は平面図、
図5は図4のA−A断面図である。ケース材(10)は
図3〜図5に示す如く、略枠状に形成される。このケー
ス材は例えばファイバグラス・レインホースPET(F
RPET)等の絶縁樹脂材料を用いて射出成形して形成
される。
Then, a thermosetting resin (58) is filled into the upper portion of the silicon gel (56) and the pair of external lead fixing regions (18), and heat-treated to complete the structure of FIG.
This embodiment will be described in more detail with reference to FIGS. FIG. 3 is a perspective view of the case material (10), FIG.
FIG. 5 is a sectional view taken along line AA of FIG. The case member (10) is formed in a substantially frame shape as shown in FIGS. This case material is, for example, a fiberglass rain hose PET (F
It is formed by injection molding using an insulating resin material such as RPET).

【0019】ケース材(10)は外部リード固着領域と
集積回路素子搭載領域とを分割するための壁体(14)
が設けられている。かかる壁体(14)の底面部は第1
の絶縁金属基板(30)表面と当接しないように形成さ
れている。即ち、ケース材(10)と第1の絶縁金属基
板(30)とが一体化されたとき、壁体(14)と基板
(30)間は、非当接状態となり、両者間には所定の間
隔の空間部が形成される。この空間部は外部リード端子
(44)が固着される側の基板周端辺に形成され、リー
ド端子が形成されない基板面はケース材と当接されるこ
とになる。
The case material (10) is a wall (14) for dividing an external lead fixing area and an integrated circuit element mounting area.
Is provided. The bottom of the wall (14) is the first
Of the insulating metal substrate (30). That is, when the case material (10) and the first insulated metal substrate (30) are integrated, the space between the wall (14) and the substrate (30) is in a non-contact state, and a predetermined distance is provided between them. An interval space is formed. This space is formed on the peripheral edge of the substrate on the side to which the external lead terminals (44) are fixed, and the substrate surface on which the lead terminals are not formed comes into contact with the case material.

【0020】壁体(14)を第1の絶縁金属基板(3
0)と非当接状態する理由は、外部リードを半田固着す
るときに発生する半田ボールによる悪影響を回避するた
めである。またケース材(10)の壁体(14)の内
面、即ち、集積回路素子搭載領域側の内面には第1及び
第2の突出部(1)(2)が設けられている。第1の突
出部(1)は集積回路素子搭載領域内に充填するシリコ
ンゾルのはい上りを防止するための突出部であり、図4
及び図5に示す如く、壁体(14)内面に断続的に設け
られている。この第1の突出部(1)を設けないと、シ
リコンゾルを充填したとき表面張力によってシリコンゾ
ルが壁体(14)の内面をはい上り、第1の熱硬化性樹
脂(58A)が剥離する恐れがある。即ち、シリコンゾ
ルを熱処理しゲル化した後、シリコンゲル上にエポキシ
樹脂を充填して第1の熱硬化性樹脂(58A)を形成す
るが、第1の突出部(1)がないと、上述したように壁
体内面にシリコンゲルが付着しているために、通常状態
では第1の熱硬化性樹脂(58A)は接着されている
が、例えば−40℃〜+150℃の熱衝撃試験を行った
場合、シリコンゲルの熱膨張率が極めて大きいことから
シリコンゲルの伸縮・膨張により第1の熱硬化性樹脂
(58A)が壁体(14)、即ち、ケース材(10)か
ら剥離するという事実が本発明者の実験により明らかに
された。
The wall (14) is connected to the first insulating metal substrate (3).
The reason for the non-contact state with 0) is to avoid adverse effects due to solder balls generated when external leads are fixed by soldering. Also, first and second protrusions (1) and (2) are provided on the inner surface of the wall (14) of the case material (10), that is, on the inner surface on the integrated circuit element mounting region side. The first protruding portion (1) is a protruding portion for preventing the silicon sol filling the integrated circuit element mounting area from going up.
And as shown in FIG. 5, it is intermittently provided on the inner surface of the wall (14). If the first protruding portion (1) is not provided, the silicon sol goes up the inner surface of the wall (14) due to surface tension when the silicon sol is filled, and the first thermosetting resin (58A) peels off. There is fear. That is, after the silicon sol is heat-treated and gelled, an epoxy resin is filled on the silicon gel to form the first thermosetting resin (58A). As described above, since the silicon gel adheres to the inner surface of the wall, the first thermosetting resin (58A) is adhered in a normal state, but a thermal shock test at −40 ° C. to + 150 ° C. is performed, for example. In this case, since the thermal expansion coefficient of the silicon gel is extremely large, the first thermosetting resin (58A) peels off from the wall (14), that is, the case material (10) due to expansion and contraction of the silicon gel. Was clarified by the experiment of the present inventors.

【0021】そこで、第1の突出部(1)の上段部に第
2の突出部(2)を設け、その第2の突出部(2)と第
1の熱硬化性樹脂(58A)とを咬止させて熱衝撃時に
発生するシリコンゲルの伸縮・膨張による第1の熱硬化
性樹脂(58A)の剥離を防止する。第2の突出部
(2)は第1の突出部(1)と重畳しない領域に形成さ
れ、第1の熱硬化性樹脂(58A)と咬止状態を良好と
するために例えば、三角形状に形成されている。
Therefore, a second protrusion (2) is provided on the upper part of the first protrusion (1), and the second protrusion (2) and the first thermosetting resin (58A) are connected to each other. The first thermosetting resin (58A) is prevented from peeling due to expansion and contraction / expansion of the silicone gel generated at the time of thermal shock by being engaged. The second protrusion (2) is formed in a region that does not overlap with the first protrusion (1), and has a triangular shape, for example, in order to improve the engagement state with the first thermosetting resin (58A). Is formed.

【0022】次に、第2の突出部(2)の必要性につい
て述べる。図6は第1及び第2の突出部(1)(2)が
設けられたケース材(10)の壁体(14)部分の拡大
断面図である。第2の突出部(2)は第1の基板(3
0)から第1の突出部(1)までの高さHが十分にある
場合には設ける必要性はない。即ち、第1の基板(3
0)上に搭載した回路素子を十分保護できるだけのシリ
コンゲルを充填したとしてもシリコンゲルのはい上りは
第1の突出部(1)まで達するが第1の突出部(1)の
先端部分、即ち、シリコンゲル(56)界面(図6の2
点鎖点)と第1の突出部(1)に第1の熱硬化性樹脂
(58A)を咬止する領域が形成されるためである。し
かしながら、高さHを高くすることにより、混成集積回
路自体の厚みが大きくなり、薄型化が要求される近年で
は混成集積回路自体の厚み(高さ)を極力薄くしなけれ
ばならないという課題がある。
Next, the necessity of the second protrusion (2) will be described. FIG. 6 is an enlarged sectional view of the wall (14) of the case material (10) provided with the first and second protrusions (1) and (2). The second protrusion (2) is provided on the first substrate (3).
If the height H from 0) to the first protrusion (1) is sufficient, there is no need to provide it. That is, the first substrate (3
0) Even if silicon gel is filled enough to protect the circuit element mounted thereon, the rising of the silicon gel reaches the first protruding portion (1) but the tip portion of the first protruding portion (1), ie, , Silicon gel (56) interface (2 in FIG. 6)
This is because a region for engaging the first thermosetting resin (58A) is formed in the first projecting portion (1) and the first projecting portion (1). However, increasing the height H increases the thickness of the hybrid integrated circuit itself, and in recent years the thickness (height) of the hybrid integrated circuit itself has to be reduced as much as possible. .

【0023】従って、高さHを最小限に低くすれば、シ
リコンゲル(56)界面(図6の実線)が第1の突出部
(1)と略同一面になるため、第1の突出部(1)とシ
リコンゲル(56)界面に第1の熱硬化性樹脂(58
A)を咬止する領域が形成されなくなり、上述したよう
に熱衝撃時にシリコンゲルの伸縮・膨張により第1の熱
硬化性樹脂(58A)が剥離することになる。このた
め、厚みを最小限に薄い混成集積回路装置を提供するた
めには第2の突出部(2)の存在は必要不可欠となる。
Therefore, if the height H is minimized, the interface (solid line in FIG. 6) of the silicon gel (56) becomes substantially flush with the first protrusion (1). A first thermosetting resin (58) is provided at the interface between (1) and the silicon gel (56).
A region for engaging A) is not formed, and the first thermosetting resin (58A) is peeled off due to expansion and contraction and expansion of the silicon gel at the time of thermal shock as described above. Therefore, the presence of the second protrusion (2) is indispensable to provide a hybrid integrated circuit device having a minimum thickness.

【0024】更に述べると、本実施例では、第2の突出
部(2)は、壁体(14)の上側に形成される。これ
は、第2の突出部(2)と第1の熱硬化性樹脂(58
A)とを完全に咬止するためには、少なくともシリコン
ゲル(56)界面から約3mm以上の間隔が必要であ
る。従って、混成集積回路装置自体の厚みを最小限とす
るためには第1の熱硬化性樹脂(58A)の厚みを約3
mmとすれば、第2の突出部(2)は壁体(14)の上
面側に形成する必要がある。
More specifically, in this embodiment, the second protrusion (2) is formed on the upper side of the wall (14). This is because the second protrusion (2) and the first thermosetting resin (58)
In order to completely engage A), at least an interval of about 3 mm or more from the silicon gel (56) interface is required. Therefore, in order to minimize the thickness of the hybrid integrated circuit device itself, the thickness of the first thermosetting resin (58A) is set to about 3
mm, the second protrusion (2) needs to be formed on the upper surface side of the wall (14).

【0025】ところで、図中には開示されてないが、壁
体(14)の上面に第1の熱硬化性樹脂界面と略平行と
なる支持体を形成すれば第1の熱硬化性樹脂の剥離強度
を向上させることができる。図7は本実施例に適合する
第1の絶縁金属基板(30)の斜視図であり、第1の絶
縁金属基板(30)には放熱特性および加工性を考慮し
て略2mm厚のアルミニウムが使用され、絶縁性の向上
のためにその表面が陽極酸化処理される。この絶縁金属
基板(30)は混成集積回路装置が略完成した時点で、
数単位乃至十数単位の混成集積回路基板から単位混成集
積回路装置のサイズに分割プレスされる。
Although not shown in the figure, if a support is formed on the upper surface of the wall (14) so as to be substantially parallel to the interface between the first thermosetting resin, the first thermosetting resin is formed. Peel strength can be improved. FIG. 7 is a perspective view of a first insulated metal substrate (30) conforming to the present embodiment. Aluminum having a thickness of about 2 mm is formed on the first insulated metal substrate (30) in consideration of heat radiation characteristics and workability. It is used and its surface is anodized to improve insulation. This insulated metal substrate (30) is obtained when the hybrid integrated circuit device is substantially completed.
A plurality of units to several tens of units of the hybrid integrated circuit board are divided and pressed to the size of the unit hybrid integrated circuit device.

【0026】外部リード用パッド(38)、ワイアボン
ディングパッド(40)、ダイボンドパッド(42)お
よび導電路(図示しない)は、ポリイミド樹脂等の接着
性を有する熱硬化性絶縁樹脂と略35μm厚の銅箔との
クラッド材を温度150℃〜170℃、1平方センチメ
ートル当り50〜100Kgの圧力で第1の絶縁金属基
板(30)にホットプレスした後、その銅箔をホトエッ
チングする等して所定パターンに形成される。なお、前
記熱硬化性絶縁樹脂はこのホットプレス工程で完全硬化
して略35μm厚の絶縁層となる(図2の符号(32)
参照)。
The external lead pad (38), the wire bonding pad (40), the die bond pad (42), and the conductive path (not shown) are made of a thermosetting insulating resin such as a polyimide resin having adhesiveness and having a thickness of about 35 μm. After hot-pressing the clad material with the copper foil on the first insulating metal substrate (30) at a temperature of 150 ° C. to 170 ° C. and a pressure of 50 to 100 kg per square centimeter, the copper foil is subjected to a predetermined pattern by photo-etching or the like. Formed. The thermosetting insulating resin is completely cured in this hot pressing step to form an insulating layer having a thickness of about 35 μm (reference numeral 32 in FIG. 2).
reference).

【0027】集積回路素子(46)等の半導体素子およ
びその他の回路素子にはチップ部品が使用され、集積回
路素子(46)は銀ペースト等によりダイボンドパッド
(42)に固着され、チップコンデンサ、あるいはチッ
プ抵抗等の異型部品は所定のパッドに半田固着される。
これら回路素子は所定のパッド(40)(42)上にス
クリーン印刷したソルダーペーストに一時的に付着させ
た後、リフローして完全固着される。
Chip components are used for semiconductor elements such as the integrated circuit element (46) and other circuit elements, and the integrated circuit element (46) is fixed to the die bond pad (42) with a silver paste or the like, and a chip capacitor or An odd-shaped component such as a chip resistor is fixed to a predetermined pad by soldering.
These circuit elements are temporarily adhered to a solder paste screen-printed on predetermined pads (40) (42) and then reflowed to be completely fixed.

【0028】そして、最後に、固着パッド(38)に外
部リード端子(44)が半田固着される。この外部リー
ド端子(44)は、リード端子(44)の先端部に約3
00〜350℃に加熱された半田ごてを数秒間圧接して
パッド(38)上にあらかじめ形成された半田を溶融さ
せてパッド(38)上にリード端子(44)が半田固着
される。半田ごてをリード端子(44)上に圧接したと
き、半田から半田ボールが周辺近傍の導電路上等に飛散
し表面に付着する。しかし、パッド(38)の周辺近傍
にはあらかじめオーバーコート膜がスクリーン印刷によ
り形成されているために、実際には、上述した半田ボー
ルはオーバーコート膜上に付着残存する。
Finally, the external lead terminals (44) are fixed to the fixing pads (38) by soldering. This external lead terminal (44) has about 3
A soldering iron heated to 00 to 350 ° C. is pressed for several seconds to melt the solder previously formed on the pad (38), and the lead terminal (44) is fixed on the pad (38) by soldering. When the soldering iron is pressed against the lead terminals (44), the solder balls are scattered from the solder onto conductive paths near the periphery and adhere to the surface. However, since the overcoat film is formed in advance in the vicinity of the periphery of the pad (38) by screen printing, the above-described solder balls actually adhere and remain on the overcoat film.

【0029】図8を参照すると、前記したケース材(1
0)と第1の絶縁金属基板(30)とを図示するように
重ね、第1の絶縁金属基板(30)の周辺部とケース材
(10)の枠(12)が、シリコン樹脂により仮接着さ
れる。この際、上述したように、ケース材(10)の壁
体(14)の底面部と第1の絶縁金属基板(30)表面
とは、非当接状態に配置されているため、両者間を固着
したとき所定の空間部が形成される。従って、半田ボー
ルが仮に壁体(14)の領域に飛散したとしても半田ボ
ールは空間部内に配置されることになる。
Referring to FIG. 8, the case material (1)
0) and the first insulating metal substrate (30) are overlapped as shown in the figure, and the peripheral portion of the first insulating metal substrate (30) and the frame (12) of the case material (10) are temporarily bonded by a silicone resin. Is done. At this time, as described above, since the bottom surface of the wall body (14) of the case material (10) and the surface of the first insulating metal substrate (30) are arranged in a non-contact state, the space between them is provided. When fixed, a predetermined space is formed. Therefore, even if the solder ball scatters in the region of the wall (14), the solder ball will be arranged in the space.

【0030】ところで、集積回路素子搭載領域(16)
には、上述したようにシリコンゾルが注入されるため、
壁体(14)と基板(30)間に形成された空間には接
着性樹脂(57)が介在されるため、シリコンゾルが外
部リード固着領域(18)に流出しない。図9は主とし
て絶縁性向上のために使用される第2の絶縁金属基板
(50)の斜視図である。第2の絶縁金属基板(50)
は第1の絶縁金属基板(30)と同一の素材であり、ケ
ース材(10)の放熱板に結合するネジのための孔(2
2)に対応する位置に孔(54)が形成される。この第
2の絶縁金属基板(50)はシリコン樹脂(図2の符号
(52)参照)によってケース材(10)の枠(12)
に結合される。そして、この接着に使用されたシリコン
樹脂が第1の絶縁金属基板(30)と図示しない放熱板
間の絶縁性能を向上させる。
Incidentally, the integrated circuit element mounting area (16)
Since silicon sol is injected as described above,
Since the adhesive resin (57) is interposed in the space formed between the wall (14) and the substrate (30), the silicon sol does not flow out to the external lead fixing region (18). FIG. 9 is a perspective view of a second insulating metal substrate (50) mainly used for improving insulation. Second insulating metal substrate (50)
Is the same material as the first insulated metal substrate (30), and is a hole (2) for a screw to be coupled to a heat sink of the case material (10).
A hole (54) is formed at a position corresponding to (2). This second insulated metal substrate (50) is made of silicone resin (see reference numeral (52) in FIG. 2), and the frame (12) of the case material (10) is formed.
Is combined with Then, the silicone resin used for this bonding improves the insulation performance between the first insulating metal substrate (30) and the heat sink (not shown).

【0031】[0031]

【発明の効果】以上に詳述した如く、本発明に依れば、
ケース材に集積回路素子搭載領域と外部リード固着領域
を分割する壁体を形成したため、シリコンゾル注入パイ
プの外部リード固着領域へ接近するおそれが少なく、シ
リコンゾル注入パイプ外壁のシリコンゾルが外部リード
固着領域に付着する問題、飛散シリコンゾルが外部リー
ド固着領域に付着する問題が生じない。この結果、過酷
なヒートサイクルが加えられる場合にも、パッドの剥離
を生じない高信頼のシリコンゲル充填型の混成集積回路
装置を提供することができる。
As described in detail above, according to the present invention,
A wall that divides the integrated circuit element mounting area and the external lead fixing area is formed in the case material, so there is little risk of approaching the external lead fixing area of the silicon sol injection pipe, and the silicon sol on the silicon sol injection pipe outer wall is fixed to the external lead. The problem of adhesion to the area and the problem of scattering silicon sol adhering to the external lead fixing area do not occur. As a result, it is possible to provide a highly reliable silicon gel-filled hybrid integrated circuit device that does not cause pad separation even when a severe heat cycle is applied.

【0032】また、本発明に依れば、シリコンゲルと熱
硬化性樹脂の充填のための開口部を単一方向に形成した
ケース材の外部リード固着領域およびシリコンゲル上部
に熱硬化性樹脂を同時充填することができ、シリコンゾ
ルの飛散等による外部リード固着部の汚染の問題が解決
されると共に、熱硬化性樹脂充填を一回で完了すること
ができる。
Further, according to the present invention, the thermosetting resin is provided on the outer lead fixing region of the case material in which the opening for filling the silicone gel and the thermosetting resin is formed in a single direction and on the upper portion of the silicon gel. Simultaneous filling is possible, and the problem of contamination of the external lead fixing portion due to scattering of silicon sol or the like can be solved, and filling of the thermosetting resin can be completed in a single operation.

【0033】さらに、本発明の依れば、壁体の内面にシ
リコンゲルのはい上りを防止する第1の突出部と熱硬化
性樹脂と咬止状態となる第2の突出部が設けられている
ことにより、条件の極めて厳しい熱衝撃試験を行ったと
してもシリコンゲルの伸縮・膨張によりシリコンゲル上
に積層された熱硬化性樹脂が剥離されることがない。そ
の結果、熱衝撃に強い信頼性の優れた混成集積回路装置
を提供することができる。
Further, according to the present invention, the first protrusion for preventing the silicone gel from rising and the second protrusion for engaging with the thermosetting resin are provided on the inner surface of the wall. Accordingly, even when a thermal shock test under extremely severe conditions is performed, the thermosetting resin laminated on the silicon gel is not peeled off due to expansion and contraction and expansion of the silicon gel. As a result, a highly reliable hybrid integrated circuit device resistant to thermal shock can be provided.

【0034】さらに、本発明に依れば、上述したように
第1及び第2の突出部を設けることにより、シリコンゲ
ルと熱硬化性樹脂とが積層された構造の混成集積回路装
置の厚みを最小限薄くできる。
Further, according to the present invention, by providing the first and second protrusions as described above, the thickness of the hybrid integrated circuit device having the structure in which the silicon gel and the thermosetting resin are laminated is reduced. Can be minimally thin.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明を示す斜視図である。FIG. 1 is a perspective view showing the present invention.

【図2】図1のA−A断面図である。FIG. 2 is a sectional view taken along line AA of FIG.

【図3】ケース材の斜視図である。FIG. 3 is a perspective view of a case member.

【図4】図3の平面図である。FIG. 4 is a plan view of FIG. 3;

【図5】図4のA−A断面図である。FIG. 5 is a sectional view taken along line AA of FIG. 4;

【図6】第1及び第2の突出部を示す要部断面図であ
る。
FIG. 6 is a sectional view of a main part showing first and second protrusions;

【図7】第1の絶縁金属基板の斜視図である。FIG. 7 is a perspective view of a first insulating metal substrate.

【図8】ケース材と第1の金属基板とを一体化した斜視
図である。
FIG. 8 is a perspective view in which a case material and a first metal substrate are integrated.

【図9】第2の絶縁金属基板を示す斜視図である。FIG. 9 is a perspective view showing a second insulating metal substrate.

【図10】従来例を示す断面図である。FIG. 10 is a sectional view showing a conventional example.

【符号の説明】[Explanation of symbols]

1 第1の突出部 2 第2の突出部 10 ケース材 12 枠 16 集積回路素子搭載領域 18 外部リード固着領域 30 第1の絶縁金属基板 32 絶縁層 38 外部リード用パッド 40 ワイアボンディングパッド 42 ダイボンドパッド 44 外部リード端子 46 集積回路素子 50 第2の絶縁金属基板 52 絶縁層 56 シリコンゲル 57 シリコン接着剤 58A 第1の熱硬化性樹脂 58B 第2の熱硬化性樹脂 DESCRIPTION OF SYMBOLS 1 1st projecting part 2 2nd projecting part 10 case material 12 frame 16 integrated circuit element mounting area 18 external lead fixing area 30 first insulating metal substrate 32 insulating layer 38 external lead pad 40 wire bonding pad 42 die bond pad 44 external lead terminal 46 integrated circuit element 50 second insulating metal substrate 52 insulating layer 56 silicon gel 57 silicon adhesive 58A first thermosetting resin 58B second thermosetting resin

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01L 23/28,23/24──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 23 / 28,23 / 24

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 絶縁金属基板に形成した回路パターン上
に複数の集積回路素子および外部リード端子を固着、搭
載した集積回路基板と、前記集積回路素子搭載領域と前
記外部リード端子固着領域とを分割する壁体を備える略
枠状の樹脂製ケース材と、前記集積回路素子搭載空間内
に順次積層されたシリコンゲルおよび第1の熱硬化性樹
脂と、前記外部リード端子導出領域の空間に充填される
第2の熱硬化性樹脂とを具備し、前記壁体の底面に対応する前記絶縁金属基板表面には、
オーバーコート膜が被覆され、前記壁体の底面には、前
記絶縁金属基板表面との間に、半田ボールが飛散しても
この空間に半田ボールが配置される間隔だけ離間されて
なる空間が設けられ、 この空間に接着性樹脂が設けられ
ることを特徴とする混成集積回路装置。
An integrated circuit board on which a plurality of integrated circuit elements and external lead terminals are fixed and mounted on a circuit pattern formed on an insulating metal substrate, and the integrated circuit element mounting area and the external lead terminal fixing area are divided. A substantially frame-shaped resin case material having a wall body to be formed, silicon gel and a first thermosetting resin sequentially laminated in the integrated circuit element mounting space, and filled in the space of the external lead terminal lead-out area. A second thermosetting resin, the surface of the insulating metal substrate corresponding to the bottom surface of the wall,
An overcoat film is coated, and the bottom surface of the wall is
Even if solder balls scatter between the insulating metal substrate surface
It is separated by the space where the solder balls are placed in this space
A hybrid integrated circuit device , wherein a space is provided, and an adhesive resin is provided in the space.
【請求項2】 絶縁金属基板に形成した回路パターン上
に複数の集積回路素子および外部リード端子を固着、搭
載した集積回路基板と、前記集積回路素子搭載領域と前
記外部リード端子固着領域とを分割し前記外部リード端
子固着パッド近傍に配置された壁体を少なくとも備え、
且つシリコンゲルと熱硬化性樹脂の充填のための開口部
を有した略枠状の樹脂製ケース材と、前記集積回路素子
搭載空間内に順次積層されたシリコンゲルおよび第1の
熱硬化性樹脂と、前記外部リード端子導出領域の空間に
充填される第2の熱硬化性樹脂とを具備し、前記壁体の底面に対応する前記絶縁金属基板表面には、
オーバーコート膜が被覆され、前記壁体の底面には、前
記絶縁金属基板表面との間に、半田ボールが飛散しても
この空間に半田ボールが配置される間隔だけ離間されて
なる空間が設けられ、且つ この空間に接着性樹脂が設け
られており、 前記壁体の内面に、前記シリコンゲルの界面と実質的に
同一面となる位置に前記シリコンゲルのはい上がりを防
止する第1の突出部を断続的に設け、その第1の突出部
より上段で且つ重畳しない領域に前記第1の熱硬化性樹
脂と咬止状態となる第2の突出部を設けて成ることを特
徴とする混成集積回路装置。
2. An integrated circuit board on which a plurality of integrated circuit elements and external lead terminals are fixed and mounted on a circuit pattern formed on an insulating metal substrate, and the integrated circuit element mounting area and the external lead terminal fixing area are divided. And at least a wall disposed near the external lead terminal fixing pad,
A substantially frame-shaped resin case material having an opening for filling the silicon gel and the thermosetting resin; a silicon gel and a first thermosetting resin sequentially laminated in the integrated circuit element mounting space; And a second thermosetting resin filled in the space of the external lead terminal lead-out region, and the surface of the insulating metal substrate corresponding to the bottom surface of the wall,
An overcoat film is coated, and the bottom surface of the wall is
Even if solder balls scatter between the insulating metal substrate surface
It is separated by the space where the solder balls are placed in this space
A space is provided, and an adhesive resin is provided in this space. The silicon gel is prevented from rising at a position on the inner surface of the wall which is substantially flush with the interface of the silicon gel. A first protruding portion provided intermittently, and a second protruding portion which is in a state of being engaged with the first thermosetting resin is provided in a region above the first protruding portion and not overlapping with the first protruding portion. A hybrid integrated circuit device characterized by the following.
JP16918392A 1992-06-26 1992-06-26 Hybrid integrated circuit device Expired - Lifetime JP2854192B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16918392A JP2854192B2 (en) 1992-06-26 1992-06-26 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16918392A JP2854192B2 (en) 1992-06-26 1992-06-26 Hybrid integrated circuit device

Publications (2)

Publication Number Publication Date
JPH0613500A JPH0613500A (en) 1994-01-21
JP2854192B2 true JP2854192B2 (en) 1999-02-03

Family

ID=15881782

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16918392A Expired - Lifetime JP2854192B2 (en) 1992-06-26 1992-06-26 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JP2854192B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102010063048A1 (en) * 2010-12-14 2012-06-21 Robert Bosch Gmbh Method for producing an electronic assembly with molded bodies

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01313964A (en) * 1988-06-13 1989-12-19 Mitsubishi Electric Corp Semiconductor device
JPH0464255A (en) * 1990-07-03 1992-02-28 Mitsubishi Electric Corp Semiconductor device
JP3122546U (en) * 2006-04-05 2006-06-15 雅博 長勢 Piping structure to the building wall

Also Published As

Publication number Publication date
JPH0613500A (en) 1994-01-21

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