JP2846310B1 - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

To provide a semiconductor device having a structure in which deterioration of characteristics due to stress acting on a capacitor can be suppressed and the capacitor can exhibit excellent characteristics. A semiconductor device is formed on a support substrate on which a semiconductor integrated circuit is formed, the capacitor having a lower electrode, a capacitor insulating film, and an upper electrode, and is formed so as to cover the capacitor. The first protection insulating film and the first protection insulating film, the first protection insulating film being electrically connected to the semiconductor integrated circuit and the capacitor via a first contact hole provided in the first protection insulating film. The first selectively formed on the insulating film
And a wiring layer formed to cover the first wiring layer.
A second protective insulating film made of an ozone TEOS film;
The second wiring, which is electrically connected to the first wiring layer through a second contact hole provided in the protective insulating film of
A second wiring layer selectively formed on the protective insulating film, and a third protective insulating film formed so as to cover the second wiring layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a capacitive element using a dielectric film or a ferroelectric film having a high dielectric constant as a capacitive insulating film, and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, as the functions of consumer electronic devices have become more sophisticated with the speeding up and lower power consumption of microcomputers, the miniaturization of semiconductor elements in semiconductor devices used therein has been rapidly increasing. Evolving. Along with this, unnecessary radiation, which is electromagnetic noise generated from electronic and electrical equipment, has become a major problem.

In order to reduce this unnecessary radiation, a large-capacity capacitive element is used for a semiconductor element or the like by using a dielectric film having a high dielectric constant (hereinafter referred to as "high dielectric substance") as a capacitive insulating film. Built-in technology is gaining attention. Furthermore, with the high integration of dynamic RAMs (DRAMs), techniques for using a high dielectric film instead of a conventionally used silicon oxide film or silicon nitride film as a capacitor insulating film have been widely studied. ing.

Further, in order to realize a non-volatile RAM which can operate at a low voltage and can perform high-speed writing and reading, research and development on ferroelectric films having spontaneous polarization characteristics have been actively conducted. ing.

The most important issue in realizing a semiconductor device having the above-mentioned features is to develop a structure capable of realizing multilayer wiring without deteriorating the characteristics of a capacitor, and a process for manufacturing the same.

Hereinafter, an example of a conventional method for manufacturing a semiconductor device will be described with reference to the drawings. FIG.
0 (a) to (e) are cross-sectional views illustrating each step of a method for manufacturing a certain conventional semiconductor device 500.

First, as shown in FIG. 10A, a gate electrode 1 and source / drain regions 3 are formed on a support substrate 1.
MOS field effect transistor (MOSFET)
Is formed, and an insulating layer 5 for element isolation is formed. An interlayer insulating film 6 is formed thereon, and a film serving as a lower electrode 7 of the capacitor 10 is formed thereon by a sputtering method or an electron beam evaporation method. Subsequently, a capacitor insulating film 8 formed of a high dielectric or ferroelectric is formed thereon by an organic metal deposition method, a metal organic chemical vapor deposition method, or a sputtering method, and furthermore, an upper electrode 9 is formed thereon. Films are sequentially formed by a sputtering method or an electron beam evaporation method. Thereafter, the stacked films 7, 8, and 9 are patterned into a desired shape to form the capacitor 10.

Next, as shown in FIG. 10B, a first protective insulating film 11 covering the capacitive element 10 is formed on the interlayer insulating film 6. Then, a contact hole 12 penetrating through the first protective insulating film 11 and reaching the lower electrode 7 or the upper electrode 9 of the capacitor 10, and a source / source through the first protective insulating film 11 and the interlayer insulating film 6. Contact holes 13 reaching the drain region 3 and the like are respectively formed. Then, a conductive film is formed on the first protective insulating film 11 and in the contact holes 12 and 13 by sputtering, and is further patterned into a predetermined shape to form the integrated circuit 4 and the capacitor 1.
A first wiring layer 14 for electrically connecting the first wiring layer to the first wiring layer is formed.
After that, heat treatment is performed. Next, as shown in FIG. 10C, a second protective insulating film 15 covering the first wiring layer 14 is formed on the structure formed up to now.
The second protective insulating film 15 is formed of a silicon oxide film (hereinafter, referred to as a “plasma TEOS film”) formed by plasma CVD using tetraethyl orthosilicate (TEOS) in a plasma state, or as described above. It is formed by almost flattening a laminated film of a plasma TEOS film and a silicon-on-glass (SOG) film by an etch-back method.

Thereafter, as shown in FIG. 10D, a contact hole 16 penetrating through the second protective insulating film 15 and reaching the first wiring layer 14 is formed. Then, the second wiring layer 17 electrically connected to the first wiring layer 14 is
Is selectively formed on the protective insulating film 15 and the inside of the contact hole 16, and further heat treatment is performed.

[0010] Finally, as shown in FIG.
A third protective insulating film 18 covering the wiring layer 17 is formed on the structure thus far formed. Through the above steps, the conventional semiconductor device 500 is formed.

[0011]

In the above-described method of manufacturing the conventional semiconductor device 500, the second protective insulating film 15 is formed.
Need to be formed without any steps and with a sufficiently smooth upper surface and sufficient step coverage characteristics. This is because if there is a step in the second protective insulating film 15, the second wiring layer 17
However, this is because there is a risk of being interrupted at the step. For this reason, the second protective insulating film 15 according to the above-described prior art made of the plasma TEOS film is formed on the upper electrode 9
In the upper part of the first wiring layer 14 formed thereon, the thickness h ₁ (see FIG. 10C) is about 1 μm or more, and the capacitance insulating film made of a high dielectric film or a ferroelectric film. On the first protective insulating film 11 formed on the edge portion 8, the thickness h ₂ (see FIG. 10C) needs to be set to about 2 μm or more.

However, in general, if the force per unit film thickness is constant, the thicker the film, the stronger the tensile stress or compressive stress acts. Therefore, when the thick second protective insulating film 15 is formed as in the above-described conventional configuration, a large stress acts on the capacitive element 10 located thereunder.

In particular, a second method using a plasma TEOS film
When the protective insulating film 15 is formed, a compressive stress acts on the capacitive insulating film 8 so as to prevent polarization of the dielectric material forming the capacitive insulating film 8. As a result, the physical characteristics of the capacitor insulating film 8 made of a high dielectric film or a ferroelectric film are deteriorated.

The "stress" described in the specification of the present application
Is the force that shrinks the membrane (hereinafter "tensile stress")
And / or force to expand the membrane (hereinafter referred to as
(Referred to as "compressive stress").

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and its objects are to achieve the following: (1) To suppress the deterioration of characteristics due to stress acting on a capacitive element, and to provide an excellent capacitive element. It is to provide a semiconductor device having a structure capable of exhibiting characteristics, and (2) to provide a method for manufacturing such a semiconductor device.

[0016]

According to the present invention, there is provided a semiconductor device comprising:
A capacitor having a lower electrode, a capacitor insulating film, and an upper electrode formed on a support substrate on which a semiconductor integrated circuit is formed; a first protective insulating film formed to cover the capacitor; Selectively over the first protective insulating film electrically connected to the semiconductor integrated circuit and the capacitor through a first contact hole provided in the first protective insulating film. A second wiring layer formed of an ozone TEOS film and formed to cover the first wiring layer and the first wiring layer;
Protective insulating film, and a second protective insulating film provided on the second protective insulating film.
A second wiring layer selectively formed on the second protective insulating film, the second wiring layer being electrically connected to the first wiring layer through the contact hole of And a third protective insulating film formed so as to cover the semiconductor device, thereby achieving the above object.

In one embodiment, the capacitance insulating film is formed of a dielectric film having a high dielectric constant or a ferroelectric film.

In one embodiment, the second wiring layer includes:
The capacitor is formed on the second protective insulating film so as to cover at least a part of the capacitor.

[0019] The third protective insulating film may be a laminated film of a silicon oxide film and a silicon nitride film.

In one embodiment, a hydrogen supply film formed in a region between the first wiring layer and the second protective insulating film except for a portion where the capacitive element is formed is further provided. Have.

The first wiring layer is a laminated film of titanium, titanium nitride, aluminum, and titanium nitride; a laminated film of titanium, titanium nitride, and aluminum; a laminated film of titanium, titanium tungsten, aluminum, and titanium tungsten; Alternatively, it may be a laminated film of titanium, titanium tungsten, and aluminum.

[0022] Preferably, Si-OH bonds absorption coefficient of the second protective insulating film for the wavelength corresponding to 3450 cm ^-1 is 800 cm ^-1 or less.

Preferably, the second protective insulating film has a thickness of 1
× 10 ⁷ dyn / cm ² or more and 3 × 10 ⁹ dyn / cm ²
It has the following tensile stress.

Preferably, the thickness of the second protective insulating film is 0.3 μm or more and 1 μm or less.

The second wiring layer may be a laminated film of titanium, aluminum and titanium nitride, a laminated film of titanium and aluminum, or a laminated film of titanium, aluminum and titanium tungsten.

In the method of manufacturing a semiconductor device according to the present invention, a step of sequentially forming a lower electrode, a capacitor insulating film and an upper electrode on a supporting substrate on which a semiconductor integrated circuit is formed to form a capacitor element; Forming a first protective insulating film so as to cover the capacitive element, forming a first contact hole in the first protective insulating film, electrically connecting the semiconductor integrated circuit and the capacitive element to each other; Selectively forming a first wiring layer to be connected in the first contact hole and in a predetermined region on the first protective insulating film; and forming a first wiring layer covering the first wiring layer. Forming a second protective insulating film from an ozone TEOS film, performing a first heat treatment on the second protective insulating film, and forming a second contact hole in the second protective insulating film. , A second electrically connected to the first wiring layer.
Selectively forming the wiring layer in the second contact hole and a predetermined region on the second protective insulating film, and performing a second heat treatment on the second wiring layer Forming a third protective insulating film covering the second wiring layer;
Which achieves the above-mentioned object.

In one embodiment, the capacitor insulating film is formed of a dielectric film having a high dielectric constant or a ferroelectric film.

In one embodiment, the method further includes a step of using the second wiring layer as a mask to etch back the second protective insulating film until the first wiring layer is not exposed.

In one embodiment, the second wiring layer includes:
The capacitor is formed on the second protective insulating film so as to cover at least a part of the capacitor.

In one embodiment, the third protective insulating film is formed as a laminated film of a silicon oxide film and a silicon nitride film, and the silicon oxide film is formed by a normal pressure CVD method or a low pressure CVD method.
Silane, disilane, or ozone TEOS is formed so as to have a tensile stress by a plasma CVD method.

In one embodiment, after the formation of the first wiring layer, a hydrogen supply film is formed on the first wiring layer except for a region where the capacitor is formed, and thereafter, a third supply layer is formed. The method further includes a step of performing a heat treatment.

The hydrogen supply film can be formed from a silicon nitride film or a silicon nitride oxide film by a plasma CVD method.

Preferably, the third heat treatment after the formation of the hydrogen supply film is performed at a temperature of 300 ° C. or more and 450 ° C. or less.

Preferably, the third heat treatment after the formation of the hydrogen supply film is performed in an atmosphere of oxygen, nitrogen, argon, or a mixed gas thereof.

The first protective insulating film may be constituted by a silicon oxide film formed using silane, disilane, or ozone TEOS by a normal pressure CVD method or a low pressure CVD method.

The first protective insulating film may be constituted by a phosphorus-doped silicon oxide film formed by a normal pressure CVD method or a low pressure CVD method.

Preferably, the ozone concentration when forming the second protective insulating film using the ozone TEOS film is set to 5.5% or more.

Preferably, the second protective insulating film after the first heat treatment is not less than 1 × 10 ⁷ dyn / cm ² and 2 × 10 ⁷ dyn / cm ^2.
It has a tensile stress of 10 ⁹ dyn / cm ² or less.

Preferably, the first heat treatment is performed at 300
It is carried out at a temperature of not less than 450C and not more than 450C.

Preferably, the first heat treatment is performed in an atmosphere containing at least oxygen.

Preferably, the second heat treatment is performed at 300
It is carried out at a temperature of not less than 450C and not more than 450C.

Preferably, the second heat treatment comprises nitrogen,
The operation is performed in an atmosphere including at least one of argon and helium.

According to the present invention described above, the second protective insulating film is formed using the ozone TEOS film which reflows at the time of film formation, so that the second protective insulating film can be formed even at a position corresponding to a position above the capacitive element. Without increasing the thickness of the protective insulating film (specifically, with a thickness of about 1 μm or less), the upper surface thereof can be made sufficiently smooth without generating a step, and sufficient step coverage can be obtained. Since the second protective insulating film thus formed may be thin, according to the present invention, the stress acting on the formed capacitive element is reduced.

Further, if the ozone TEOS film is used, since the direction of the acting stress is the tensile stress, the deterioration of the characteristics of the capacitive element due to the stress is suppressed.

If the second wiring layer is formed on the second protective insulating film so as to cover at least a part of the capacitive element, the stress acting on the capacitive element from the third protective insulating film can be reduced. Can be offset by the second wiring layer formed thereon, so that stress acting on the capacitor is reduced.

If the third protective insulating film is a laminated film of a silicon oxide film and a silicon nitride film, the stress of the silicon oxide film at the time of film formation is tensile stress.
By forming a silicon nitride film having a large compressive stress formed by plasma CVD thereon, the stress applied to the third protective insulating film is cancelled, and as a result, acts on the capacitor. The effects of stress are reduced.

If the hydrogen supply film as described above is provided, the hydrogen supply film is annealed (heat treated) to transfer the hydrogen contained therein to the support substrate on which the semiconductor integrated circuit is formed. By thermally diffusing the support substrate, the support substrate (semiconductor integrated circuit) can be recovered from damage caused during the manufacturing process. As the hydrogen supply film, a silicon nitride film or a silicon nitride oxide film containing sufficient hydrogen can be used. If the annealing (heat treatment) after the formation of the hydrogen supply film is performed in an atmosphere of oxygen, nitrogen, argon, or a mixed gas thereof, thermal diffusion of hydrogen is performed smoothly.

If the first wiring layer and / or the second wiring layer is formed of the above-mentioned laminated film, a highly reliable wiring layer free from penetration of constituent materials can be obtained.

In the ozone TEOS film, which is the second protective insulating film, SiO for a wavelength corresponding to 3450 cm ^-1
If the -OH bond absorption coefficient is 800 cm ^-1 or less, the amount of water contained in the ozone TEOS film can be reduced as much as possible, and water (especially OH groups and H groups) in the capacitance element can be reduced.
And cracks caused by heat treatment after the film formation process can be suppressed.

The stress of the ozone TEOS film as the second protective insulating film is 1 × 10 ⁷ dyn / cm ² or more and 3
If the tensile stress is not more than × 10 ⁹ dyn / cm ² , adverse effects on the capacitive element (for example, undesired suppression of polarization) due to the stress applied from the ozone TEOS film to the capacitive element are reduced. Thus, the characteristics of the capacitor are improved. Note that this effect largely depends on the fact that the stress is tensile stress. Even if the absolute amount of the stress is the same, the plasma TEOS
In the case of the ozone TEOS film as in the present invention, the capacitor exhibits more preferable characteristics as compared with the case of the compressive stress generated in the film.

Further, a second protective insulating film (ozone TEOS)
By setting the thickness of the (film) in the range of 0.3 μm to 1 μm and thinning, the reduction of the internal stress of the ozone TEOS film and the reduction of the stress applied to the capacitor element therefrom are realized. The characteristics of the capacitor are improved. If the second protective insulating film is etched back using the second wiring layer as a mask, a second region corresponding to a region above the capacitor (usually a region where the second wiring layer is not formed) is obtained.
Can be further reduced in thickness (for example, 0.5 μm or less), and the above-described effect of reducing stress and the effect of suppressing characteristic deterioration due to stress can be further improved.

Further, ozone T as a second protective insulating film
If the ozone concentration at the time of forming the EOS film is set as high as 5.5% or more, the stress of the formed ozone TEOS film is reduced, the water content thereof is reduced, and cracks are generated during the heat treatment. Is also suppressed, and the characteristics of the capacitor are improved.

The first protective insulating film is formed by a normal pressure CVD method or a low pressure CVD method using a silicon oxide film formed using a silane, disilane or ozone TEOS film, or a normal pressure CVD method or a low pressure CVD method. With the use of the formed phosphorus-doped silicon oxide film, a reliable protective insulating film is formed.

The heat treatment (first heat treatment) for the second protective insulating film (ozone TEOS film) is performed at a temperature of 300 ° C. or more and 45 ° C.
By performing the process at a temperature of 0 ° C. or less, the ozone TEOS film can be densified. Further, when the above heat treatment is performed in an atmosphere containing oxygen, supply of oxygen to the capacitor insulating film is realized, and characteristics of the capacitor are improved.

On the other hand, heat treatment for the second wiring layer (second heat treatment)
The heat treatment) is preferably performed under the above conditions, whereby densification and low stress of the second wiring layer are achieved.

[0056]

BEST MODE FOR CARRYING OUT THE INVENTION

First Embodiment FIGS. 1A to 1E are cross-sectional views illustrating each step of a method for manufacturing a semiconductor device 100 according to a first embodiment of the present invention.

First, as shown in FIG. 1A, an integrated circuit 4 including a MOSFET having a gate electrode 1 and a source / drain region 3 on a supporting substrate 1 made of a material such as silicon, and a device isolation. And an insulating layer 5 for use. An interlayer insulating film 6 is formed thereon, and a film serving as a lower electrode 7 of the capacitor 10 is formed thereon by a sputtering method or an electron beam evaporation method. Subsequently, a capacitor insulating film 8 formed of a high dielectric or ferroelectric is formed thereon.
Is formed sequentially by an organic metal deposition method, an organic metal chemical vapor deposition method, or a sputtering method, and a film to be the upper electrode 9 is formed thereon by a sputtering method or an electron beam evaporation method. Thereafter, the stacked films 7, 8, and 9 are patterned into a desired shape to form the capacitor 10.

The formation of the interlayer insulating film 6 may be omitted, and the capacitive element 10 may be formed directly on the element isolating insulating film 5. This is the same in the embodiments described below.

Lower electrode 7 and upper electrode 9 of capacitive element 10
Is platinum, palladium, ruthenium, ruthenium oxide,
Formed using iridium, iridium oxide, or the like;
Can be Also, the capacitor insulating film 8 is made of a high dielectric material.
When used, the dielectric constant is 20 to 500.
Such a material may be used. Alternatively, the capacitance insulating film 8
When using a ferroelectric material for
Polarization without applying pressure (remnant polariza
) can be used. Specifically, capacity
A high dielectric material or a ferroelectric material constituting the edge film 8
And Ba_1-xSr_xTiO_Three, SrTiO_Three, Ta_TwoO_Five, P
bZr_1-xTi_xO_Three, SrBi_TwoTa_TwoO ₉, SrBi_TwoT
a_xNb_1-xO₉Etc. may be used.

Next, as shown in FIG. 1B, as the first protective insulating film 111 covering the capacitance element 10, thermal CVD using gaseous TEOS under a normal pressure atmosphere containing ozone as a source gas. A silicon oxide film 111 (hereinafter, referred to as an “ozone TEOS film”) is formed on the interlayer insulating film 6 by a method. Then, the contact hole 12 penetrating through the first protective insulating film 111 to reach the lower electrode 7 or the upper electrode 9 of the capacitor 10 and the first protective insulating film 111
And a contact hole 13 penetrating through the gate insulating film 6 and reaching the source / drain region 3 and the like. Then, a laminated film of titanium, titanium nitride, aluminum, and titanium nitride is formed on the first protective insulating film 111 and in the contact holes 12 and 13 by a sputtering method or the like, and is further patterned into a predetermined shape. Then, a first wiring layer 14 electrically connected to the integrated circuit 4 and the capacitor 10 is formed.

Next, as shown in FIG. 1C, the integration is performed on the first protective insulating film 111 on which the first wiring layer 14 is formed and in a region excluding the portion where the capacitor 10 is formed. Circuit 4
Hydrogen supply film 19 for supplying hydrogen to plasma CV
Formed by Method D. Thereafter, in order to thermally diffuse hydrogen in the hydrogen supply film 19, annealing is performed at about 450 ° C. for about 1 hour in an oxygen atmosphere. The hydrogen supply film 19 is formed of, for example, a silicon nitride film or a silicon nitride oxide film, and has a sufficient amount of hydrogen therein.

In the annealing process, hydrogen is diffused by thermal diffusion from the hydrogen supply film 19 to the support substrate 1 on which the integrated circuit 4 is formed, so that the integrated circuit 4 is at a temperature of 600 ° C. or more necessary for forming the capacitive insulating film. This is carried out in order to recover the damage received in the dry etching step for forming the contact 13 during the oxygen annealing step at a temperature of not less than about 300 ° C. and about 45 ° C.
The temperature may be 0 ° C. or lower. Further, instead of the oxygen atmosphere, the annealing may be performed in a nitrogen atmosphere or an argon atmosphere, or a mixed gas atmosphere containing oxygen such as a mixed gas of oxygen and nitrogen and / or argon.

Next, an ozone TEOS film as a second protective insulating film 151 covering the first wiring layer 14 is formed on the structure thus far formed. The ozone TEOS film is self-reflowing at the time of film formation, is a thin film, has no steps, and has a sufficiently smooth upper surface. The second protective insulating film 1 has good step coverage characteristics.
51 can be formed.

The above point will be further described with reference to FIGS. 11 (a) and 11 (b).

FIG. 11A shows a silicon oxide film (plasma TEOS film) 15 covering a wiring pattern 50 formed on a substrate surface 51 by a conventional plasma CVD method.
1 schematically shows a cross-sectional shape in the case where is formed. On the other hand, FIG. 11B shows that a silicon oxide film (ozone TEOS film) 151 covering the wiring pattern 50 formed on the substrate surface 51 is formed by a thermal CVD method in an atmosphere containing ozone as in the present invention. The cross-sectional shape in the case of performing the above is schematically shown.

In the plasma CVD, solid silicon oxide particles are formed in the plasma (in the gas phase) and adhere to the substrate surface 51 and the surface of the wiring pattern 50. Therefore, the adhesion probability is equal in any place, and as a result, the formed plasma TEOS film 15 has a region 52 corresponding to a region above the wiring pattern 50 and a region corresponding to a region between the adjacent wiring patterns 50. 53 also has substantially the same thickness. Therefore, the formed plasma TEOS film 15
In order to make the upper surface smooth, it is necessary to form the plasma TEOS film 15 thick.

On the other hand, in the thermal CVD method in an atmosphere containing ozone, gaseous TEOS as a source gas reacts with oxygen on the substrate surface 51 and the surface of the wiring pattern 50,
Silicon oxide is formed. At this time, this reaction is more likely to occur in a region 53 corresponding to a region between adjacent wiring patterns 50 than in a region 52 corresponding to a region above the wiring pattern 50. Therefore, the formed ozone TEOS film 15
1 is formed so as to fill the area 53 first, and then gradually spreads to the area 52 (self-reflow). Therefore, even though the ozone TEOS film 151 is relatively thin, its upper surface is smooth.

For example, the ozone TEOS film
Disconnect the second wiring layer 17 on the second protective insulating film 151;
Thickness of the second protective insulating film 151 necessary for forming
The first is the first electrode formed on the upper electrode 9 of the capacitor 10.
H above the wiring layer 14 _Three(See FIG. 1 (c)) = about
0.8 μm, composed of high dielectric or ferroelectric film
A first portion formed on the edge portion of the formed capacitance insulating film 8
On the protective insulating film 111, h_Four(See FIG. 1 (c)) =
It is about 0.5 μm. Therefore, the plasm in the prior art
When forming a second protective insulating film with a TEOS film
Compared to a
It is possible to achieve the coverage characteristics.

The ozone in the above process is
As an active element, it enables the formation reaction of silicon oxide at lower temperatures.

Subsequently, as a first heat treatment, about 450 ° C.
Is performed in an oxygen atmosphere for about 1 hour to densify the ozone TEOS film as the second protective insulating film 151 and supply oxygen to the capacitor 10.

Thereafter, as shown in FIG.
A contact hole 16 penetrating through the protective insulating film 151 and reaching the first wiring layer 14 is formed. Then, a laminated film of titanium, aluminum, and titanium nitride is formed on the second protective insulating film 151 and inside the contact hole 16 by a sputtering method or the like, and is further patterned into a predetermined shape to form the first film. A second wiring layer 17 electrically connected to the wiring layer 14 is formed. Then, as a second heat treatment, about 4
Annealing is performed in a nitrogen atmosphere at 00 ° C. for about 30 minutes to make the second wiring layer 17 denser and lower in stress.

Finally, as shown in FIG. 1E, as a third protective insulating film 18 covering the second wiring layer 17, a silicon nitride film formed by a plasma CVD method is formed on the structure previously formed. Formed. Through the above steps, the semiconductor device 100 according to the first embodiment of the present invention is formed.

As described above, according to the configuration of the semiconductor device 100 of the present embodiment using the ozone TEOS film as the second protective insulating film 151, sufficient step coverage can be obtained. The thickness of the portion of the capacitor 151 located above the capacitive element 10 can be reduced. Thereby, the stress acting on the capacitor 10 is reduced.

The hydrogen supply film 19 provided in the above description can be omitted if the integrated circuit 4 is not damaged during the manufacturing process. FIG. 2 shows a configuration (cross-sectional view) of the semiconductor device 150 in that case.
Even in the configuration shown in FIG. 2, the characteristics of the capacitor 10 are the same as those of the semiconductor device 100 having the configuration manufactured by the process described with reference to FIGS.
Be equivalent. In addition, in the configuration of FIG.
The same components as those shown in (e) are denoted by the same reference numerals, and description thereof is omitted here.

As described above, the formation of ozone TEOS in the above-described manufacturing process is performed by a thermal CVD method of forming a silicon oxide film on a substrate by simultaneously supplying gaseous TEOS as raw material gas and ozone. And
Plasma excitation during formation is not required.

FIG. 3 shows the case where the second protective insulating film 151 made of the ozone TEOS film is used as described above, and the case where the second protective insulating film made of the plasma TEOS film is used as in the prior art. For each, SrBi ₂ Ta ₂
FIG. 9 is a diagram comparing the characteristics (specifically, the amount of remanent polarization and the dielectric strength) of the capacitive element 10 formed with the O ₉ film as the capacitive insulating film 8. In the measurement of the data of FIG.
After the film was formed to a thickness of 4 μm, it was formed to a thickness of 1.5 μm by a resist etch-back method. On the other hand, the ozone TEOS film according to the first embodiment of the present invention was formed to a thickness of 1 μm without using an etch-back method.

In the measurement of the data in FIG. 3, the amount of remanent polarization was determined by preparing a sample in which 110 capacitor elements each having an electrode area of 23 μm ² and each having the above-described structure were connected in parallel, and the RT6000A Ferroelectric Tester was used. The measurements were made by On the other hand, the dielectric strength was measured for the above sample by HP4195B.

FIG. 3 shows that the plasma TE according to the prior art
When the OS film is used, the formed capacitor has a residual polarization of 3 μC / cm ² and a withstand voltage of 7 V. On the other hand, when the ozone TEOS film according to the present invention is used,
The formed capacitor has a residual polarization of 10 μC / cm ² ,
And the withstand voltage was 30V. Thus, according to the first embodiment of the present invention, the amount of remanent polarization is 7 μC /
cm ² and a withstand voltage of 23 V were realized.

(Second Embodiment) FIGS. 4A to 4E
Is a semiconductor device 200 according to the second embodiment of the present invention.
FIG. 6 is a cross-sectional view illustrating each step of the manufacturing method. In the present embodiment, unlike the first embodiment, after forming the second protective insulating film 151 using an ozone TEOS film, the second protective insulating film 151 is formed using the second wiring layer 17 as a mask. Are selectively etched back.

First, the steps shown in FIGS. 4A to 4C are performed. However, these steps are the same as the steps described with reference to FIGS. 1A to 1C in the first embodiment. Corresponding components have the same reference numbers allotted, and description thereof will not be repeated here.

After each of the steps shown in FIGS. 4A to 4C, the second protective insulating film 151 is formed as shown in FIG.
Contact hole 1 penetrating through and reaching first wiring layer 14
6 is formed. Then, a laminated film of titanium, aluminum, and titanium nitride is formed on the second protective insulating film 151 and inside the contact hole 16 by a sputtering method or the like, and is further patterned into a predetermined shape to form the first film. A second wiring layer 17 electrically connected to the wiring layer 14 is formed.

After that, using the second wiring layer 17 as a mask, the second protective insulating film 151 is etched back until the first wiring layer 14 is not exposed. Thereafter, as a second heat treatment, an annealing treatment is performed at about 400 ° C. for about 30 minutes in a nitrogen atmosphere to make the second wiring layer 17 dense and low stress.

Finally, as shown in FIG. 4E, as a third protective insulating film 18 covering the second wiring layer 17, a silicon nitride film formed by a plasma CVD method is formed on the structure previously formed. Formed. Through the steps described above, the semiconductor device 200 according to the second embodiment of the present invention is formed.

In general, the second wiring layer 17 is not formed in a portion of the second protective insulating film 151 located above the capacitance element 10. Therefore, as described above, the ozone TEOS film is used as the second protective insulating film 151, and
Using the second wiring layer 17 as a mask, the above-described ozone TEOS
According to the configuration of the semiconductor device 200 of the present embodiment obtained by etching back the second protective insulating film 151 made of a film, a portion of the second protective insulating film 151 located above the capacitor element 10 is formed. The thickness can be further reduced as compared with the configuration of the semiconductor device 100 of the first embodiment. Thus, the stress acting on the capacitor 10 is further reduced.

FIG. 5 shows the case where the second protective insulating film 151 made of the ozone TEOS film is etched back as described above, and the second protective insulating film 151 made of the ozone TEOS film as in the first embodiment. Is not etched back, the SrBi ₂ Ta ₂ O ₉ film is replaced with the capacitive insulating film 8.
FIG. 6 is a diagram comparing characteristics (specifically, the amount of remanent polarization and dielectric strength) of the capacitive element 10 formed as FIG. In measuring the data of FIG. 5, a second ozone TEOS film
First, the protective insulating film 151 was formed to a thickness of 1 μm. When etching back, the thickness was reduced to 0.5 μm thereafter, and when not etching back, the thickness was kept as it was. The method and conditions for measuring the amount of remanent polarization and dielectric strength are the same as those for measuring the data in FIG.

As shown in FIG. 5, when etching back of the second protective insulating film 151 is involved as in this embodiment, the first
Characteristics without an etch-back process in the embodiment (remaining polarization: 10 μC / cm ² , breakdown voltage: 30 μC / cm ²⁾
V), the amount of remanent polarization was 12 μC / cm ² and the withstand voltage was 40 V. Thus, according to the second embodiment of the present invention, as compared with the first embodiment, the amount of remanent polarization is ² μC / cm ² and the withstand voltage is 1 μC / cm ² .
An improvement of 0V was realized.

(Third Embodiment) FIGS. 6A to 6E
Is a semiconductor device 300 according to the third embodiment of the present invention.
FIG. 6 is a cross-sectional view illustrating each step of the manufacturing method. In the present embodiment, unlike the first or second embodiment, a second wiring layer 17 electrically connected to the first wiring layer 14 is provided.
Further, in the region corresponding to the upper part of the capacitive element 10, the capacitive element 10
Is formed on the second protective insulating film 151 so as to cover.

First, the steps shown in FIGS. 6A to 6C are performed. However, these steps are the same as the steps described with reference to FIGS. 1A to 1C in the first embodiment. Corresponding components have the same reference numbers allotted, and description thereof will not be repeated here.

After performing the steps shown in FIGS. 6A to 6C, as shown in FIG. 6D, the second protective insulating film 151 is formed.
Contact hole 1 penetrating through and reaching first wiring layer 14
6 is formed. Then, a stacked film of titanium, aluminum, and titanium nitride is formed on the second protective insulating film 151 and in the contact hole 16 by a sputtering method or the like. Further, the laminated film is patterned into a predetermined shape to form a second wiring layer 17 electrically connected to the first wiring layer 14. At this time, the second wiring layer 17 is patterned so as to entirely cover a region corresponding to an upper part of the capacitor 10.

Thereafter, using the second wiring layer 17 as a mask, the second protective insulating film 151 is etched back to such an extent that the first wiring layer 14 is not exposed. However, this etchback processing can be omitted, as in the examples shown in FIGS. 6D and 6E. Thereafter, as a second heat treatment, an annealing treatment is performed at about 400 ° C. for about 30 minutes in a nitrogen atmosphere to make the second wiring layer 17 dense and low stress.

Finally, as shown in FIG. 6E, as a third protective insulating film 18 covering the second wiring layer 17, a silicon nitride film formed by a plasma CVD method is formed on the structure previously formed. Formed. Through the above steps, the semiconductor device 300 according to the second embodiment of the present invention is formed.

As described above, when the second wiring layer 17 is formed on the second protective insulating film 151 so as to entirely cover the region above the capacitor 10, the third protective insulating film 18 The stress applied to the capacitor 10 is offset by the portion of the second wiring layer 17 located above the capacitor 10. As a result, the stress acting on the capacitance element 10 is further reduced sufficiently.

FIG. 7 shows the case where the second wiring layer 17 on the second protective insulating film 151 is provided so as to cover the upper part of the capacitor 10 as described above, and the first embodiment. As described above, in each of the cases where the second wiring layer 17 is not provided above the capacitive element 10, the characteristics of the capacitive element 10 in which the SrBi ₂ Ta ₂ O ₉ film is formed as the capacitive insulating film 8 (specifically, FIG. 4 is a diagram comparing remanent polarization and dielectric strength.
In measuring the data in FIG. 7, ozone TEOS
Each of the second protective insulating films 151 made of a film was formed to a thickness of 1 μm. The method and conditions for measuring the amount of remanent polarization and dielectric strength are the same as those for measuring the data in FIG.

As shown in FIG. 7, when the second wiring layer 17 on the second protective insulating film 151 is provided so as to cover the upper part of the capacitor 10 as in the present embodiment, the first embodiment In the case where the second wiring layer 17 does not exist above the capacitive element 10 in the embodiment (residual polarization 10 μC / cm ² and dielectric strength 30 V), the residual polarization is 14 μC / c.
m ² and the withstand voltage were 40 V. Thus, according to the third embodiment of the present invention, as compared with the first embodiment, the remanent polarization is improved by 4 μC / cm ² and the withstand voltage is improved by 10 V.

In the description of the third embodiment,
Although the second wiring layer 17 is formed so as to entirely cover the upper part of the capacitive element 10, the second wiring layer 17 is formed so as to cover at least a part of the upper part of the capacitive element 10. Then, the same effect as above can be obtained. For example, as shown in the top view of FIG. 8A (the top view of the configuration obtained in FIG. 6E), the second protection insulating film 151
Instead of providing the wiring layer 17 to cover the entire area above the capacitive element 10, as shown in the top view of FIG.
The second wiring layer 17 is formed in a zigzag shape in a region above the capacitor 10 or, as shown in a top view of FIG. 8C, the second wiring layer 17 is formed in a region above the capacitor 10. May be formed in a mesh shape.

It is also possible to combine any two of the first to third embodiments described above, or to combine all three.

In the above description, a silicon nitride film is used as the third protective insulating film 18. However, if a laminated film of a silicon oxide film and a silicon nitride film is used instead, 10 are further improved. Specifically, the stress of the third protective insulating film 18 is reduced by forming a silicon oxide film in a state having tensile stress and forming a silicon nitride film generally having a large compressive stress thereon. , It will be possible to offset them overall. As a result, the influence of the stress is not exerted on the capacitive element 10.

Note that the laminated film of the silicon oxide film and the silicon nitride film as the third protective insulating film 18 can be formed by normal pressure CVD using silane gas, low pressure CVD, or plasma CVD. . Also, ozone T
A silicon oxide film using EOS may be formed by a normal pressure CVD method or a low pressure CVD method, and a silicon nitride film may be formed thereon by a plasma CVD method.

FIG. 9 shows a case where a single-layer silicon nitride film is formed as the third protective insulating film 18 and a stacked film of a silicon oxide film and a silicon nitride film is formed as described above. It is a figure which compares the characteristic (specifically, the amount of remanent polarization and withstand voltage) of the capacitive element 10 formed of the SrBi ₂ Ta ₂ O ₉ film as the capacitive insulating film 8 in each case. When the data of FIG. 9 was measured, when the third protective insulating film 18 was formed of a single-layer silicon nitride film, the thickness was 0.8 μm by a plasma CVD method. On the other hand, when the third protective insulating film 18 is formed as a laminated film of a silicon oxide film and a silicon nitride film,
A silicon oxide film having a thickness of 0.1 μm was formed by a VD method, and a silicon nitride film having a thickness of 0.8 μm was formed thereon by a plasma CVD method. The method and conditions for measuring the amount of remanent polarization and dielectric strength are the same as those for measuring the data in FIG.

From FIG. 9, when the third protective insulating film 18 is a laminated film of a silicon oxide film and a silicon nitride film,
In contrast to the characteristics (residual polarization of 10 μC / cm ² and dielectric breakdown voltage of 30 V) when the third protective insulating film 18 is a single-layer silicon nitride film, the dielectric breakdown voltage is the same level but the dielectric breakdown voltage is 40 V Improved. Thus, by using the third protective insulating film 18 as a laminated film of the silicon oxide film and the silicon nitride film, the withstand voltage is improved by 10 V as compared with the first embodiment.

The third protective insulating film 18 as such a laminated film can be combined with each of the structures of the first to third embodiments described above.

In the description of each of the above embodiments, the ozone TEOS film is used as the first protective insulating film 111.
It is also possible to use a silicon oxide film formed using silane or disilane by a normal pressure CVD method or a low pressure CVD method, or a silicon oxide film further subjected to a phosphorus doping treatment.

In the description of each of the above embodiments, the first embodiment
A laminated film of titanium, titanium nitride, aluminum, and titanium nitride is used as the wiring layer 14 of, but a laminated film of titanium, titanium nitride, and aluminum, and a laminated film of titanium, titanium tungsten, aluminum, and titanium tungsten are also used. It is also possible to use a film or a laminated film of titanium, titanium tungsten and aluminum.

[0104] Ozone TEOS film as the second protective insulating film 151 in the present invention, Si-OH bonds absorption coefficient for the wavelength corresponding to 3450 cm ^-1 is desirably at 800 cm ^-1 or less. When the amount of water contained in the ozone TEOS film is reduced as much as possible, the intrusion of water, particularly OH groups and H groups, which may cause deterioration of the characteristics of the capacitor 10 into the capacitor 10 is suppressed. Cracks due to the heat treatment can be suppressed. Thereby, the characteristics of the capacitor 10 are further improved. The stress of the ozone TEOS film serving as the second protective insulating film 151 in the present invention is desirably a tensile stress of 1 × 10 ⁷ dyn / cm ² or more and 3 × 10 ⁹ dyn / cm ² or less. Accordingly, adverse effects on the capacitor due to stress applied to the capacitor from the ozone TEOS film (for example, undesired suppression of the occurrence of polarization) are reduced, and the characteristics of the capacitor are improved. When a stress outside this range is applied, the characteristic of the capacitor 10 is likely to deteriorate due to the stress.

Note that this effect largely depends on the fact that the stress is a tensile stress. Even if the absolute amount of the stress is the same, the effect is lower than that in the case of the compressive stress generated in the plasma TEOS film. Thus, in the case of the ozone TEOS film as in the present invention, the capacitance element exhibits more preferable characteristics.

It is considered that the stress in the ozone TEOS film is the tensile stress due to the following mechanism. That is, at the time of film formation, T
The EOS gas reacts with the ozone to form silicon oxide. In this process, the volume is reduced (that is, the formed silicon oxide, that is, the ozone TEOS is smaller than the sum of the volume of the TEOS gas and the volume of the ozone). The volume of the film becomes smaller). Furthermore, the subsequent heat treatment causes densification of the formed ozone TEOS film, and the film is further reduced. As a result, the ozone TEOS film has a tensile stress, and accordingly, a similar tensile stress acts on the capacitive insulating film 8 of the capacitive element 10 located below.

On the other hand, in the case of the plasma TEOS film, since silicon oxide as solid particles formed in the gas phase is deposited, no volume reduction occurs on the substrate. In addition, solid silicon oxide is densely deposited and then tends to expand. As a result, the plasma TEOS film is considered to have a compressive stress. Capacitive element 1
When compressive stress acts on the capacitive insulating film (dielectric film) 8 of zero, the generation of polarization in the direction connecting the upper electrode 9 and the lower electrode 7 (that is, in the direction perpendicular to the substrate) is suppressed. It is considered that the characteristics of the capacitor are deteriorated.

Further, the second protective insulating film 1 according to the present invention
It is desirable that the thickness of the ozone TEOS film 51 is 0.3 μm or more and 1 μm or less. Ozone TEOS
When the thickness of the film (the second protective insulating film 151) is 1 μm or more, the stress of the ozone TEOS film increases, and the possibility that the characteristic of the capacitor 10 may be deteriorated due to the stress occurs, and Cracks are easily generated by the first heat treatment in the process. On the other hand, ozone TE
The thickness of the OS film (the second protective insulating film 151) is 0.3 μm
Below this, sufficient step coverage may not be obtained, and etching residue may be generated when processing the second wiring layer 17.

Further, the second protective insulating film 1 according to the present invention
The ozone concentration at the time of forming the ozone TEOS film of 51 was as follows:
It is desirable to be 5.5% or more. Ozone concentration is 5.
By setting it higher than 5%, ozone TEOS
The stress of the film itself can be reduced, and effects such as reduction of the water content and suppression of crack generation by heat treatment can be obtained.
Characteristics are further improved.

In the above description, the heat treatment temperature in the first heat treatment step is 450 ° C.
The temperature may be 0 ° C. or lower. Within this temperature range, the silicon oxide film formed using ozone TEOS can be densified, and the characteristics of the capacitor 10 can be further improved.
Further, as the treatment atmosphere in the first heat treatment step, a mixed atmosphere of oxygen and another gas can be used instead of the above-described oxygen atmosphere. Thus, oxygen can be supplied to the capacitive insulating film 8, and the characteristics of the capacitive element 10 are further improved.

After the first heat treatment step, the ozone TEOS film as the second protective insulating film 151 is changed to 1 × 10 ⁷
It is desirable to have a tensile stress of not less than dyn / cm ^{2 and not} more than 2 × 10 ⁹ dyn / cm ² . That is, even if the volume of the ozone TEOS film (second protective insulating film) 151 is reduced by the heat treatment, if the stress is within the above range, the stress acting on the capacitor 10 is reduced, and the stress is reduced. The deterioration of the characteristics of the capacitive element caused by the above is suppressed.

In the description of each of the above embodiments, the second
Although a laminated film of titanium, aluminum, and titanium nitride is used as the wiring layer 17 of this embodiment, the same effect can be obtained by using a laminated film of titanium, aluminum, or a laminated film of titanium, aluminum, and titanium tungsten. Obtainable.

In the above description, the heat treatment temperature in the second heat treatment step is set to 400 ° C.
The temperature may be 0 ° C. or lower. Within this temperature range, the second wiring layer 17 can be densified and reduced in stress. Similarly, when the processing atmosphere in the second heat treatment step is changed to an argon atmosphere, a helium atmosphere, or a mixed atmosphere of nitrogen and these gases instead of the above-described nitrogen atmosphere, the second wiring layer 17 is similarly densified. And an effect of reducing stress is obtained.

[0114]

As described above, according to the present invention, the stress acting on the capacitance element is reduced, and the direction becomes the tensile stress, so that the characteristic deterioration of the capacitance element due to the stress is suppressed. A capacitor having excellent characteristics is formed. As a result, even if a multilayer wiring is used, excellent reliability can be obtained.

[Brief description of the drawings]

FIGS. 1A to 1E are cross-sectional views illustrating each step of a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a modified configuration of the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a comparative diagram illustrating characteristics of a capacitive element included in the semiconductor device according to the first embodiment of the present invention.

FIGS. 4A to 4E are cross-sectional views illustrating each step of a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is a comparative diagram illustrating characteristics of a capacitive element included in a semiconductor device according to a second embodiment of the present invention.

FIGS. 6A to 6E are cross-sectional views illustrating each step of a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 7 is a comparative diagram illustrating characteristics of a capacitive element included in a semiconductor device according to a third embodiment of the present invention.

FIG. 8A is a top view illustrating a configuration of a semiconductor device according to a third embodiment of the present invention, and FIGS. 8B and 8C are diagrams illustrating a semiconductor device according to the third embodiment of the present invention; It is a top view which respectively shows the modified structure of FIG.

FIG. 9 is a comparative diagram illustrating characteristics of a capacitor included in a semiconductor device of the present invention.

FIGS. 10A to 10E are cross-sectional views illustrating each step of a conventional method for manufacturing a semiconductor device.

FIG. 11A is a diagram schematically showing a cross-sectional shape when a silicon oxide film (plasma TEOS film) covering a wiring pattern formed on a substrate surface is formed by a conventional plasma CVD method. And (b) shows the results obtained by the thermal CVD method in an atmosphere containing ozone as in the present invention.
It is a figure which shows typically the cross-sectional shape at the time of forming the silicon oxide film (ozone TEOS film) which covers the wiring pattern formed in the substrate surface.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Support substrate 2 Gate 3 Source / drain 4 Integrated circuit 5 Element isolation insulating film 6 Interlayer insulating film 7 Lower electrode of capacitive element 8 Capacitive insulating film 9 Upper electrode of capacitive element 10 Capacitive element 12, 13, 16 Contact hole 14th 1 wiring layer 17 2nd wiring layer 18 3rd protective insulating film 19 hydrogen supply film 111 1st protective insulating film 15 2nd protective insulating film (plasma TEOS film) 151 2nd protective insulating film (ozone TEOS) Film) 100, 150, 200, 300, 500 Semiconductor device

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yasuhiro Uemoto 1-1, Sachimachi, Takatsuki-shi, Osaka Prefecture Inside Matsushita Electronics Corporation (72) Inventor Eiji Fujii 1-1-1, Sachimachi, Takatsuki-shi, Osaka Matsushita (56) References JP-A-7-50391 (JP, A) JP-A-7-263637 (JP, A) JP-A-7-111318 (JP, A) JP-A-7-50394 (JP, A) JP-A-4-342164 (JP, A) JP-A-7-86305 (JP, A) JP-A-3-175632 (JP, A) JP-A-3-198340 (JP, A) JP-A-9-213899 (JP, A) JP-A-10-22464 (JP, A) JP-A-9-172150 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 27 / 108 H01L 21/316 H01L 21/768 H01L 21/8242 H01L 27/10 451

Claims (27)

(57) [Claims] A capacitor formed on a support substrate on which the semiconductor integrated circuit is formed, the capacitor having a lower electrode, a capacitor insulating film, and an upper electrode; and a first element formed to cover the capacitor. And a first protective insulating film electrically connected to the semiconductor integrated circuit and the capacitor via a first contact hole provided in the first protective insulating film. A first wiring layer selectively formed thereon; and an ozone TEO formed to cover the first wiring layer.
A second protective insulating film made of an S film, and electrically connected to the first wiring layer via a second contact hole provided in the second protective insulating film;
A semiconductor device comprising: a second wiring layer selectively formed on the second protective insulating film; and a third protective insulating film formed to cover the second wiring layer. 2. The semiconductor device according to claim 1, wherein said capacitor insulating film is formed of a dielectric film having a high dielectric constant or a ferroelectric film. 3. The semiconductor device according to claim 1, wherein said second wiring layer is formed on said second protective insulating film so as to cover at least a part of said capacitive element. 4. The semiconductor device according to claim 1, wherein said third protective insulating film is a stacked film of a silicon oxide film and a silicon nitride film. 5. A hydrogen supply film formed between the first wiring layer and the second protective insulating film in a region excluding a portion where the capacitor is formed. ,
The semiconductor device according to claim 1. 6. A laminated film of titanium, titanium nitride, aluminum, and titanium nitride, a laminated film of titanium, titanium nitride, and aluminum, and a laminated film of titanium, titanium tungsten, aluminum, and titanium tungsten. The semiconductor device according to claim 1, wherein the semiconductor device is a film or a stacked film of titanium, titanium tungsten, and aluminum. 7. The Si—OH bond absorption coefficient of the second protective insulating film at a wavelength corresponding to 3450 cm ⁻¹ is 80.
The semiconductor device according to claim 1, wherein the semiconductor device is 0 cm ⁻¹ or less. 8. The method according to claim 1, wherein the second protective insulating film is 1 × 10 ⁷ d.
^2. The semiconductor device according to claim 1, having a tensile stress of not less than yn / cm ^{2 and not} more than 3 × 10 ⁹ dyn / cm ² . 9. The thickness of the second protective insulating film is 0.3 μm.
The semiconductor device according to claim 1, wherein the length is not less than m and not more than 1 μm. 10. The method according to claim 1, wherein the second wiring layer is a stacked film of titanium, aluminum, and titanium nitride, a stacked film of titanium and aluminum, or a stacked film of titanium, aluminum, and titanium tungsten. 13. The semiconductor device according to claim 1. 11. A step of sequentially forming a lower electrode, a capacitor insulating film, and an upper electrode on a supporting substrate on which a semiconductor integrated circuit is formed to form a capacitor, and forming a first capacitor so as to cover the capacitor. Forming a first protective insulating film, forming a first contact hole in the first protective insulating film, and forming a first wiring layer electrically connected to the semiconductor integrated circuit and the capacitor. , The first contact hole and the first contact hole.
Selectively forming a predetermined region on the protective insulating film, and forming a second protective insulating film covering the first wiring layer with ozone TEO.
Forming a second contact hole in the second protective insulating film; forming a second contact hole in the second protective insulating film; forming a second contact hole in the second protective insulating film; Selectively forming a second wiring layer electrically connected to the second wiring layer in the second contact hole and in a predetermined region on the second protective insulating film; A method for manufacturing a semiconductor device, comprising: performing a second heat treatment on a layer; and forming a third protective insulating film covering the second wiring layer. 12. The capacitor insulating film is formed of a dielectric film having a high dielectric constant or a ferroelectric film.
13. The method for manufacturing a semiconductor device according to item 5. 13. The method according to claim 11, further comprising the step of using the second wiring layer as a mask to etch back the second protective insulating film to such an extent that the first wiring layer is not exposed. The manufacturing method of the semiconductor device described in the above. 14. The method according to claim 11, wherein the second wiring layer is formed on the second protective insulating film so as to cover at least a part of the capacitor. 15. The third protective insulating film is formed as a laminated film of a silicon oxide film and a silicon nitride film, and the silicon oxide film is formed by a normal pressure CVD method, a low pressure CVD method, or a plasma CVD method. 12. The method of manufacturing a semiconductor device according to claim 11, wherein the semiconductor device is formed so as to have a tensile stress by using, for example, disilane or ozone TEOS. 16. After the formation of the first wiring layer, a hydrogen supply film is formed on the first wiring layer except for a region where the capacitor is formed, and thereafter, a third heat treatment is performed. The method of manufacturing a semiconductor device according to claim 11, further comprising a step. 17. The method according to claim 16, wherein said hydrogen supply film is formed from a silicon nitride film or a silicon nitride oxide film by a plasma CVD method. 18. The method according to claim 16, wherein the third heat treatment after the formation of the hydrogen supply film is performed at a temperature of 300 ° C. or more and 450 ° C. or less. 19. The method according to claim 16, wherein the third heat treatment after the formation of the hydrogen supply film is performed in an atmosphere of oxygen, nitrogen, argon, or a mixed gas thereof. . 20. The method of claim 1, wherein the first protective insulating film is formed by atmospheric pressure CVD.
The method of manufacturing a semiconductor device according to claim 11, wherein the semiconductor device is formed using a silicon oxide film formed using silane, disilane, or ozone TEOS by a low pressure CVD method. 21. The method according to claim 21, wherein the first protective insulating film is formed by atmospheric pressure CVD.
The method of manufacturing a semiconductor device according to claim 11, wherein the method comprises a phosphorus-doped silicon oxide film formed by a low pressure CVD method. 22. The method of manufacturing a semiconductor device according to claim 11, wherein an ozone concentration in forming the second protective insulating film using the ozone TEOS film is set to 5.5% or more. 23. The second protective insulating film after the first heat treatment is 1 × 10 ⁷ dyn / cm ² or more and 2 × 10 ⁹ d
has a tensile stress of not more than yn / cm ² ,
A method for manufacturing a semiconductor device according to claim 11. 24. The method according to claim 11, wherein the first heat treatment is performed at a temperature of 300 ° C. or more and 450 ° C. or less. 25. The method according to claim 11, wherein the first heat treatment is performed in an atmosphere containing at least oxygen. 26. The method according to claim 11, wherein the second heat treatment is performed at a temperature of 300 ° C. or more and 450 ° C. or less. 27. The method according to claim 11, wherein the second heat treatment is performed in an atmosphere containing at least one of nitrogen, argon, and helium.