JP2843070B2 - Voltage detector - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial application field) The present invention relates to a voltage detecting device for a transmission terminal that performs transmission without capturing a line.

(Prior Art) As a conventional voltage detecting device, there is one shown in FIG. 3, for example. In the figure, T ₁ and T ₂ are terminals connected to a telephone line, and 1 is a polarity detection circuit for detecting polarity reversal of the telephone line, which is used to digitize resistors R ₁ and R ₂ and an analog signal. It has become a buffer G _1, and outputs a H level when the terminal T ₂ side becomes positive. Reference numeral 2 denotes a flip-flop as a holding circuit, and the output Q goes high when the output of the polarity detection circuit rises.
The terminal T _2, ON between the telephone line and the terminal unit's internal circuitry, OF
The switch SW is connected for the purpose of F. Switch SW
Is normally configured by a transistor switch, and is controlled to be ON when the output Q of the flip-flop 2 becomes H level.

A transmitting / receiving circuit 6 as a terminal for exchanging signals with the telephone line and a voltage detecting circuit 5 for detecting an abnormal voltage occurring in the telephone line are connected in parallel to the other end of the switch SW. I have. The voltage detection circuit 5 includes an operational amplifier or a comparator. Here, the abnormal voltage refers to a line voltage lower than about 20 V, an abnormally high voltage due to a test, surge, or the like during use of a telephone connected in parallel with the terminal device. Reference numeral 7 denotes a control circuit such as a microcomputer, which controls the transmission / reception circuit 6 and, when an abnormal voltage is detected by the voltage detection circuit 5, clears the flip-flop 2 to protect the internal circuit of the terminal device. It also has a function to turn off the switch SW.

FIG. 4 shows an operation timing chart of the voltage detection device configured as described above. FIG. 4 (a)-
(E) shows the waveform of each part indicated by the same reference numeral in FIG.

Power is always applied to the voltage detection circuit 5. When an abnormal voltage is generated in the telephone line while the switch SW is set to ON and appears at the point (a), an abnormal voltage detection signal of H level is output to the output (d) of the voltage detection circuit 5. . Next, a clear pulse as shown in (e) is output from the control circuit 7, the flip-flop 2 is cleared, the switch SW is turned off, and the internal circuit of the terminal is protected.

(Problems to be Solved by the Invention) In the conventional voltage detection device, the power supply is always applied to the voltage detection circuit 5 composed of an operational amplifier or the like.
Power consumption has increased, and particularly in the case of battery operation, a large-capacity battery power source has been required, resulting in an increase in cost. Also, as shown in FIGS. 4 (d) (a) and (e), the switch SW
When it is OFF, a pulse is generated in the output (d) of the voltage detection device 5 even in the switching transition state as in (a) and (d). For this reason, the control circuit 7 must select the output signal of the voltage detection device 5 according to the state of the circuit, and if the control circuit 7 has software, the software configuration becomes complicated. There was a problem.

In view of the above, the present invention provides a voltage detection device that can reduce the battery capacity and reduce the cost when operating in a battery with low power consumption, and can mask the occurrence of erroneous pulses other than the abnormal voltage detection signal. The purpose is to provide.

[Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention provides a polarity detection circuit for detecting polarity reversal of a telephone line, and a detection output from the polarity detection circuit. A holding circuit for holding the output state of the level signal and connecting the telephone line to the terminal based on the predetermined level signal, and detecting an abnormal voltage generated on the telephone line driven by the predetermined level signal from the holding circuit. A voltage detection circuit, a delay circuit for generating a delay signal obtained by delaying a predetermined level signal from a holding circuit for a time from when the voltage detection circuit is driven until the output of the voltage detection circuit is stabilized, and the delay circuit When an abnormal voltage detection signal is output from the voltage detection circuit in a state where a delay signal is output from the reset circuit, the operation state of the holding circuit and the delay circuit is reset. And summarized in that a gate circuit which outputs the Tsu bets signals.

(Operation) In the above configuration, power is not initially applied to the voltage detection circuit, and the voltage detection circuit is in a non-operation state. When the polarity detection circuit detects the inversion of the telephone line, the holding circuit is in a state of outputting a predetermined level signal, the power is supplied to the voltage detection circuit by the output of the predetermined level signal, and based on the output of the predetermined level signal. The telephone line is connected to the terminal.
Next, the gate circuit is set to the open state by the delay signal of the delay circuit after a delay time until the output of the voltage detection circuit is stabilized. When an abnormal voltage is generated in the telephone line in this state, the abnormal voltage is detected by the voltage detection circuit, and a reset signal is output from the gate circuit based on the abnormal voltage detection signal, and the operation states of the holding circuit and the delay circuit are reset. As a result, the terminal internal circuit is protected from abnormal voltage, and the power supply of the voltage detection circuit is turned off.

As described above, the voltage detection circuit is turned on only when necessary, and is put into an operating state. Therefore, power consumption is reduced. In particular, in the case of battery operation, the battery capacity is reduced and the cost is reduced. Is achieved. Further, a pulse generated when the power supply of the voltage detection circuit is turned on or when the telephone line is connected to the terminal device is masked, so that no erroneous pulse other than the abnormal voltage detection signal is generated from the voltage detection circuit.

(Embodiment) An embodiment of the present invention will be described below with reference to FIG. 1 and FIG.

In FIG. 1, components that are the same as or equivalent to the circuit devices and the like in FIG. 3 are denoted by the same reference numerals as those described above, and redundant description will be omitted.

In this embodiment, the power supply of the voltage detection circuit 5 is turned on at the H level output of the output Q of the flip-flop 2. The first and second delay circuits 3 and 4 are sequentially connected to the output Q terminal of the flip-flop 2. The first and second delay circuits 3 and 4 are configured by a counter or a CR circuit or the like. The first delay circuit 3 delays the output signal of the flip-flop 2 by the time during which the power supply of the voltage detection circuit 5 is stabilized, and the switch SW is turned ON by the delay signal output of the first delay circuit 3. It is controlled. The second delay circuit 4 further delays the output of the first delay circuit 3 and outputs a delay signal with a delay time sufficient for the output of the voltage detection circuit 5 to stabilize. Is AN as a gate circuit
It is input to one input terminal of the D gate G _2. AND gate G ₂ are the ones that take the logical product of the abnormal voltage detection signal of the delay signal output and the voltage detection circuit 5 of the second delay circuit 4, the flip-flop 2 and so its output signal is a reset signal The first and second delay circuits 3 and 4 are cleared. Even when the voltage detection circuit 5 does not detect an abnormal voltage, the reset signal is output from the control circuit 7 and the flip-flop 2 and the first and second delay circuits 3 and 4 are cleared when necessary. It has become.

Next, the operation of the voltage detection device configured as described above will be described with reference to the operation timing chart of FIG. (A) to (G) of FIG. 2 show the waveforms of the respective components indicated by the same reference numerals in FIG.

Initially, power is not applied to the voltage detection circuit 5 and the voltage detection circuit 5 is in a non-operation state. When polarity inversion of the telephone line is detected by the polarity detection circuit 1, the output Q of the flip-flop 2 becomes H level (FIG. 2 (C)), and the power is turned on to the voltage detection circuit 5. Thereafter, the switch SW is turned on by the output ((D)) of the first delay circuit 3 after a delay time sufficient for the power supply of the voltage detection circuit 5 to stabilize, and the telephone line is connected to the transmission and reception circuit 6 and the voltage. Connected to the detection circuit 5. Then
The output of the second delay circuit 4 (FIG. 10E) is ANDed with a delay time sufficient for the output of the voltage detection circuit 5 to stabilize.
Gate G ₂ is set to the open state.

In this state, the abnormal voltage is generated in the telephone line, which is detected by the voltage detecting circuit 5, when the abnormal voltage detection signal of H level is outputted to the output (F), and a reset signal from the AND gate G ₂ The following pulse output is performed ((G) in the figure). Then, the flip-flop 2 and the first and second delay circuits 3 and 4 are cleared by the reset signal. As a result, the switch SW is turned off, the internal circuit of the terminal is protected, and the power supply of the voltage detection circuit 5 is turned off.

As described above, since the voltage detection circuit 5 is turned on only when necessary and is in an operating state, it is possible to reduce the power consumption. In particular, in the case of battery operation, the battery capacity is reduced and the cost is reduced. Is realized. The power supply of the voltage detection circuit 5
The erroneous pulse ((f) in FIG. 2) generated when the switch is turned on and the erroneous pulse ((g)) generated when the switch SW is turned on are masked and do not appear in the output of the voltage detection circuit 5. Therefore, when the control circuit 7 has software, the software configuration becomes easy.

In the above-described embodiment, two delay circuits are provided, and the power supply of the voltage detection circuit 5 is turned on → the switch SW is turned on → the O of the AND gate G ₂ is turned on.
Although so as to forward at operation of N, a delay circuit is only one stage, be caused to operate the power ON ON and switch SW of the voltage detection circuit 5 in the order of ON simultaneous → the AND gate G ₂ Good.

However, in the case of the configuration of this embodiment, the switch SW is turned off.
In this case, when a high voltage is already applied to the telephone line, it is effective in protecting the internal circuit of the terminal. Normally, the output stabilization time is shorter than the power supply stabilization time of the voltage detection circuit 5. If a high voltage is applied to the internal circuit of the terminal for a long time after the switch SW is turned on, damage may occur.
Therefore, the time from ON of the switch SW to stabilization of the output of the voltage detection circuit 5 needs to be as short as possible, and accordingly, the delay time after the switch SW is turned ON by the delay circuit needs to be set short. It is.

[Effects of the Invention] As described above, according to the present invention, the polarity detection circuit for detecting the polarity reversal of the telephone line, the detection output of the polarity detection circuit is input, and the output state of the predetermined level signal is held. A holding circuit for connecting the telephone line to a terminal based on the predetermined level signal, a voltage detection circuit driven by the predetermined level signal from the holding circuit and detecting an abnormal voltage generated on the telephone line; A delay circuit that generates a delay signal obtained by delaying a predetermined level signal from the holding circuit for a time from when the detection circuit is driven until the output of the voltage detection circuit is stabilized, and when the delay signal is output from the delay circuit. When the abnormal voltage detection signal is output from the voltage detection circuit in a state where the gate circuit is turned on, a gate circuit for outputting a reset signal for resetting the operation state of the holding circuit and the delay circuit Since the voltage detection circuit is provided, power is supplied only to the voltage detection circuit when necessary, and power consumption is reduced. In particular, in the case of battery operation, the battery capacity is reduced and cost reduction can be realized. Also, the pulses generated when the power supply of the voltage detection circuit is turned on and when the telephone line is connected to the terminal device are masked, so that no error pulses other than the abnormal voltage detection signal are generated from the voltage detection circuit, Malfunction can be prevented accurately.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a voltage detecting device according to the present invention, FIG. 2 is a timing chart for explaining the operation of the above embodiment, FIG. 3 is a block diagram showing a conventional voltage detecting device, FIG. 4 is a timing chart for explaining the operation of the conventional example. 1: polarity detection circuit, 2: flip-flop (holding circuit), 3, 4: delay circuit, 5: voltage detection circuit, 6: transmission / reception circuit (terminal device), G ₂ : AND gate (gate circuit), T ₁ , T ₂ : Terminal connected to telephone line.

Claims (1)

(57) [Claims] 1. A polarity detection circuit for detecting polarity reversal of a telephone line, a detection output of the polarity detection circuit being inputted, and an output state of a predetermined level signal being held, and the telephone line being connected to a terminal based on the predetermined level signal. A voltage detecting circuit driven by a predetermined level signal from the holding circuit and detecting an abnormal voltage generated in the telephone line; and a voltage detecting circuit which is driven after the voltage detecting circuit is driven. A delay circuit for generating a delay signal obtained by delaying a predetermined level signal from the holding circuit for a time until the output is stabilized; and an abnormal voltage detection signal from the voltage detection circuit while the delay signal is being output from the delay circuit. And a gate circuit for outputting a reset signal for resetting an operation state of the holding circuit and the delay circuit when output.