JP2833979B2 - Sputtering device with collimator - Google Patents
Sputtering device with collimatorInfo
- Publication number
- JP2833979B2 JP2833979B2 JP29650993A JP29650993A JP2833979B2 JP 2833979 B2 JP2833979 B2 JP 2833979B2 JP 29650993 A JP29650993 A JP 29650993A JP 29650993 A JP29650993 A JP 29650993A JP 2833979 B2 JP2833979 B2 JP 2833979B2
- Authority
- JP
- Japan
- Prior art keywords
- collimator
- collimating
- vacuum
- semiconductor substrate
- processing chamber
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Physical Vapour Deposition (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明はコリメートを有するスパ
ッタ装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sputtering apparatus having a collimator.
【0002】[0002]
【従来の技術】半導体集積回路装置の高集積化が進むに
つれて、例えば図5に示す半導体基板4の主面の絶縁膜
に形成されるコンタクトホール33の直径が約0.4μ
mと微細化する。そしてここにバリヤメタル膜31や配
線膜32をスパッタ装置により成膜するが、スパッタ粒
子の方向は一定でなくさまざまな方向に飛散する為、
(コンタクトホールの底部の膜厚b)/(表面の膜厚
a)で定義されるボトムカバレッジ率が低くなり、コン
タクトホール33の底部の膜厚bが薄くなるので配線の
コンタクト抵抗が大きくなってしまう。そしてコンタク
ト抵抗が大きければ集積回路の消費電力は増大し、処理
速度が遅くなるという問題が生じる。2. Description of the Related Art As the degree of integration of a semiconductor integrated circuit device increases, for example, the diameter of a contact hole 33 formed in an insulating film on the main surface of a semiconductor substrate 4 shown in FIG.
m. And here, the barrier metal film 31 and the wiring film 32 are formed by a sputtering apparatus.
The bottom coverage ratio defined by (thickness b at the bottom of contact hole) / (thickness a at the surface) decreases, and the thickness b at the bottom of the contact hole 33 decreases, so that the contact resistance of the wiring increases. I will. If the contact resistance is large, the power consumption of the integrated circuit increases, causing a problem that the processing speed decreases.
【0003】この問題を解決するために、ターゲット材
から飛散するスパッタ粒子のうち斜め方向に飛散するス
パッタ粒子を排除するコリメートを、ターゲット材と半
導体基板との間に配設する図4に示すようなスパッタ装
置が、例えば特開平1−116070号公報に開示され
ている。In order to solve this problem, as shown in FIG. 4, a collimator for eliminating sputter particles scattered in an oblique direction among sputter particles scattered from a target material is provided between the target material and the semiconductor substrate. Such a sputter device is disclosed in, for example, Japanese Patent Application Laid-Open No. 1-116070.
【0004】すなわち図4において、真空ポンプ2によ
り真空となる真空処理室1内に、半導体基板4とターゲ
ット3を配設し、さらにその間に多数の開孔部12を有
するコリメート11を配設する。ターゲット3からさま
ざまな方向に飛散するスパッタ粒子8のうち、斜め方向
に飛散する斜めスパッタ粒子9はコリメート11の開孔
部12の内壁に付着し半導体基板4に到達することはな
い。一方、垂直方向に飛散する垂直スパッタ粒子10は
コリメート11の開孔部12を通過して半導体基板4に
到達する。このようにコリメート11を配設することに
より、垂直スパッタ粒子10によって成膜されるから、
コンタクトホールの底部膜厚と表面の膜厚とがほぼ等し
い値とすることができる。That is, in FIG. 4, a semiconductor substrate 4 and a target 3 are provided in a vacuum processing chamber 1 which is evacuated by a vacuum pump 2, and a collimator 11 having a large number of apertures 12 is provided therebetween. . Of the sputtered particles 8 scattered in various directions from the target 3, the oblique sputtered particles 9 scattered in an oblique direction adhere to the inner wall of the opening 12 of the collimator 11 and do not reach the semiconductor substrate 4. On the other hand, the vertical sputtered particles 10 scattered in the vertical direction reach the semiconductor substrate 4 through the opening 12 of the collimator 11. By arranging the collimator 11 in this manner, the film is formed by the vertical sputtered particles 10,
The thickness of the bottom of the contact hole and the thickness of the surface of the contact hole can be set to substantially the same value.
【0005】[0005]
【発明が解決しようとする課題】しかしながら上記技術
において、成膜が進むにつれ開孔部12の内壁に付着す
スパッタ粒子により開孔部の直径xが狭くなり、(開孔
部の深さy)/(開孔部の直径x)で定義される開孔部
12のアスペクト比が変化してしまう。このアスペクト
比が変化すると成膜条件が変化するから、成膜開始から
成膜完了まで同一の条件で行う必要がある場合、それが
出来なくなってしまう。However, in the above technique, as the film formation proceeds, the diameter x of the opening becomes narrow due to sputter particles adhering to the inner wall of the opening 12, and (the depth y of the opening). The aspect ratio of the opening 12 defined by / (diameter x of the opening) changes. When the aspect ratio changes, the film forming conditions change, and if it is necessary to perform the same conditions from the start of film formation to the completion of film formation, it becomes impossible to do so.
【0006】あるいは連続処理で成膜処理回数を重ねる
と、上記理由によりアスペクト比が変化して所定の成膜
条件での成膜作業を設定することが不可能となる。[0006] Alternatively, if the number of times of the film forming process is repeated in the continuous process, the aspect ratio changes for the above-mentioned reason, and it becomes impossible to set a film forming operation under predetermined film forming conditions.
【0007】一方逆に、成膜条件を途中で変更させるこ
とが必要な場合、図6(A)に示すアスペクト比A(y
1 /x)を有するコリメート11’を図6(B)の所定
のアスペクト比B(y2 /x)を有するコリメート1
1’’に変更しなければならないが、従来のスパッタ装
置ではこの所定の変更を容易に行うことが出来ない。On the other hand, when it is necessary to change the film forming conditions on the way, the aspect ratio A (y) shown in FIG.
The collimator 11 ′ having the predetermined aspect ratio B (y 2 / x) shown in FIG.
Although it must be changed to 1 '', this predetermined change cannot be easily made with a conventional sputtering apparatus.
【0008】従来技術において、上記不都合の除去やコ
リメートの変更のために、真空を破る、すなわち真空処
理室内を真空状態から大気状態に戻す必要がある。しか
しながらこのように大気に戻すと真空処理室の内壁に付
着していたスパッタ膜のはがれが発生し、後の処理時に
半導体基板にゴミとなって悪影響を及ぼす。In the prior art, it is necessary to break the vacuum, that is, return the vacuum processing chamber from a vacuum state to an atmospheric state in order to eliminate the above-mentioned inconveniences and change the collimation. However, when the atmosphere is returned to the atmosphere as described above, the sputtered film adhered to the inner wall of the vacuum processing chamber is peeled off, and the semiconductor substrate is dusted during the subsequent processing, which has a bad influence.
【0009】又、真空処理室の真空を破り、再度目的の
真空度まで真空引きをするには、コリメートの交換作業
を含め1時間程かかり、工数が無駄となる。In addition, it takes about one hour to break the vacuum in the vacuum processing chamber and evacuate again to the desired degree of vacuum, including replacement of the collimator, which wastes man-hours.
【0010】[0010]
【課題を解決するための手段】本発明の特徴は、ターゲ
ット材から飛散するスパッタ粒子のうち斜め方向に飛散
するスパッタ粒子を排除するように、前記ターゲット材
と半導体基板との間に配設されたコリメートを有するス
パッタ装置において、前記コリメートは前記第1のコリ
メート部材の円筒状部とそれに挿入される前記第2のコ
リメート部材の円筒状部とで構成され、両円筒状部の出
し入れにより前記コリメート開口部の深さを変更できる
ようにしたコリメートを有するスパッタ装置にある。こ
こで、真空処理室内に前記ターゲット材、前記半導体基
板ならびに前記第1および第2のコリメート部材が配置
され、前記真空処理室外に駆動手段が配置され、真空ベ
ローズを介して前記駆動手段が前記第1および第2のコ
リメート部材の一方と結合することができる。A feature of the present invention is that a sputtered particle scattered from a target material is disposed between the target material and the semiconductor substrate so as to exclude sputtered particles scattered in an oblique direction. In the sputtering apparatus having a collimator, the collimator includes a cylindrical portion of the first collimating member and a cylindrical portion of the second collimating member inserted therein. The depth of the opening can be changed
In a sputtering apparatus having the above-described collimator. This
Here, the target material, the semiconductor substrate, and the first and second collimating members are disposed in a vacuum processing chamber, and a driving unit is disposed outside the vacuum processing chamber. It can be coupled to one of the first and second collimating members.
【0011】[0011]
【実施例】次に図面を参照して本発明を説明する。BRIEF DESCRIPTION OF THE DRAWINGS FIG.
【0012】図1は本発明の一実施例のスパッタ装置を
示す概略断面図である。真空処理室1を真空ポンプ2に
より高真空に排気し、スパッタガスを導入した後、ター
ゲット3を陰極とし半導体基板4を陽極として両者間に
高電圧を印加することによりスパッタリングを行う。FIG. 1 is a schematic sectional view showing a sputtering apparatus according to one embodiment of the present invention. After the vacuum processing chamber 1 is evacuated to a high vacuum by a vacuum pump 2 and a sputtering gas is introduced, sputtering is performed by applying a high voltage between the target 3 as a cathode and the semiconductor substrate 4 as an anode.
【0013】ターゲット3と半導体基板4との間に配置
され、ターゲット3から飛散するスパッタ粒子8のうち
斜めスパッタ粒子9(図4)を排除して優勢的に垂直ス
パッタ粒子10を半導体基板4上にスパッタしてそこに
成膜するための本実施例のコリメート7は、第1のコリ
メート部材5と第2のコリメート部材6とからなり、第
1のコリメート部材5の多数の円筒状部15とそれらの
それぞれに挿入される第2のコリメート部材6の円筒状
部16とでコリメート7の多数の開孔部17が構成さ
れ、両円筒状部15,16の出し入れによりコリメート
開口部17の深さyを変更しそのアスペクト比を変更す
るようになっている。The oblique sputtered particles 9 (FIG. 4) among the sputtered particles 8 scattered from the target 3 are disposed between the target 3 and the semiconductor substrate 4, and the vertical sputtered particles 10 are predominantly deposited on the semiconductor substrate 4. The collimator 7 of the present embodiment for sputtering a film on the first collimating member 5 comprises a first collimating member 5 and a second collimating member 6, and a large number of cylindrical portions 15 of the first collimating member 5. The cylindrical portion 16 of the second collimating member 6 inserted into each of them constitutes a large number of apertures 17 of the collimator 7, and the depth of the collimating opening 17 is obtained by inserting and removing the cylindrical portions 15, 16. y is changed to change its aspect ratio.
【0014】すなわち、第1のコリメート部材5を固定
し、第2のコリメート部材6を図で上下方向に駆動調節
することにより、コリメート7の開孔部17の深さyを
調節して、図2(A)の状態のアスペクト比A(y1 /
x)を図2(B)の状態のアスペクト比B(y2 /x)
に、真空状態を維持したまま変更する。That is, by fixing the first collimating member 5 and drivingly adjusting the second collimating member 6 in the vertical direction in the figure, the depth y of the aperture 17 of the collimator 7 is adjusted. The aspect ratio A (y 1 /
x) is the aspect ratio B (y 2 / x) in the state of FIG.
Then, change while maintaining the vacuum state.
【0015】この駆動はモーター18を用い、ピニオン
19、第1のギア20、第2のギア21を介し、第2の
コリメート部材6に結合するネジ状のシャフト22を上
下させて行う。この駆動部は真空処理室1の内部の発塵
を防止するために真空処理室1の外部の大気側に、第2
のコリメート部材6の外周部に沿って等間隔で複数個設
置し、上下動の動作部には第2のコリメート部材6と真
空処理室1の外囲器とを接続する真空ベローズ23を用
いて真空と大気とを遮断する。This driving is performed by using a motor 18 to raise and lower a screw-shaped shaft 22 connected to the second collimating member 6 via a pinion 19, a first gear 20, and a second gear 21. The driving unit is provided on the outside of the vacuum processing chamber 1 to prevent dust from being generated inside the vacuum processing chamber 1.
Are installed at equal intervals along the outer periphery of the collimating member 6, and a vacuum bellows 23 that connects the second collimating member 6 and the envelope of the vacuum processing chamber 1 is used for the vertically moving operation part. Shut off vacuum and atmosphere.
【0016】図2は第1および第2のコリメート部材
5,6の組み合せによるコリメート7の開孔部17の状
態を示す断面図であり、図3はその断面斜視図である。FIG. 2 is a sectional view showing the state of the opening 17 of the collimator 7 formed by combining the first and second collimating members 5 and 6, and FIG. 3 is a sectional perspective view thereof.
【0017】図2(A)および図3(A)は第2のコリ
メート部材6を一番上昇させた場合で第1のコリメート
部材5の円筒状部15と第2のコリメート部材6の円筒
状部16とが一番重なった状態となり、第1および第2
のコリメート部材5,6からなるコリメート7の開孔部
17の深さy1 は最小となり、そのアスペクト比y1/
xは最小となる。一方、図2(B)および図3(B)は
第2のコリメート部材6を一番下降させた場合で第1の
コリメート部材5の円筒状部15の下端の高さと第2の
コリメート部材6の円筒状部16の上端の高さとが一致
した状態となり、第1および第2のコリメート部材5,
6からなるコリメート7の開孔部17の深さy2 は最大
となり、そのアスペクト比y2 /xは最大となる。FIGS. 2A and 3A show the case where the second collimating member 6 is raised to the highest position. FIG. 2A shows the cylindrical portion 15 of the first collimating member 5 and the cylindrical portion of the second collimating member 6. Portion 16 is in the state of being most overlapped, and the first and second portions
The depth y 1 of the aperture 17 of the collimator 7 composed of the collimating members 5 and 6 is minimized, and its aspect ratio y 1 /
x is minimized. On the other hand, FIGS. 2 (B) and 3 (B) show the case where the second collimating member 6 is most lowered and the height of the lower end of the cylindrical portion 15 of the first collimating member 5 and the second collimating member 6 And the height of the upper end of the cylindrical portion 16 of the first and second collimating members 5,
The depth y 2 of the aperture 17 of the collimator 7 made of 6 is maximum, and its aspect ratio y 2 / x is maximum.
【0018】成膜が進んで開孔部内にスパッタ粒子が付
着して開孔部の直径xが小になっていっても、一定のア
スペクト比を維持して一定の条件で成膜を続けるために
は、始めに図2(B),図3(B)側に設定し、成膜の
進行に応じて徐々に図2(A),図3(A)の方向に駆
動させyを小にしていけばよい。尚、両円筒状部15,
16間はそこに付着したスパッタ粒子と接触しない様に
十分な隙間になっている。 Even if the diameter x of the opening is reduced due to the sputtered particles adhering into the opening due to the progress of the film formation, the film formation is continued under a certain condition while maintaining a constant aspect ratio. 2 (B) and 3 (B), and gradually drive in the directions of FIGS. 2 (A) and 3 (A) as the film formation progresses to decrease y. I should go. In addition, both cylindrical parts 15,
Avoid contact with sputtered particles adhering there between 16
There is enough clearance.
【0019】一方、成膜条件を途中で変更させることが
必要である場合は、図2(A),図3(A)の状態と図
2(B),図3(B)の状態との間の所定の状態にその
都度変更するように駆動させればよい。On the other hand, when it is necessary to change the film forming conditions on the way, the state shown in FIGS. 2 (A) and 3 (A) and the state shown in FIGS. 2 (B) and 3 (B) are changed. What is necessary is just to drive so that it may change to the predetermined state between each time.
【0020】いずれの場合も真空処理室1内を真空に維
持したままコリメート7の開孔部17の深さyの調整が
可能となる。In any case, the depth y of the opening 17 of the collimator 7 can be adjusted while maintaining the vacuum processing chamber 1 in a vacuum.
【0021】なお上記実施例では上の第1のコリメート
部材5を固定し下の第2のコリメート部材6を移動させ
る構成を例示したが、上の第1のコリメート部材5を移
動させ下の第2のコリメート部材6を固定する構成にす
ることもできる。さらに場合によっては両コリメート部
材5,6を移動可能にしてもよい。In the above-described embodiment, the structure in which the upper first collimating member 5 is fixed and the lower second collimating member 6 is moved is exemplified. However, the upper first collimating member 5 is moved and the lower first collimating member 5 is moved. It is also possible to adopt a configuration in which the two collimating members 6 are fixed. Further, in some cases, both collimating members 5 and 6 may be movable.
【0022】[0022]
【発明の効果】以上説明した様に本発明は、垂直スパッ
タ粒子により半導体基板の高低部に一様の膜厚に成膜す
るコリメートを2枚のコリメート部材の組合せにより構
成し、その開孔部の深さを任意に変更する事ができる
為、経時変化に対し常に一定のアスペクト比を保つこと
ができる。As described above, the present invention comprises a collimator formed by combining two collimating members to form a uniform film thickness on the upper and lower portions of a semiconductor substrate by vertical sputtered particles. Can be arbitrarily changed, so that a constant aspect ratio can always be maintained with time.
【0023】更に、成膜条件により所定の異なるアスペ
クト比に対応することができるという効果を有する。Further, there is an effect that it is possible to cope with predetermined different aspect ratios depending on film forming conditions.
【0024】また上記アスペクト比の一定維持やアスペ
クト比の変更を、真空処理室内を真空に維持したまま行
うことことができるから、真空処理室の内壁に付着して
いるスパッタ膜のはがれによるゴミの悪影響を発生させ
ず、かつ作業工数の無駄を無くすことができる。Further, since the aspect ratio can be kept constant or the aspect ratio can be changed while maintaining the vacuum in the vacuum processing chamber, dust generated by peeling of the sputtered film adhered to the inner wall of the vacuum processing chamber can be reduced. It is possible to prevent the occurrence of adverse effects and to avoid wasting man-hours.
【図1】本発明の一実施例のスパッタ装置の概略を示し
た断面図である。FIG. 1 is a sectional view schematically showing a sputtering apparatus according to one embodiment of the present invention.
【図2】本発明の一実施例のコリメートの動作を示した
断面図である。FIG. 2 is a sectional view showing an operation of a collimator according to one embodiment of the present invention.
【図3】本発明の一実施例のコリメートの動作を示した
断面斜視図である。FIG. 3 is a sectional perspective view showing the operation of the collimator according to one embodiment of the present invention.
【図4】従来技術のスパッタ装置の概略を示した断面図
である。FIG. 4 is a cross-sectional view schematically showing a conventional sputtering apparatus.
【図5】半導体基板のコンタクトホールにスパッタによ
り成膜した状態を例示した断面図である。FIG. 5 is a cross-sectional view illustrating a state where a film is formed in a contact hole of a semiconductor substrate by sputtering.
【図6】従来技術のコリメートを示した断面図である。FIG. 6 is a sectional view showing a conventional collimator.
1 真空処理室 2 真空ポンプ 3 ターゲット 4 半導体基板 5 第1のコリメート部材 6 第2のコリメート部材 7 コリメート 8 スパッタ粒子 9 斜めスパッタ粒子 10 垂直スパッタ粒子 11(11’,11’’) コリメート 12 コリメート11の開孔部 15 第1のコリメート部材5の円筒状部 16 第2のコリメート部材6の円筒状部 17 コリメート7の開孔部 18 モーター 19 ピニオン 20 第1のギア 21 第2のギア 22 シャフト 23 真空ベローズ 31 バリアメタル膜 32 配線膜 33 コンタクトホール REFERENCE SIGNS LIST 1 vacuum processing chamber 2 vacuum pump 3 target 4 semiconductor substrate 5 first collimating member 6 second collimating member 7 collimating 8 sputtered particle 9 oblique sputtered particle 10 vertical sputtered particle 11 (11 ′, 11 ″) collimating 12 collimating 11 15 The cylindrical part of the first collimating member 5 16 The cylindrical part of the second collimating member 6 17 The opening of the collimator 7 18 Motor 19 Pinion 20 First gear 21 Second gear 22 Shaft 23 Vacuum bellows 31 Barrier metal film 32 Wiring film 33 Contact hole
フロントページの続き (56)参考文献 特開 昭61−9574(JP,A) 特開 昭61−53717(JP,A) (58)調査した分野(Int.Cl.6,DB名) C23C 14/34 H01L 21/203Continuation of the front page (56) References JP-A-61-9574 (JP, A) JP-A-61-53717 (JP, A) (58) Fields investigated (Int. Cl. 6 , DB name) C23C 14 / 34 H01L 21/203
Claims (2)
のうち斜め方向に飛散するスパッタ粒子を排除するよう
に、前記ターゲット材と半導体基板との間に配設された
コリメートを有するスパッタ装置において、前記コリメ
ートは第1のコリメート部材の円筒状部とそれに挿入さ
れる第2のコリメート部材の円筒状部によって構成され
るコリメート開口部を有し、両円筒状部の出し入れによ
りコリメート開孔部の深さを変更できるようにしたこと
を特徴とするコリメートを有するスパッタ装置。1. A sputtering apparatus having a collimator disposed between a target material and a semiconductor substrate so as to exclude sputter particles scattered in an oblique direction from sputter particles scattered from a target material. Is the cylindrical portion of the first collimating member and
It is constituted by a cylindrical portion of the second collimating member
The collimating opening has a
Ri sputtering apparatus having a collimator, characterized in that to be able to change the depth of the collimator apertures.
半導体基板ならびに前記第1および第2のコリメート部
材が配置され、前記真空処理室外に駆動手段が配置さ
れ、真空ベローズを介して前記駆動手段が前記第1およ
び第2のコリメート部材の一方と結合していることを特
徴とする請求項1に記載のコリメートを有するスパッタ
装置。 2. The apparatus according to claim 1 , wherein the target material, the semiconductor substrate, and the first and second collimating members are disposed in a vacuum processing chamber, and driving means is disposed outside the vacuum processing chamber, and the driving means is disposed via a vacuum bellows. The sputtering apparatus having a collimator according to claim 1, wherein the sputtering apparatus is coupled to one of the first and second collimating members.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29650993A JP2833979B2 (en) | 1993-11-26 | 1993-11-26 | Sputtering device with collimator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29650993A JP2833979B2 (en) | 1993-11-26 | 1993-11-26 | Sputtering device with collimator |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH07150347A JPH07150347A (en) | 1995-06-13 |
JP2833979B2 true JP2833979B2 (en) | 1998-12-09 |
Family
ID=17834466
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29650993A Expired - Lifetime JP2833979B2 (en) | 1993-11-26 | 1993-11-26 | Sputtering device with collimator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2833979B2 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6592728B1 (en) * | 1998-08-04 | 2003-07-15 | Veeco-Cvc, Inc. | Dual collimated deposition apparatus and method of use |
JP4474109B2 (en) * | 2003-03-10 | 2010-06-02 | キヤノン株式会社 | Sputtering equipment |
WO2017158978A1 (en) * | 2016-03-14 | 2017-09-21 | 株式会社東芝 | Processing device and collimator |
TWI633197B (en) * | 2016-05-24 | 2018-08-21 | 美商伊麥傑公司 | High-precision shadow-mask-deposition system and method therefor |
CN109642313B (en) * | 2016-05-24 | 2021-03-09 | 埃马金公司 | High-precision shadow mask deposition system and method |
-
1993
- 1993-11-26 JP JP29650993A patent/JP2833979B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH07150347A (en) | 1995-06-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5795448A (en) | Magnetic device for rotating a substrate | |
US5772833A (en) | Plasma etching apparatus | |
US4844767A (en) | Method of and apparatus for etching | |
EP0529321A1 (en) | Metallic material deposition method for integrated circuit manufacturing | |
JP3296281B2 (en) | Sputtering apparatus and sputtering method | |
JP2833979B2 (en) | Sputtering device with collimator | |
JP7515664B2 (en) | Film forming apparatus and film forming method | |
JPH06136532A (en) | Magnetron spattering method and device for uniformly spattering target with substance ion | |
JPH0356671A (en) | Sputtering device | |
JPH06136527A (en) | Target for sputtering and sputtering device and sputtering method using the same | |
US5228940A (en) | Fine pattern forming apparatus | |
JPH06158299A (en) | Method and device for forming thin film and integrated circuit device | |
JP3233496B2 (en) | Vacuum deposition equipment | |
EP0753600A1 (en) | Small size sputtering target and high vacuum sputtering apparatus using the same | |
JPH09213634A (en) | Thin film-forming method manufacture of semiconductor device and thin film-forming device | |
JPH116062A (en) | Method and equipment for magnetron sputtering | |
JPH10298752A (en) | Low pressure remote sputtering device, and low pressure remote sputtering method | |
JP4437347B2 (en) | Pretreatment etching apparatus and thin film forming apparatus | |
JP3366391B2 (en) | Sputtering apparatus and sputtering film forming method | |
JP2914644B2 (en) | Wiring method for integrated circuit, wiring method for burying holes or grooves in integrated circuit, and multi-chamber substrate processing apparatus | |
JPH07316808A (en) | Sputtering device | |
JPH11302842A (en) | Sputtering method and sputtering apparatus | |
JPH10204630A (en) | Sputtering device, sputtering method and target | |
JPH10110267A (en) | Sputtering device and treatment of deposit on collimator | |
JP3683336B2 (en) | Method for forming a laminated structure |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19980825 |