JP2822394B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a semiconductor element on an insulating amorphous material.

[Prior Art] Attempts have been made to form a high-performance semiconductor element on an insulating amorphous substrate such as glass or quartz or an insulating amorphous layer such as SiO ₂ .

In recent years, as the need for large, high-resolution liquid crystal display panels, high-speed, high-resolution contact-type image sensors and three-dimensional ICs has increased, high-performance semiconductor elements on insulating amorphous materials as described above The realization of is expected.

Taking the case of forming a thin film transistor (TFT) on an insulating amorphous material as an example, (1) a TFT using amorphous silicon formed by a plasma CVD method or the like as an element material;
TFT using polycrystalline silicon formed by VD method etc. as element material,
(3) TFTs and the like using single crystal silicon formed by a melt recrystallization method or the like as an element material are being studied.

However, among these TFTs, TFTs using amorphous silicon or polycrystalline silicon as an element material have significantly lower field-effect mobility than TFTs using single crystal silicon as an element material (amorphous silicon). TFT <1 cm ² / V · sec, polycrystalline silicon TFT 10 cm ² / V · sec), and it was difficult to realize a high-performance TFT.

On the other hand, the melting recrystallization method using a laser beam or the like is not yet a fully-completed technique, and technical difficulties arise when elements must be formed in a large area such as a liquid crystal display panel. Especially large.

[Problems to be Solved by the Invention] Therefore, as a simple and practical method of forming a high-performance semiconductor element on an insulating amorphous material, a method of growing polycrystalline silicon having a large grain size in a solid phase attracts attention. And research is ongoing. (Thin Solid Films 100 (1983) p.227, JJ
AP Vol.25 No.2 (1986) p.L121) However, according to the conventional technology, after polycrystalline silicon is formed by a CVD method and Si ⁺ is ion-implanted to make the polycrystalline silicon amorphous, The heat treatment at about 600 ° C. was performed for nearly 100 hours. Therefore, an expensive ion implantation apparatus is required, and the heat treatment time is extremely long.

Accordingly, the present invention provides a method for forming polycrystalline silicon having a large grain size by a simpler and more practical method.

[Means for Solving the Problems] A method of manufacturing a semiconductor device according to the present invention comprises the steps of forming a first amorphous silicon layer on a substrate at 500 ° C. to 560 ° C. by LPCVD, Forming a second amorphous silicon layer on the silicon layer by vacuum deposition at a degree of vacuum of about 10 ⁻⁵ Pa or less, and crystallizing the first and second amorphous silicon layers by heat treatment. Forming a semiconductor element on the first and second amorphous silicon layers on which crystals have been grown.

In the method of manufacturing a semiconductor device according to the present invention, the first amorphous silicon layer has a thickness of 500 to 1000 Å.

In the method of manufacturing a semiconductor device according to the present invention, the thickness of the second amorphous silicon layer is 100 to 3000 Å.

Embodiment FIG. 1 is an example of a manufacturing process diagram of a semiconductor device according to an embodiment of the present invention. FIG. 1 shows an example in which a thin film transistor (TFT) is formed as a semiconductor element.

In FIG. 1, (A) shows a first amorphous material on an insulating amorphous material 101 such as an insulating amorphous substrate such as glass or quartz or an insulating amorphous material layer such as SiO _2. This is a step of forming the quality silicon layer 102. As a method for forming the first amorphous silicon layer, for example, there is a method of forming an amorphous silicon film having a thickness of about 50 ° to 1000 ° at about 500 ° C. to 560 ° C. by an LPCVD method. The method is not limited to this, and the polycrystalline nucleus generation density by heat treatment at about 550 ° C. to 650 ° C. is higher than that of the second amorphous silicon (preferably,
(About less than one crystal nucleus in 1 μm square) It is important that the film is an amorphous silicon film. (B) is a step of laminating a second amorphous silicon layer 103 on the first amorphous silicon layer 102. As a method for forming the second amorphous silicon layer,
For example, film thickness 10 ^-5 Pa about a degree of vacuum below a vacuum deposition method 10
For example, there is a method of forming an amorphous silicon film of about 0 ° to 3000 °. The film formation method is not limited to this, and the polycrystalline nucleus generation density is lower than that of the first amorphous silicon film (preferably, heat treatment at about 550 ° C. to 650 ° C. is performed for several tens of hours. It is important that the silicon is amorphous silicon. (C) is a step of polycrystallizing the first and second amorphous silicon layers by heat treatment. The optimum heat treatment temperature varies depending on the film formation conditions of the first and second amorphous silicon layers, but heat treatment is performed at about 550 ° C. to 650 ° C. for about 2 to 10 hours in an atmosphere of an inert gas such as nitrogen or Ar. Thus, a polycrystalline silicon layer 104 is formed. The mechanism is as follows.
A crystal nucleus is generated in the amorphous silicon layer, and then the second amorphous silicon layer is crystallized using the crystal nucleus as a seed to form a polycrystalline silicon layer 104 having a large grain size.
(D) is a step of forming a semiconductor element on the polycrystalline silicon layer. FIG. 1D shows an example in which a TFT is formed as a semiconductor element. In the figure, 105 is a gate electrode, 106 is a source / drain region, 10
7 is a gate insulating film, 108 is an interlayer insulating film, 109 is a contact hole, and 110 is a wiring. As an example of the TFT formation method, the polycrystalline silicon layer 104 is patterned and a gate insulating film is formed. The gate insulating film is formed by thermal oxidation (high-temperature process) and CVD or plasma CVD at 600 ° C.
There is a method (low-temperature process) of forming at a low temperature of the order of magnitude or less. In the low-temperature process, an inexpensive glass substrate can be used as a substrate, so that semiconductor devices such as large liquid crystal display panels and contact image sensors can be manufactured at low cost.
Even when a three-dimensional IC or the like is formed, a semiconductor element can be formed in an upper layer without giving a bad influence (for example, diffusion of an impurity) to an element in a lower layer. Subsequently, after forming the gate electrode, the source / drain region is ion-implanted,
The interlayer insulating film is formed by a thermal diffusion method, a plasma doping method, or the like, and an interlayer insulating film is formed by a CVD method, a sputtering method, a plasma CVD method, or the like.
Further, a TFT is formed by forming a contact hole in the interlayer insulating film and forming a wiring.

The field-effect mobility of a low-temperature process TFT (N-channel) manufactured by the method of manufacturing a semiconductor device according to the present invention is 100
150150 cm ² / V · sec, and a high-performance TFT could be formed on a glass substrate. This became possible as a result of the fact that a polycrystalline silicon film having a large grain size could be formed with good reproducibility by the manufacturing method of the present invention. Furthermore, when the step of exposing the semiconductor element to a plasma atmosphere of a gas containing hydrogen gas or the like is provided in the TFT manufacturing step, the density of defects existing at the crystal grain boundaries is reduced, and the field effect mobility is further improved.

The present invention can be applied not only to the TFT shown in the embodiment of FIG. 1 but also to insulated gate semiconductor devices in general, and to bipolar transistors, electrostatic induction transistors, photovoltaic cells such as solar cells and optical sensors, and the like. This is a very effective manufacturing method when a semiconductor element such as a conversion element is formed using a polycrystalline semiconductor as an element material.

Next, the technical background that led to the present invention will be described. In order to grow amorphous silicon into large-grain polycrystalline silicon in a solid phase, we have developed a method of forming amorphous silicon and the quality of polycrystalline silicon (crystal grain size, orientation, crystallization). Degree)
And examined the relationship. As a result, the following became clear.

(1) The polycrystalline nucleus generation density and the time until polycrystalline nuclei are generated by the heat treatment differ depending on the method of forming amorphous silicon.

(2) For example, in the case of a silicon film formed by the LPCVD method, at a film formation temperature of about 590 ° C., a particle size of 200 to 30 is contained in an amorphous phase.
It is polycrystalline or microcrystalline silicon having crystal grains of about 0 °. Therefore, even if the film is heat-treated at about 600 ° C., almost no increase in the crystal grain size is observed. Also,
The film formed at a film formation temperature of 500 ° C to 560 ° C is amorphous, but the polycrystalline nucleus generation density and the time until polycrystalline nuclei are generated by heat treatment at about 600 ° C differ depending on the film forming temperature. Was. That is, when the film forming temperature is 560 ° C., the polycrystalline nucleus generation density is high and the crystal grain size is about 1000 ° at most (however, the time required for polycrystallization is as short as about 1 to 2 hours). As the temperature is lowered, the polycrystalline nucleus generation density is lowered. It was formed by moderate heat treatment. (However, the time required for polycrystallization depends on the film formation temperature 54
It took about 5 hours at 0 ° C. and 20 hours or more at 500 ° C. (3) Even under the same film forming conditions, if the film thickness is reduced, the polycrystalline nucleus generation density tends to decrease.

(4) In the case of a silicon film formed by a vacuum evaporation method or a plasma CVD method, the polycrystalline nucleus generation density can be further reduced as compared with a film formed by a CVD method. For example, in the case of the vacuum deposition method, the substrate temperature is 100 ° C at a degree of vacuum of about 10 ⁻⁶ Pa or less.
A polycrystalline silicon film having a crystal grain size exceeding 5000 mm was formed by performing a heat treatment at 600 ° C. for about 50 hours on the amorphous silicon film formed at about 100 ° C. When the heat treatment temperature is lowered to about 550 ° C., polycrystalline silicon having a grain size of 1 μm or less can be formed. In that case, the heat treatment time required for polycrystallization requires 100 hours or more.

Based on the above results, the result of study for forming polycrystalline silicon having a large grain size is the manufacturing process of the present invention shown in FIG. The technical point is that, by laminating an amorphous silicon film with a low density of polycrystalline nuclei and an amorphous silicon film with a relatively high density of polycrystalline nuclei and performing solid phase growth, it is possible to achieve a large amount of heat in a short time. The point is that a polycrystalline silicon film having a grain size can be formed.

In FIG. 1, (A) is a step of forming a first amorphous silicon film having a relatively higher polycrystalline nucleus generation density than the second amorphous silicon film. As a method of forming the film, as described above, for example, there is a method of forming an amorphous silicon film having a thickness of about 50 ° to 1000 ° at about 500 ° C. to 560 ° C. by the LPCVD method. A method of forming a polycrystalline silicon film at 590 ° C. or higher by LPCVD is also conceivable, but the crystal grain size is as small as about 200 to 300 mm, and the amorphous silicon film stacked on Since solid phase growth is performed on polycrystalline silicon having a particle size, it is difficult to increase the particle size. In contrast, 500 ℃ ~ 5
Amorphous silicon formed at 60 ° C has a polycrystalline nucleation density (60
Nucleation density when heat-treated at about 0 ° C) is low, and when the film thickness is 1000Å, there is only one crystal angle per 1000Å-5000Å angle. It was found that the generation density further decreased. For example,
When an amorphous silicon film of about 50 ° to 100 ° was formed at about 500 ° C. to 560 ° C. by the LPCVD method, the nucleation density could be suppressed to one or less per 1 μm square. (The time until polycrystalline nuclei were generated tended to be shorter as the film formation temperature was higher. Also, as the film formation temperature was lower, the nucleation density tended to be lower even when the film thickness was increased. Therefore, considering the shortening of the heat treatment time and the controllability of the film thickness, the film forming temperature is particularly preferably about 530 ° C. to 550 ° C.) The second amorphous silicon film is formed by the first amorphous silicon film. Since the crystal is grown using the crystal nucleus as a seed, polycrystalline silicon having a grain size of 1 μm or more can be obtained by using the amorphous layer having a low nucleation density as described above, which is particularly suitable as the first amorphous silicon layer. I have.

For the first amorphous silicon layer, for example, even in the case of microcrystalline silicon in which a minute crystal region exists in an amorphous phase other than the amorphous phase, the film thickness and the like are optimized to reduce the crystal nucleus density. It is effective if reduced. It should be noted that, even with microcrystalline silicon, as the size of the microcrystalline region becomes smaller, it becomes difficult to distinguish it from amorphous silicon, which has a relatively high polycrystalline nucleus generation density.

The method for forming the first amorphous silicon layer is not limited to the CVD method, but may be a plasma CVD method, an optical CVD method,
It can also be formed by the E method or the like. For example, plasma C
In the VD method, a film formed by setting the substrate temperature to a relatively high temperature of 300 ° C. to 500 ° C. satisfies the above conditions well. It is important that the first amorphous silicon layer has a relatively high polycrystalline nucleus generation density as compared with the second amorphous silicon layer, and is a film in which crystal nuclei are generated by a short heat treatment.

(B) is a step of forming an amorphous silicon film having a low polycrystalline nucleus generation density. As the film forming method, film thickness 10 ^-5 Pa about the following degree of vacuum as described above, for example, a vacuum deposition method 10
For example, there is a method of forming an amorphous silicon film of about 0 ° to 3000 °. An important point in the film quality of the second amorphous silicon layer is that the heat treatment at about 550 ° C. to 650 ° C. requires that polycrystalline nuclei hardly occur or the time required to generate polycrystalline nuclei needs to be sufficiently long. For that purpose, it is necessary to form a random amorphous silicon film having less regularity. Specifically, EB
In addition to vacuum evaporation methods such as evaporation methods, MBE method, plasma CVD method,
An amorphous silicon film formed by a sputtering method, a CVD method in which the substrate temperature is cooled to about 500 ° C. or lower, or the like is suitable. In particular, EB
An amorphous silicon film formed at a substrate temperature of less than about 200 ° C. by the MBE method or the MBE method is suitable because polycrystalline nuclei hardly occur.

Further, when a second amorphous silicon layer is stacked on the first amorphous silicon, removal of a natural oxide film existing on the first amorphous silicon layer makes it possible to improve film quality and crystallinity. It proved to be effective for improvement. If heat treatment is performed in a hydrogen gas atmosphere or a hydrogen plasma atmosphere before stacking the second amorphous layer, the oxide film on the first amorphous layer can be removed. In addition, a method of continuously forming the first amorphous layer and the second amorphous layer without breaking vacuum is also effective.

When a first amorphous silicon layer having a relatively high polycrystalline nucleus generation density and a second amorphous silicon layer in which polycrystalline nuclei are hardly generated are laminated and subjected to a heat treatment at about 550 ° C. to 650 ° C., , First
A crystal nucleus is generated in the amorphous silicon layer. (In addition, the time required for nucleation is as short as several hours.)
Using the crystal nuclei generated in the first amorphous silicon layer as seeds, the second amorphous silicon layer is polycrystallized. Since polycrystalline nuclei are unlikely to be generated in the second amorphous silicon layer, crystal growth is unlikely to occur from locations other than the crystal nuclei generated in the first amorphous silicon layer. As a result, selective crystal growth using the crystal nucleus as a seed is performed, and polycrystalline silicon having a large grain size is formed.

Subsequently, the features of the present invention will be described in comparison with the case where only one of the first amorphous silicon and the second amorphous silicon is subjected to solid phase growth.

An object of the present invention is to form polycrystalline silicon having a large grain size by a heat treatment in a short time and by a simple manufacturing process. When only the second amorphous silicon film is grown by solid phase, there is a disadvantage that a long-time heat treatment is required. When the heat treatment temperature is increased to, for example, 800 ° C. or higher in order to shorten the heat treatment time, the density of polycrystalline nuclei sharply increases, and only polycrystalline silicon having a grain size of about 200 to 300 ° can be obtained at most.

In addition, the thickness of the first amorphous silicon layer alone cannot be reduced freely in order to reduce the density of crystal nuclei, but the first amorphous silicon layer and the second amorphous silicon When a structure in which layers are stacked is employed, there is an advantage that the thickness of the first amorphous silicon layer for generating crystal nuclei can be arbitrarily set. That is, as described above, even under the same film forming conditions, the polycrystalline nucleus generation density can be reduced as the film thickness is reduced.
It is also possible to form the remaining film thickness of the second amorphous silicon by making it as thin as possible.

Although FIG. 1 shows an example in which an amorphous silicon layer in which polycrystalline nuclei are unlikely to be generated is laminated on an amorphous silicon layer having a relatively high polycrystalline nucleus generation density, the laminating order may be reversed. Good. That is, an amorphous silicon layer having a relatively high polycrystalline nucleus generation density may be stacked on an amorphous silicon layer in which polycrystalline nuclei are unlikely to be generated.

[Effects of the Invention] As described above, according to the present invention, a polycrystalline silicon film having a large grain size can be formed by a simpler manufacturing process. As a result, high-performance semiconductors can be formed on insulating amorphous materials, and large, high-resolution liquid crystal display panels, high-speed, high-resolution contact-type image sensors, and three-dimensional ICs can be easily formed. Now you can.

Further, since the present invention only requires a low-temperature heat treatment of at most about 650 ° C., (1) an inexpensive glass substrate can be used as the substrate. (2) In a three-dimensional IC, a semiconductor element can be formed in an upper layer portion without giving an adverse effect (for example, diffusion of an impurity) to an element in a lower layer portion. There are merits such as.

The present invention can be applied not only to the TFT shown in the embodiment of FIG. 1 but also to insulated gate semiconductor devices in general, and to bipolar transistors, electrostatic induction transistors, photovoltaic cells such as solar cells and optical sensors, and the like. This is a very effective manufacturing method when a semiconductor element such as a conversion element is formed using a polycrystalline semiconductor as an element material.

[Brief description of the drawings]

1 (a) to 1 (d) are manufacturing process diagrams of a semiconductor device according to an embodiment of the present invention. 101 insulating amorphous material 102 first amorphous silicon layer 103 second amorphous silicon layer 104 polycrystalline silicon layer 105 gate electrode 106 source / drain region 107 gate insulating film 108 interlayer insulating film 109 contact hole 110 wiring

Claims (3)

(57) [Claims] A step of forming a first amorphous silicon layer on the substrate by LPCVD at 500 ° C. to 560 ° C .; and a step of vacuum depositing a second amorphous silicon layer on the first amorphous silicon layer. forming at degree of vacuum of about 10 ^-5 Pa by law, a step of crystal growth by heat treating the first and second amorphous silicon layer, the crystal grown the first and second amorphous Forming a semiconductor element on a silicon layer. 2. The method according to claim 1, wherein said first amorphous silicon layer has a thickness of 500 to 1
2. The method according to claim 1, wherein the thickness is 000 angstroms.
The manufacturing method of the semiconductor device described in the above. 3. The film thickness of the second amorphous silicon layer is 100 to 3
2. The method for manufacturing a semiconductor device according to claim 1, wherein the thickness is 000 angstrom.