JP2819840B2 - How to fill contact holes - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for embedding a contact hole in an integrated circuit or the like.

[0002]

2. Description of the Related Art As a conventional method of filling a contact hole using a selective chemical vapor deposition method, a contact hole is opened in an interlayer insulating film, and the difference in activity between the interlayer insulating film and the film deposition of a substrate is utilized. And selectively forming an aluminum film only inside the contact hole (Digest of Papers 1990 Third Microprocess Conference, Digest O
f Papers 3rd MicroProcess
Conference, p. 138, 1990).

[0003]

In the above-described method of selectively forming a metal film inside a contact hole, even if the interlayer insulating film is inactive with respect to the deposition of the conventional film, the film may be formed by adhesion of impurities or dust. Since the metal film is activated with respect to the deposition and the metal film is deposited, complete selective deposition cannot be performed, and there is a disadvantage that the shape and quality of the metal film formed next over the entire surface are deteriorated.

[0004]

According to a method of filling a contact hole of the present invention, a thin film which is inactive with respect to selective chemical vapor deposition of a metal film, for example, a resist, calix arene or the like is formed on an interlayer insulating film. After opening a contact hole through both the thin film and the interlayer insulating film, the metal film is formed in the contact hole by selective chemical vapor deposition, and then the thin film is peeled off.

[0005]

According to the contact hole filling method of the present invention, a metal film is formed inside a contact hole by selective chemical vapor deposition, but the metal film is formed on a thin film having insufficient selectivity and inert to film deposition. Even if there is some accumulation, they can be removed by peeling them. Therefore, no metal film is formed on the interlayer insulating film, and the metal film is formed only inside the contact hole formed by etching.
Perfect selection embedding becomes possible. Since the metal deposited on the thin film inert with respect to the film deposition is island-shaped, the removal of the thin film inert with respect to the film deposition and the island-shaped metal deposited thereon can be easily and completely performed.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIGS. 1A to 1C are sectional views showing main steps in a first embodiment of the present invention. This embodiment exemplifies a case where the present invention is applied to a contact hole for forming a wiring in a silicon integrated circuit.

Using standard integrated circuit fabrication techniques, FIG.
The structure after the contact hole shown in FIG.
In the figure, 1 is a silicon substrate, 2 is a silicon oxide film,
3 is a resist. Next, as shown in FIG. 1B, a metal film 4 is deposited only inside the contact hole. In this embodiment, an aluminum film is formed by a selective chemical vapor deposition method using the thermal decomposition of dimethyl aluminum hydride. The deposition temperature is 240 ° C. and the pressure in the growth chamber is 2 Torr.
r, the flow rate of hydrogen as a carrier gas is 60 sccm. The island-shaped metal film 5 is deposited on the resist 3 due to insufficient selectivity. Next, as shown in FIG. 1C, when the resist 3 is peeled off, the island-shaped metal film 5 deposited on the resist 3 is also removed at the same time, and only the contact holes are left in the metal film 4.
Embedded by

In this embodiment, since the metal film is formed by performing the selective vapor phase chemical deposition before the resist is stripped, only the contact holes can be buried without adding a manufacturing process.

Although a silicon oxide film is used as an interlayer insulating film in this embodiment, it goes without saying that a similar effect can be obtained by using boron-doped phosphorus glass or the like.

FIGS. 2A to 2D are cross-sectional views showing main steps in a second embodiment of the present invention. This embodiment exemplifies a case where the present invention is applied to a contact hole for forming a wiring in a silicon integrated circuit.

Using standard integrated circuit fabrication techniques, FIG.
2A shows the structure before the contact hole is buried. In the figure, 1 is a silicon substrate, 2 is a silicon oxide film, 3 is a resist, and 6 is an inert thin film. In this embodiment, a case where calix arene is used as the inert thin film 6 will be exemplified. Next, as shown in FIG. 2B, a metal film 4 is deposited by a selective chemical vapor deposition method. At this time, the island-shaped metal film 5 is deposited on the thin film 6 which is originally inert with respect to the deposition of the film. Also in this embodiment, an aluminum film is formed by the selective vapor phase chemical growth method using the same thermal decomposition of dimethyl aluminum as in the above embodiment. The island-shaped metal film 5 is deposited on the resist due to insufficient selectivity. Next, FIG.
(C) Then, as shown in FIG. 2 (c), the inert thin film 6 is peeled off. Calixarene can be easily peeled off with an organic solvent. At this time, the island-shaped metal film 5 deposited on the inert thin film 6 is also peeled off at the same time.

In this embodiment, calix arene is used as an inert thin film for film deposition. However, any thin film which can be removed by a solution or gas which does not attack the interlayer insulating film and the deposited metal film can be used. It goes without saying that you can do it.

[0014] Note that in the above two embodiments has been exemplified a case of using a divorced integrated circuit, it is needless to say that a similar effect can be applied to a compound integrated circuit is obtained. Further, the material of the bottom of the contact hole is not limited to single crystal silicon, but may be polycrystalline silicon, or Ti, TiN, T
A metal or metal compound such as iW or WSi ₂ may be used.

[0015]

As described above, according to the present invention, a metal film is formed inside a contact hole by selective chemical vapor deposition, but a thin film which is inactive with respect to film deposition even if selectivity is insufficient is removed. By doing so, the metal film deposited on the thin film that is inactive with respect to the deposition of the film can be removed, so that only the contact holes can be completely and selectively filled with the metal film.

Accordingly, there is an effect that the quality of a metal film used for an integrated circuit or the like can be improved.

[Brief description of the drawings]

FIG. 1 is a main process diagram of a first embodiment of the present invention.

FIG. 2 is a sectional view showing main steps of a second embodiment.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 silicon substrate 2 silicon oxide film 3 resist 4 metal film 5 island-shaped metal film 6 inert thin film

Claims (1)

(57) [Claims] 1. Inactive for selective gas phase chemical deposition of metal films
After forming a calixarene, which is a conductive thin film, on the interlayer insulating film and opening a contact hole through both the calixarene and the interlayer insulating film, the metal film is formed in the contact hole by selective chemical vapor deposition. Forming a calix arene and subsequently removing the calix arene .