JP2817893B2 - Device status reporting method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] In the present invention, in a switching system, each signaling device sends to a processing device various status information necessary for switching connection and information such as occurrence of a fault in the signaling device. And a device status reporting method for reporting as a device status. [Prior art] In such a conventional device status reporting method, an interrupt notification unit is provided in a device for a processing device interface between a processing device and a signaling device, and when a signaling device reports a device status, When the interrupt notification means is activated and the permission is received from the processing device, the device status is stored in a specific area of the main storage unit in the processing device. When the processing device detects the interrupt notification, it analyzes the cause of the interrupt. In general, a method of reading the device status from a specific area of a main storage unit corresponding thereto has been generally used (specifically, such a method is adopted in a D10 switch, a D70 digital switch, a D51 packet switch, and the like). There). [Problems to be Solved by the Invention] In such a conventional device status reporting method, since the interrupt notification means is used not only for the signal device but also for the devices around the processing device, there are many analysis factors of the interrupt notification in the processing device. In other words, if this analysis is performed by the processing device every time a frequently transmitted / received signal is transmitted / received, there is a problem that the processing overhead increases and the processing efficiency is impaired. SUMMARY OF THE INVENTION It is an object of the present invention to provide an apparatus status reporting method capable of improving processing efficiency without increasing processing overhead in a processing apparatus. [Means for Solving the Problems] To achieve the above object, the present invention provides an apparatus status reporting system including a plurality of signal devices, a processing device interface device, and a processing device, wherein the plurality of the signal devices are used. Is connected to the processing device via the processing device interface device, the signal device includes a plurality of line corresponding units, a direct memory access (DMA) device, a processor, and a buffer memory. A main storage device, the main storage device having a unique area corresponding to each of the signaling devices, and a table for storing address information of each of the unique areas, wherein the unique area is a device status of the signaling device. A device status information storage area for storing information and a head indicating the head address of the device status information storage area to be read next by the processing device. A signal pointer, and a write pointer indicating a head address of the device state information storage area to be written next by the signal device, wherein the processor in each signal device reads data in the unique area corresponding to its own signal device. Means for reading and comparing the pointer and the write pointer, and comparing the result of the comparison to the device status information storage area indicated by the write pointer if the write pointer is ahead of the read pointer via the DMA device. Means for terminating the process without performing the write if not preceding, and means for updating the write pointer to an address to be written next when the write is performed, and a processor in the processing device. Are read pointers in each specific area sequentially according to the address information stored in the table at a fixed cycle. Means for reading out and comparing with the write pointer; and, if the result of the comparison indicates that the write pointer is ahead of the read pointer, read out the device status information stored in the device status information storage area indicated by the read pointer, and read out the device. If not, means for terminating the process without performing the reading,
Means for updating the read pointer to an address to be read next when the reading is performed. [Operation] The processor on each signal device side stores a specific area assigned to each signal device in the main storage unit of the processing device,
Using a DMA device, write all the device states to be reported to the processing device side of the own signal device, and the processor on the processing device side monitors each area of the main storage unit at regular intervals and writes the device Read the status. In the prior art, an interrupt notification was sometimes used at the time of reporting a device state. In contrast, in the present invention, a processor in a processing device looks up a main storage unit at regular intervals to receive a report. The present invention differs from the prior art in that interrupt notification is not used. Embodiment Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing one embodiment of the present invention. In the figure, 1 is a processing device, 1a is a processor included therein, 1b is a main storage unit, 2 is a processing device interface device, 3 is a signal device, and 3a is a DMA (direct memory access) included therein. A device (including an interface circuit), 3b is a processor, 3c buffer memory, and 3d is a line corresponding unit. The main storage unit 1b of the processing device 1 stores programs and data for controlling various types of exchange control.
1a executes various controls in accordance with information stored in the main storage unit 1b. The processor 3b in the signal device 3 has a ROM (read only memory) for storing programs and data therein, and executes various controls using the buffer memory 3c. The line corresponding unit 3d executes link control of the line, and the result is edited and stored in the buffer 3c. The DMA device 3a is connected to the processing device interface device 2 and is under the control of the processor 3b. Next, the circuit operation related to the present invention will be described. The main memory 1b of the processing device 1 is provided with an area for writing a device state corresponding to the signal device (only one signal device 3 is shown in FIG. Is similarly connected to the processing device interface device 2.) On the signal device 3 side, device status information is written into the buffer memory 3c from the line corresponding unit 3d or the like, and it is necessary to report it to the processing device 1 side. Occurs, the DMA device 3a reads the device status information edited and stored in the buffer memory 3c under the control of the processor 3b, and reads the device status information as a device status signal through the processor interface device 2 in the processing device 1. Write to the corresponding area of the storage unit 1b. The processor 1a of the processing device 1 monitors each area of the main storage unit 1b at regular intervals, and receives a report of device status information by reading the device status therefrom. FIG. 2 is an explanatory diagram showing a device state write area provided for the signal device in the main storage unit 1b. As shown in FIG. 2, a write area is provided corresponding to a signal device as a status report area for the device 1, a status report area for the device 2, and a status report area for the device n. The start address is stored in the status report area start address table, that of device 1 as ESTA1, that of device 2 as ESTA2, and so on. In each area, a write pointer (pointer indicating an address to be written next) is located at A, and a read pointer (pointer indicating an address to be read next) is located at B following the head address. An information storage area is configured. As described above, the DMA device 3a writes the device state information from the signal device 3 to the storage area depending on the write pointer A, and the processing device 1 reads the device state information from the storage area based on the read pointer B from the processor 1a. Is read. FIG. 3 is a flow chart showing a flow of the operation in which the processor 3b of the signal device 3 performs the write processing. FIG. 3 will be described briefly. At the time of initial setting, the head address of the area in the main storage unit 1b is notified to the signal device 3 side. Therefore, when it becomes necessary to report the device status information, the processor 3b of the device 3 determines in step S1 the write pointer A and the read pointer B from the main storage unit 1b using the already notified head address.
Is read. Next, in step S2, the two pointers are compared, and if the write pointer A is ahead of the read pointer B,
It is determined that there is a free area (that is, even if data is written in the area of the address determined by the write pointer A, it is not overwritten on the area that has not yet been read), and the process proceeds to the next step S3. Then, in step S3, an address indicated by the write pointer A is added to the head address, and two addresses of the pointers A and B are further added thereto to obtain a true address where device status information is to be written. Write. Next, the process proceeds to step S4 to update the write pointer A. FIG. 4 is a flowchart showing a flow of the operation in which the processor 1a of the processing device 1 performs the reading process. That is, the read pointer B in the corresponding status report area is read, the read address is calculated using the read pointer B, the new device status information is read, and then the read pointer B is updated. Needless to say, the processing flow is the same as the processing flow. As described above, the signal device 3 can share the DMA device used for transmitting and receiving signals also for reporting device status information, and can reduce the processing load on the processor 3b.
Since the processing device 1 prepares a dedicated process for detecting device status information on the signal device 3 side, it reports a signal transmission / reception operation with a high frequency of occurrence, a relatively infrequent instruction execution result, and a A report such as an autonomous operation result can be uniformly received by the same method, and the processing overhead on the processing device 1 side can be reduced. Also, by providing an area for reporting device status information in the main storage unit 1b for each DMA device, it is possible to easily prevent memory contention,
The present invention can be realized in a similar manner regardless of the signal device as long as the device has a function. [Effects of the Invention] As described above, according to the present invention, an area for reporting status information of a signaling device is provided in a main storage unit of a processing device of an exchange, and the signaling device side receives a normal signal transmission / reception result, Instruction execution results and the like are uniformly stored in the area using a DMA device, and the processing device side has dedicated processing steps for accessing the area at regular intervals, so that processing overhead in the processing device is small. There is an advantage that a device status reporting method can be provided.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing one embodiment of the present invention, FIG. 2 is an explanatory diagram showing a device state signal writing area provided in a main storage section corresponding to a signal device, FIG. FIG. 4 is a flow chart showing the flow of the operation in which the processor on the signal device side performs the write processing, and FIG. 4 is a flow chart showing the flow of the operation in which the processor on the processing device side performs the read processing. DESCRIPTION OF SYMBOLS 1 Processing unit 1a Processor 1b Main storage unit
2 ... Processing device interface device, 3 ... Signaling device, 3a ... DMA device, 3b ... Processor, 3c ... Buffer memory, 3d ... Line corresponding unit

Continuation of front page    (72) Inventor Masakazu Shimada               3-9-11 Midoricho, Musashino City Nippon Telegraph and Telephone               Telecommunications Network Laboratory 1 (72) Inventor Hideo Takamura               3-9-11 Midoricho, Musashino City Nippon Telegraph and Telephone               Telecommunications Network Laboratory 1

Claims (1)

(57) [Claims] An apparatus status reporting method including a plurality of signal devices, a processing device interface device, and a processing device, wherein the plurality of signal devices are connected to the processing device via the processing device interface device, and the signal device is A plurality of line corresponding units, a direct memory access (DMA) device, a processor, and a buffer memory; the processing device includes a processor and a main storage device; and the main storage device corresponds to each of the signal devices. A fixed area, a device state information storage area for storing device state information of the signaling device, and a table to be read next by the processing device. A read pointer indicating a head address of a device status information storage area, and the device status information to be written next by the signal device. Means for reading and comparing a read pointer and a write pointer in the unique area corresponding to the own signal device with a write pointer indicating a head address of a storage area; As a result, if the write pointer is ahead of the read pointer, the device status information is written to the device status information storage area indicated by the write pointer via the DMA device, and if not, the write is not performed and the process ends. And a means for updating the write pointer to an address to be written next when the writing is performed, wherein the processor in the processing device sequentially performs each of the processes according to the address information stored in the table at a constant cycle. Means for reading and comparing the read pointer and the write pointer in the unique area, and writing the result of the comparison Means for reading out the device status information stored in the device status information storage area indicated by the read pointer if the pointer is ahead of the read pointer, and terminating the process without performing the readout if not leading; Means for updating the read pointer to an address to be read next when the operation is performed.