JP2816917B2 - Wireless receiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to a radio receiver for demodulating a linearly modulated signal. The present invention is suitable for use in mobile radio communication. INDUSTRIAL APPLICABILITY The present invention is suitable for use in wireless communication for receiving a burst signal and time division multiple access (TDMA) communication. The present invention is suitable for wireless communication in which the reception level fluctuates rapidly due to fading or the like. The present invention is very effective when used for diversity reception.

[0002] Here, the linear modulation signal refers to a signal including both a phase modulation component and an amplitude modulation component modulated by the same modulation signal. In this specification, "phase modulation"
Is defined as a concept including phase modulation and frequency modulation in a narrow sense.

[0003] In order to effectively use radio waves, a linearly modulated signal is converted into a digital signal as a signal which is necessarily accompanied by an amplitude modulation component by passing a phase-modulated signal through a filter having a narrow passing frequency band. It is widely used for modulation or analog voice modulation mobile radio communication systems.

[0004]

2. Description of the Related Art When a modulated wave is received by wireless communication or the like, the level of the received wave often fluctuates largely due to fading or the like. When the modulation type is constant amplitude modulation such as frequency modulation (FM), a limiter amplifier is used as a reception amplifier. At this time, the output amplitude is constant irrespective of the input level, but since the frequency or phase is modulated at a constant amplitude from the beginning, there is no deterioration in transmission characteristics due to the constant amplitude.

On the other hand, in the linear modulation method having higher frequency use efficiency than the constant amplitude modulation, the above-described limiter amplifier cannot be applied because the amplitude component also has information. For this reason, generally, in order to receive a linear modulation wave, an automatic gain adjustment type (AG
C) Linear amplification detectors using amplifiers have been used.
A conventional example will be described with reference to FIG. FIG. 18 is a block diagram of a conventional apparatus. FIG. 18A shows a configuration for performing diversity reception. FIG. 18B shows a specific example of the linear amplification detectors 54 and 55 in FIG. The signal received by the antenna of the diversity receiver is amplified and frequency-converted, passes through band-pass filters 50 and 51, is amplified by the AGC amplifier 60, and the complex detector is extracted by the IQ detector 61.
The envelope component of the signal amplified by the AGC amplifier 60 is extracted by the envelope detector 62 and, via the gain control circuit 63, the AGC is performed so that the average level of the output signal becomes constant.
The gain of the amplifier 60 is controlled. Also, the gain control signal 6
4 is also output for diversity combining.

Various methods are conceivable for diversity combining processing. FIG. 18A shows a method when a pseudo random signal for amplitude / phase estimation is inserted into a transmission signal. The operation of the amplitude and phase estimators 52 and 53 will be described in detail below. The pseudo-random signal is converted to an amplitude / phase estimator 5
Input to a correlation detector (not shown) at 2 and 53,
When the complex correlation is obtained, the amplitude and the phase of the carrier component of the complex envelope are extracted. The actual level of the received wave can be obtained by performing a correction according to the gain of the AGC amplifier 60 using the amplitude extracted by the correlation. First, the phase and amplitude of the carrier component extracted by complex correlation, and expressed by complex amplitude w _n. For w _n , generate its complex conjugate w _n ^* . Since the complex envelope and the complex amplitude w _n are extracted from the AGC-amplified signal, a true input level value cannot be obtained unless the gain of the AGC amplifier 60 in the linear amplification detectors 54 and 55 is corrected. Therefore, the correction is performed using the gain of each branch. First, it is necessary to divide the complex envelope of each branch by the amplitude gain G _on of each branch. Similarly, it is necessary to the complex conjugate w _n ^* and w _n ^* / G _on.
In FIG. 18, the complex multipliers 56 and 57 of each branch perform the weighting of these two correction diversity combinations simultaneously. That is, a product signal of the complex envelope and w _n ^* / G _on ² is generated and synthesized. Finally, the synthesized signal is determined, and the result is output. Although the above description is a method for obtaining the maximum ratio combination, a high-level complex envelope is selected from the gain control signal, that is, the complex conjugate w _n
^{If * is set} to 0 or 1, selective synthesis can be obtained. further,
If w _n ^* / (G _ON | w _n |) is multiplied, the complex envelope becomes 1 / G _on gain correction and the weighting becomes 1 for all branches, so that the product signal of each branch is synthesized. Obtains equal gain combining.

[0007]

When the automatic gain control circuit connected in negative feedback to the main circuit for demodulating the linear modulation signal is used, the time constant of negative feedback must be increased to some extent for stable control. is required. Therefore, it responds well to a slow change in the received signal level, but if the change in the received signal level is small and fast, a control delay occurs in the control loop and the average output level cannot be kept constant. That is, if the repetition cycle of fading is short, sufficient response characteristics cannot be obtained, and the effect cannot be effectively exhibited even when diversity reception is performed. Also, in a method of intermittently transmitting and receiving a burst signal such as a time division multiple access (TDMA) communication method, the reception level becomes unstable at the beginning and end of the burst signal, and information errors may occur. It becomes impossible to use properly.

The present invention is an improvement of the present invention. A linear modulation signal which has a fast response speed, can receive signals effectively even when the level fluctuation of the received signal is small and fast, and whose operation is stable. It is an object of the present invention to provide a receiving device. INDUSTRIAL APPLICABILITY The present invention is effective even when the repetition cycle of fading is short, is effective when performing diversity reception, and intermittently transmits and receives burst signals as in a time division multiple access (TDMA) communication system. It is an object of the present invention to provide a receiving device that is also effective in a system.

[0009]

SUMMARY OF THE INVENTION A feature of the present invention is to reproduce a complex envelope signal after separately detecting an envelope signal which is an amplitude modulation component and a phase demodulation signal which is a phase modulation component. Detecting the envelope of the signal and performing processing to suppress fluctuations in the average level of the envelope signal; using limiter means for demodulating the phase modulation component; and receiving diversity using the detected average level. Is that it is possible.

The present invention is different from the prior art which utilizes an automatic gain control circuit including a negative feedback loop having a large time constant.
The difference is that there is no loop having a large time constant, the level normalization processing is performed using the envelope signal instead of the carrier signal, and the limiter means can be used despite linear reception.

That is, the present invention comprises a plurality of input terminals to which received signals from separate receiving circuits each serving as a diversity branch are inputted, and an envelope detecting means and a phase detecting means each receiving the signal of the input terminal as an input. And a reproducing means for reproducing a complex envelope signal from each output signal of the envelope detecting means and the phase detecting means are provided corresponding to the diversity branches, and the output of the reproducing means for each diversity branch is output over a plurality of diversity branches. A synthesis demodulation processing circuit that performs synthesis and demodulation processing, wherein the envelope detection unit includes:
An envelope detection circuit that detects an envelope signal from the signal of the input terminal; an average calculation circuit that calculates an average level value of the envelope signal detected by the detection circuit; and an output envelope signal of the envelope detection circuit. A normalization circuit that normalizes the average operation circuit, averages the output level average value of the averaging circuit over the plurality of diversity branches, and provides an average value control circuit as a reference of the normalization circuit of each diversity branch. The phase detection means includes limiter means for limiting the amplitude of a signal to be phase-detected.

It is preferable that the conversion function of the envelope detection circuit is a non-linear function, and the output of the normalization circuit includes an inverse conversion circuit for processing an inverse conversion function corresponding to the non-linear function.

It is preferable that the inverse transform circuit hold a plurality of types of inverse transform functions and one of the plurality of types of inverse transform functions is adaptively selected for a demodulated signal.

The composition demodulation processing circuit may be configured to control by giving an output of the averaging circuit for each diversity branch as a control signal.

The envelope detection circuit may include a level adjustment circuit.

It is preferable to provide a buffer circuit for temporarily holding the output of the envelope detection circuit. In this case, it is preferable that all processing be digital processing.

Preferably, the apparatus further comprises means for adjusting the relative delay of each output signal of the envelope detection means and the phase detection means input to the reproduction means.

The present invention can be practiced even when diversity reception is not used. In this case, one input terminal to which the received signal is input, envelope detection means and phase detection means having the input terminal signal as input, and output signals from the envelope detection means and phase detection means Reproducing means for reproducing a complex envelope signal, wherein the envelope detecting means includes an envelope detecting circuit for detecting an envelope signal from the signal of the input terminal, and an envelope signal detected by the detecting circuit. An average calculation circuit for calculating a level average value;
A normalization circuit for normalizing an output envelope signal of the envelope detection circuit by an output level average value of the averaging circuit, wherein the phase detection means includes a limiter means for limiting an amplitude of a signal to be phase-detected. It is characterized by including.

In the above description, a comparison with the prior art using an automatic gain control circuit including a negative feedback loop has been described. However, this does not mean that the automatic gain control circuit must not be used, and the present invention is not limited to this. It is possible to use an automatic gain control circuit having a small constant together.

[0020]

Since the amplitude modulation component and the phase modulation component are demodulated from the received signal by another circuit, the circuit for demodulating the amplitude modulation component can be provided with a limiter to limit the amplitude. As a result, noise can be reduced.

[0021] Even if the automatic gain control is not performed, the process of detecting the envelope of the received signal and suppressing the fluctuation of the average level of the envelope signal (feedforward) can cope with the level fluctuation of the received signal. , The response speed can be reduced.

The detection of the average level can be used for diversity combining processing.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of a first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a block diagram of the first embodiment of the present invention.

The invention, each provided with a plurality of input terminals 1 _1, 1 ₂ the received signal from the receiving circuit further system comprising a diversity branch is input, an input the input terminal 1 _1, 1 ₂ of the signal, respectively Envelope detection circuits 6 ₁ and 6 _{2 as the} envelope detection means to perform and the phase detection circuit 3 as the phase detection means
_1, 3 ₂ and, the envelope detection circuit 6 _1, 6 ₂ and the phase detector circuit 3 _1, 3 reproducing circuit 4 ₁ is from ₂ of each output signal reproduction means for reproducing the complex envelope signals, 4 ₂ and is wherein provided on the diversity branches corresponding, a synthesizing demodulation circuit 5 performs demodulation processing and synthesis reproduction circuit 4 ₁ of each branch diversity, 4 ₂ of the output over a plurality of diversity branches,
Envelope detection circuit 6 _1, 6 ₂ detects an input terminal 1 _1, 1 envelope signal from the _second signal, the envelope detection circuit 6 _1,
An average calculation circuit 9 _1, 9 ₂ for calculating the level average value of the detected envelope signal by 6 _2, the envelope detection circuit 6 _1,
Normalization circuit 7 for normalizing the 6 _second output envelope signal _1, 7
And a _2, the average value control circuit 10 to provide an average calculation circuit 9 _1, 9 ₂ output level by averaging the average value over a plurality of diversity branches normalizing circuit for each diversity branch 7 _1, 7 ₂ of the reference And a phase detection circuit 3
_1, 3 ₂ is a radio receiving apparatus characterized in that it comprises a limiter amplifier 2 _1, 2 ₂ a limiter means for limiting the amplitude of the signal phase detection. The device of the first embodiment of the present invention
It has branch diversity branches.

Next, the operation of the first embodiment of the present invention will be described. The n-th received wave S where 1 ≦ n ≦ 2 = N
_n (t) it _{is, S n (t) = R} e [E n expj (2πf c t)] ... is (1). However, R _e () is set to represent the real part of the (), also, E _n (t) denotes a complex envelope of S _n (t). The envelope R _n (t) of the received wave is R _n (t) = | E _n (t) | (2) The signal phase θ _n (t) is θ _n (t) = Arg [E _n (t )] ... (3). First, the envelope detection circuits 6 ₁ and 6 ₂ convert R _n (t) according to the following equation using a certain function f (), and output a level signal r _n (t). The r _n (t) _{is, r n (t) = f} [R n (t)] ... is (4). The averaging circuits 9 ₁ and 9 ₂ output the level signal r
_n an average value m _n of (t) (t) using a time constant T _m,

[0026]

(Equation 1) Is calculated by The average value control circuit 10 receives the _first to Nth average values m ₁ (t), m ₂ (t),..., _Mn (t) as inputs, and performs N normalizations using a certain function h (). Average value m
Output _sn (t). m When _sn (t) is expressed by the following equation _{m sn (t) = h [} m 1 (t), m 2 (t), ..., m n (t)] ... (6) , and the normalizing circuit 7 ₁ , 7 ₂ r _mn using the _{m sn (t) (t)} = g by _{[r n (t), m} sn (t)] ... (7), outputs a normalized level signal r _mn (t) I do. Inverse conversion circuit _81, 82, the normalization level signal r _mn (t)
R _mn (t) = f ^-1 [r _mn (t), m _sn (t)] using the normalized average value m _sn (t) and the inverse transformation to obtain a normalized envelope signal R _mn (t) is output. On the other hand, the limiter amplifier circuits 2 ₁ and 2 ₂ amplify the n-th received wave S _n (t) with a very large gain and output a constant amplitude signal S _cn (t). This constant amplitude signal S
_cn (t) _{is, S cn (t) = R} e {Aexp [j2πf c t + jθ n (t)]} ... a (9). Here, A is a certain constant value. The phase detection circuits 3 ₁ and 3 ₂ calculate the reception wave phase θ from the constant amplitude signal.
A phase indication signal representing _n (t) is output. Signal as the phase indication signal representing directly the θ _n (t), _{or, exp [jθ n (t)} ] = cosθ n (t) + jsinθ signals representing the _n (t) can be considered. The reproduction circuits 4 ₁ and 4 ₂ generate a reproduced complex envelope signal E _rn (t) using the normalized envelope signal R _mn (t) and the phase indication signal. Finally, the synthesis demodulation processing circuit 5 receives the first to Nth complex envelope signals as input, synthesizes these signals, and performs demodulation. The synthesis demodulation processing includes AFC processing, equalization, clock extraction, and signal determination. Hereinafter, the operation of each circuit will be described in detail.

First, the envelope detection circuits 6 ₁ and 6 ₂ have a paired relationship with the inverse conversion circuits 8 ₁ and 8 ₂ . In other words, the conversion y = f (x) of the envelope detection circuits 6 ₁ and 6 ₂ is performed as x = f ⁻¹ (y) in the inverse conversion. The most common envelope detection means is square-law detection, that is, There is a method using f (x) = x ² . At this time, the inverse transform becomes a square root, that is, f ⁻¹ (x) = x ^1/2 . However, this method cannot be applied to radio reception waves having a dynamic range of several tens of dB. Therefore, a logarithmic level detector, that is, a logarithmic function f (x) = klogx is used. At this time, the inverse transformation becomes an exponential function, that is, f ⁻¹ (x) = exp (x / k).

FIG. 2 shows the configuration of the envelope detection circuits 6 ₁ and 6 ₂ . Figure 2 is a block diagram of the envelope detector circuit 6 _1, 6 _2. Envelope in the logarithmic level detector 11 is logarithmically converted by _{r n (t) = klog [} R n (t)] ... (10). A refractory component of a frequency such as a carrier component is removed by the reduction filter 12 and converted into a digital signal by the AD converter 13.

Next, FIG. 3 the configuration of inverse transform circuits _81, 82
Shown in Inverse conversion circuit _81, 82 in the normalization level signal r
_mn (t) is subjected to exponential function conversion according to R _mn (t) = exp [r _mn (t) / k] (11) to output a normalized envelope signal R _mn (t). This circuit is a DSP (Data storage processor)
Alternatively, it can be realized by using a ROM table.
Doing this logarithmic conversion, g in normalizing circuit 7 _1, 7 ₂ () may be a mere _{subtraction, g [r n (t)} , m sn (t)] = r n (t) -m sn (t ) (12) It is convenient to use a table when performing the logarithmic / exponential conversion described above. However, if the range of the input level is wide, the size of the table becomes large. Therefore, processing for limiting the level to a certain range is performed. Therefore, the signal is normalized using the average value. There are two ways to use the average value. First, 1 to N-th average value m ₁ in the average value control circuit _{10 (t), m 2 (} t), ..., m n from (t), normalized for average what is the largest value m _sn ( There is a method of outputting as t), that is, h (x) = max (x). At this time, m _sn (t) = max [m ₁ (t), m ₂ (t),..., _Mn (t)] (13). Here, max () is a function for obtaining the maximum value in (). According to this method, the average value having the highest level is selected, so that the normalized signal of the received wave of the branch having the highest level always has the same level. In addition, since the average value for normalization is a single value, this corresponds to the fact that the gains of all branches are the same. However, in the above-described method, it is necessary to obtain the maximum value, and in order to accurately reproduce a signal having a small level, it is necessary to prepare a table for the small level. In the control circuit 10, the _{1st to} Nth average values m ₁ (t), m ₂ (t),..., _Mn (t) are directly used as normalization average values m _sn (t) of the respective branches.
That is, m _sn (t) = m _n (t) (14). In this way, the normalized signals of the received waves of each branch always have the same level, so that an exponential function table with a small range may be prepared.

Next, referring to FIG. 4, the phase detection circuit 3 ₁ ,
3 ₂ of the operation will be described. FIG. 4 shows the phase detection circuit 3 ₁ ,
3 ₂ is a block diagram of a. The local oscillator 42 which near synchronization from the output of the limiter amplifier 2 _1, 2 ₂ using IQ detector 61, which extracts the amplitude component of the in-phase and quadrature components. In this method, the signal phase θ _n (t) is output corresponding to two phase indication signals cos θ _n (t) and sin θ _n (t).

[0031] Next, a reproducing circuit 4 _1, 4 ₂ with reference to FIG. 5 for inputting a normalized envelope signal and the phase indication signal. FIG. 5 is a block diagram showing a reproducing circuit. FIG. 5 shows that the phase indication signals cos θ _n (t) and sin θ _n (t) are input from terminals I ₁ and I ₂ , and two multipliers 71 and 72 are used to multiply the normalized envelope signal from terminal R. I do.

As the combining demodulation processing circuit 5, the selective combining, equal gain combining, and maximum ratio combining described in the related art can be applied, so that the detailed description is omitted.

Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 6 is a block diagram of the apparatus according to the second embodiment of the present invention. In the first embodiment of the present invention, the basic operation is premised on real-time operation, but digital signal processing is desirable because complicated processing is frequently used. The second embodiment of the present invention has a configuration suitable for digital signal processing. The present invention features the second embodiment is a phase display signal level signal r _n (t) where having four buffers 90 to 93 for storing a predetermined time. As is to remove the variation of the mean level of the envelope on the basis of the normalization circuit 7 _1, 7 average calculation circuit 9 _{1, 2,} 9 ₂ result, if there is no buffer 90-93 shown in Equation (5) The average value used at the time of level normalization is a value obtained from the past envelope. For this reason, when the level change becomes faster, a delay occurs, and there is a possibility that the level cannot be tracked accurately. The second embodiment of the present invention aims at accurately following such a high-speed level change. First, the data of the envelope detection circuit 6 _1, 6 ₂ detected by the envelope is stored in the buffer 90, 91. Assume that the buffers 90 and 91 store a signal of kT _m ≦ t ≦ (k + 1) T _{m with} a length of T _m . Since the signals are actually received in real time, the buffers 90, 9
Although a number of 1s are required in parallel, a simple description will be given here assuming that there is one buffer memory. One memory is thus sufficient for receiving a burst signal. However, the memory length must be adjusted to the burst length. Next, when data is extracted from the stored data and the average value is calculated,

[0034]

(Equation 2) Becomes Further, the envelope data used for obtaining the average value is taken out again from the buffers 90 and 91, and the average level of the level signal r _n (t) is normalized using the calculated average value. Output destinations of the data from the buffers 90 and 91 are controlled by switches 94 and 95. This switch 9
According to 4, 95, the average value used at the time of level normalization becomes data extracted at the same timing as the data of the envelope, and it is possible to accurately follow a high-speed level change with high accuracy. The buffers 92 and 93 of the outputs of the phase detection circuits 3 ₁ and 3 ₂ have a function of adjusting the difference in processing speed between the envelope processing side and the processing timing in the reproduction circuits 4 ₁ and 4 ₂ . With the above operation, the average level can be normalized with high accuracy.
The configuration and operation of each circuit which has not been described here are the same as in the first embodiment of the present invention.

Next, a third embodiment of the present invention will be described with reference to FIGS. Figure 7 is an envelope detection circuit 6 _1, 6 ₂
FIG. 4 is a diagram showing an example of input / output characteristics of FIG. FIG. 8 is a configuration diagram of a main part of the third embodiment of the present invention.

When the dynamic range of the envelope detection circuits 6 ₁ and 6 ₂ is not sufficient, for example, it becomes constant at a low input level or at a high input level, and may be significantly different from logarithmic conversion. Therefore, the third embodiment the present invention is characterized by having a level adjusting circuit 150 for adjusting the input level of the envelope detection circuit 6 _1, 6 _2, based on the average value as shown in FIG. As shown in FIG. 7, the dynamic range, that is, P ₁
From to P ₂ is usually more than 40dB, but still a third embodiment the present invention is effective when insufficient. Input In the input-output characteristic distortion occurs in poor output linearity for exceeding the dynamic range of the envelope detection circuit 6 _1, 6 ₂ at P ₁ or less and P ₂ or more. When the input exceeds the dynamic range of the envelope detection circuits 6 ₁ and 6 ₂ , the input level is adjusted by the level adjustment circuit 150. The level adjustment circuit 150 can be constituted by a linear amplifier or an attenuator. Here, the averaging circuit 9 ₁ ,
9 for the _second output to the control signal, it will have a field back loop. Level adjusting circuit 150 of the present invention third embodiment and the AGC amplifier is intended to adjust the input level so as not to exceed the dynamic range of the envelope detection circuit 6 _1, 6 _2, level adjustment width prior art Smaller and more stable loop. This point is different from the conventional AGC amplifier.

[0037] When the generating playback complex envelope in reproducing circuit 4 _1, 4 ₂ in the present invention the first and second embodiment, the original signal represented by the normalized envelope and the phase indication signal is of the same This is very important. However, it should be noted that the processing delay varies depending on various processes.

Next, a fourth embodiment of the present invention will be described with reference to FIG. FIG. 9 is a block diagram showing a main part of a fourth embodiment of the present invention. Fourth Embodiment The present invention is characterized by having a delay adjust circuitry 160 adjusts the input timing to the reproducing circuit 4 _1, 4 ₂ normalized envelope signal and the phase indication signal. In the present invention, the phase and the envelope of the received wave are separately processed. If there is a difference between the processing times of the phase and the envelope, the reproduction circuit 4
_1, 4 time difference when entering a ₂ occurs, an error occurs in reproducing complex envelope. The fourth embodiment of the present invention is configured to eliminate such a time difference. In the processing of the phase and the processing of the envelope, the processing time is adjusted by inserting the delay adjusting circuit 160 into the processing having the higher processing speed. The delay adjustment circuit 160 can be easily configured by using a shift register in digital processing in which sampling is performed at a sufficiently high speed, and can be configured in analog processing by using, for example, a delay line or a low-pass filter. Although both FIG. 9 (a) and FIG. 9 (b) is performed delay adjustment just before the reproducing circuit 4 _1, 4 _2,
Other places may be used as long as a similar effect is obtained. Further, when the sampling rate is not high, such as about twice the symbol rate, it is necessary to adjust a small delay amount equal to or less than the sampling rate, so that the delay adjusting circuit 160 detects the envelope so that the signal to be sampled is originally the same. Alternatively, it must be provided immediately after the phase detection circuit.

Next, a fifth embodiment of the present invention will be described with reference to FIG. FIG. 10 is a configuration diagram of a main part of a fifth embodiment of the present invention. The fifth embodiment of the present invention is characterized in that it has a calibration means for calibrating the characteristics of each circuit. However, limiter amplifier 2 _1, 2 ₂ and the envelope detection circuit 6 _1, 6 ₂ of the first from the output has been omitted since it is the same. FIG. 10 has a calibration signal generator 180 in the receiver, and calibrates the characteristics of each part according to the calibration signal.

Next, a sixth embodiment of the present invention will be described with reference to FIG. FIG. 11 is a configuration diagram of a main part of a sixth embodiment of the present invention. In the sixth embodiment of the present invention, the same signal is received in all branches by switching the antenna by the input switch 190 in order to eliminate the variation in characteristics among the branches in the case of the diversity configuration of N branches. , The characteristics of each part are calibrated so as to obtain the same complex envelope.

Next, a seventh and an eighth embodiment of the present invention will be described with reference to FIGS. FIG. 12 is a diagram showing a π / 4 shift QPSK signal. FIG. 13 is a diagram showing a bit error rate when an equalizer is used. FIG. 14 is a configuration diagram of the seventh embodiment of the present invention. FIG. 15 is a configuration diagram of the eighth embodiment of the present invention. The present invention seventh and features of the eighth embodiment, there is to have a function of correcting the discrepancy of the exponential characteristic of the logarithmic characteristic of the envelope detection circuit 6 _1, 6 ₂ and the inverse transform circuit _81, 82. (10) The constant k in the equation may change the average level of the envelope detection circuit 6 _1, 6 ₂ inputs. It is also conceivable that the value of k changes due to environmental changes such as temperature changes. Variations in the value of such k becomes possible result in incompatibility with the exponential characteristics of the inverse transform circuit _81, 82. Constants logarithmic characteristic and k _l, a constant k _r which represents the discrepancy when the constant of the exponential function characteristic was K _e

[0042]

(Equation 3) And Whether the signal by the value of the k _r is subjected to what strain [pi / 4 shift QPSK signal (roll-off rate alpha =
0.5) is shown in FIG. 12 as an example. FIG. 1 shows the bit error rate (BER) when an equalizer based on the value of k _r is used.
3 is shown. The seventh and eighth embodiments of the present invention have such a k
It is intended to be improved by correction function when the reverse conversion circuit ₈₁ by the fluctuation of the value, 8 ₂ exponential function characteristics and discrepancies. In the seventh embodiment of the present invention, the averaging circuit 9
_1, 9 exponential conversion table in response to a control signal using the output of such _second output and the temperature sensor is calculated by CPU 200, which corresponds to the change in the value of k by writing this into RAM 202. However, in this method,
It is necessary to frequently rewrite the RAM because the change speed is fast with respect to the change of the value of k due to the level change. Therefore, the value of m kinds of k in the present invention eighth embodiment (k _1, k _2, ..., k _m) of the exponential conversion corresponding to R
The OM tables 204 are prepared, and these are switched by a control signal using an average value _mn (t) representing a level so that a change in the value of k can be handled.

[0043] In the present invention the first to eighth embodiments, phase detecting circuit 3 _1, 3 ₂ can also be configured as shown in FIG. 16 or 17. 16 and 17 are diagrams showing another configuration of the phase detection circuit 3 _1, 3 _2. According to the configuration of FIG. 16, the output S _ln (t) of the low-pass filter 12 for removing the harmonic component of the limiter-amplified received wave is

[0044]

(Equation 4) Can be represented by Sampling with four times the sampling clock of the carrier frequency f _c in S _ln (t) of the AD converter 13. Also, a sampling clock 4 divides by 4 frequency divider 84, the frequency is at f _c, the phase to generate a 90 ° two different signals. The phase display signals cos θ _n (t) and sin θ _n (t) can be extracted by switching the switches of the switch 83 using the four-frequency-divided clock.

According to the configuration shown in FIG. 17A, θ _n
(T) is directly determined. Counter 81 counts the M times the clock of the carrier frequency f _c, and outputs the count number of the rising edge of the limiter amplifier 2 _1, 2 rectangular wave ₂ outputs. Assuming that the time of the q-th rising edge is t _q and the count number at this time is C _n (t _q ), C _n (t _q ) is

[0046]

(Equation 5) Can be represented by Here, [x] is an integer not exceeding x.
The first term on the right side of the equation (18) represents the count number at the time of no modulation, and the second term represents a change in the count number due to the signal phase θ _n (t). Therefore, in the phase converter 82, (1
When the count number C _n (t _q ) is converted into the phase θ _n (t) by the following equation, which is a modification of equation (6),

[0047]

(Equation 6) Becomes In this conversion, since there is an error of ± π / M, M needs to be a sufficiently large value. According to such a method, a means for extracting a phase display signal that does not require an AD converter can be obtained. Further, there is an advantage that it can be easily realized by a digital circuit. In this case, c shown in FIG.
The in-phase and quadrature components may be obtained by the os converter 85 and the sine converter 86 and then multiplied. The cos converter and the sine converter can be easily configured using a ROM table.

[0048]

As described above, according to the present invention, the response speed with respect to the reception level is fast, the reception signal can be effectively received even when the level fluctuation of the reception signal is small and fast, and the operation is improved. It is stable.

The present invention is also effective when the repetition cycle of fading is short, is effective when diversity reception is performed, and is also effective in time division multiple access (TDMA).
It is also effective for a method of intermittently transmitting and receiving a burst signal like a communication method.

[Brief description of the drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is a block diagram of an envelope detection circuit.

FIG. 3 is a block diagram of an inverse conversion circuit.

FIG. 4 is a block diagram of a phase detection circuit.

FIG. 5 is a block diagram of a reproduction circuit.

FIG. 6 is a block diagram of a second embodiment of the present invention.

FIG. 7 is a diagram illustrating an example of input / output characteristics of the envelope detection circuit.

FIG. 8 is a configuration diagram of a main part of a third embodiment of the present invention.

FIG. 9 is a configuration diagram of a main part of a fourth embodiment of the present invention.

FIG. 10 is a configuration diagram of a main part of a fifth embodiment of the present invention.

FIG. 11 shows a main part of a sixth embodiment of the present invention.

FIG. 12 is a diagram showing a π / 2 shift QPSK signal.

FIG. 13 is a diagram illustrating a bit error rate when an equalizer is used.

FIG. 14 is a configuration diagram of a main part of a seventh embodiment of the present invention.

FIG. 15 is a configuration diagram of a main part of an eighth embodiment of the present invention.

FIG. 16 is a diagram showing another configuration of the phase detection circuit.

FIG. 17 is a diagram showing another configuration of the phase detection circuit.

FIG. 18 is a block diagram of a conventional example.

[Description of Signs] 1 ₁ , 1 ₂ input terminal 2 ₁ , 2 ₂ Limiter amplifier 3 ₁ , 3 ₂ Phase detection circuit 4 ₁ , 4 ₂ reproduction circuit 5 Synthetic demodulation processing circuit 6 ₁ , 6 ₂ Envelope detection circuit 7 ₁ , 7 ₂ Normalization circuit 8 ₁ , 8 ₂ Inverse conversion circuit 9 ₁ , 9 ₂ Average operation circuit 10 Average value control circuit 11 Logarithmic level detector 12 Low-pass filter 13 AD converter 41 Synchronization circuit 42 Local oscillator 50, 51 Band Filters 52, 53 Amplitude and phase estimators 54, 55 Linear amplification detectors 56, 57 Complex multipliers 60 AGC amplifiers 61 IQ detectors 62 Envelope detectors 63 Gain control circuits 71, 72 Multipliers 81 Counter 82 Phase converter 83 Switch 84 Divide-by-4 circuit 85 Cos converter 86 Sin converter 90, 91, 92, 93 Buffer 94, 95 Switch 150 Level adjustment circuit 160 Delay adjustment circuit 80 calibration signal generator 181,182,190 input switching unit 200 CPU 202 RAM 204 ROM table

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H04B 1/76-3/44 H04B 3/50-3/60 H04B 7/00-7/12 H04L 1 / 02-1/06 H04L 27/18-27/24 H03D 1/00-5/00

Claims (8)

(57) [Claims] An envelope detection means and a phase detection means each having a plurality of input terminals to each of which a reception signal from a separate reception circuit serving as a diversity branch is inputted, and a signal at each of the input terminals being input. Reproduction means for reproducing a complex envelope signal from each output signal of the envelope detection means and the phase detection means is provided corresponding to the diversity branch, and the outputs of the reproduction means for each diversity branch are combined over a plurality of diversity branches. A synthesis demodulation processing circuit for performing demodulation processing, wherein the envelope detection means includes: an envelope detection circuit that detects an envelope signal from the signal of the input terminal; and a level average of the envelope signal detected by the detection circuit. An average calculation circuit for calculating a value; and a normalization circuit for normalizing an output envelope signal of the envelope detection circuit. An average value control circuit for averaging an average value over the plurality of diversity branches and providing the average value as a reference of the normalization circuit for each diversity branch; and a phase limiter for limiting the amplitude of a signal to be phase-detected. A wireless receiving device comprising means. 2. The method according to claim 1, further comprising, when the conversion function of the envelope detection circuit is a non-linear function, an output of the normalization circuit including an inverse conversion circuit for processing an inverse conversion function corresponding to the non-linear function. Wireless receiver. 3. The wireless communication system according to claim 2, wherein said inverse transformation circuit includes means for holding a plurality of types of inverse transformation functions, and means for adaptively selecting one of said plurality of types of inverse transformation functions. Receiver. 4. The radio receiving apparatus according to claim 1, wherein an output of said averaging circuit for each diversity branch is provided as a control signal to said synthesis demodulation processing circuit. 5. The wireless receiver according to claim 1, wherein the envelope detection circuit includes a level adjustment circuit. 6. The radio receiving apparatus according to claim 1, further comprising a buffer circuit for temporarily holding an output of said envelope detection circuit. 7. The radio receiving apparatus according to claim 1, further comprising means for adjusting a relative delay of each output signal of the envelope detecting means and the phase detecting means input to the reproducing means. 8. An input terminal for receiving a received signal,
An envelope detection unit and a phase detection unit that receive the signal of the input terminal as input, and a reproduction unit that reproduces a complex envelope signal from each output signal of the envelope detection unit and the phase detection unit. Means include an envelope detection circuit that detects an envelope signal from the signal of the input terminal, an average calculation circuit that calculates an average level value of the envelope signal detected by the detection circuit, and an envelope detection circuit. A normalization circuit for normalizing an output envelope signal by an average output level value of the averaging circuit, wherein the phase detection means includes limiter means for limiting an amplitude of a signal to be phase detected. Wireless receiver.