JP2801434B2 - Connection between semiconductor device chip and heat dissipation member and method of manufacturing the same - Google Patents

Connection between semiconductor device chip and heat dissipation member and method of manufacturing the same

Info

Publication number
JP2801434B2
JP2801434B2 JP3188182A JP18818291A JP2801434B2 JP 2801434 B2 JP2801434 B2 JP 2801434B2 JP 3188182 A JP3188182 A JP 3188182A JP 18818291 A JP18818291 A JP 18818291A JP 2801434 B2 JP2801434 B2 JP 2801434B2
Authority
JP
Japan
Prior art keywords
semiconductor device
device chip
semiconductor laser
chip
bonding pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP3188182A
Other languages
Japanese (ja)
Other versions
JPH0513478A (en
Inventor
有生 白坂
嘉一 池上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
THE FURUKAW ELECTRIC CO., LTD.
Original Assignee
THE FURUKAW ELECTRIC CO., LTD.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by THE FURUKAW ELECTRIC CO., LTD. filed Critical THE FURUKAW ELECTRIC CO., LTD.
Priority to JP3188182A priority Critical patent/JP2801434B2/en
Publication of JPH0513478A publication Critical patent/JPH0513478A/en
Application granted granted Critical
Publication of JP2801434B2 publication Critical patent/JP2801434B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To provide a joint of a semiconductor device chip and a heat dissipating member, where a soldering material is hardly attached to the device chip to cause a short circuit. CONSTITUTION:In a joint of a semiconductor laser chip 2 and a heat sink 6 to fix them together interposing a bonding pad 1 between them, the bonding pad 1 is provided with a gap located between the non-electrode part 3 and the semiconductor laser chip 2 and formed at least partially covering the non- electrode part 3.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、発光ダイオードチッ
プ、又は半導体レーザチップ等の半導体デバイスチップ
と、ヒートシンク、又はサブマウント等の放熱部材とを
固定する際の半導体デバイスチップと放熱部材との接続
部に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a connection between a semiconductor device chip and a heat radiating member when fixing a semiconductor device chip such as a light emitting diode chip or a semiconductor laser chip and a heat radiating member such as a heat sink or a submount. It is about the department.

【0002】[0002]

【従来技術】発光ダイオードチップ、又は半導体レーザ
チップ等の半導体デバイスチップは駆動時の熱を放出す
るために放熱部材であるヒートシンク、又はサブマウン
トに固定される。そしてこの固定方法には半田材を用い
たダイボンディングが使用され、ダイボンディングの際
には両者を小さい熱抵抗でダイボンディングすることが
望まれている。特に、半導体デバイスチップの発光部を
ヒートシンク、又はサブマウント側にしてダイボンディ
ングする時は熱抵抗を小さくすると共に、半導体デバイ
スチップとヒートシンク、又はサブマウントとの接続部
の歪みを小さくすることも重要である。
2. Description of the Related Art A semiconductor device chip such as a light emitting diode chip or a semiconductor laser chip is fixed to a heat sink or a submount as a heat radiating member for releasing heat during driving. In this fixing method, die bonding using a solder material is used, and in the case of die bonding, it is desired that both are bonded with low thermal resistance. In particular, when die-bonding with the light emitting part of the semiconductor device chip as the heat sink or submount side, it is important to reduce the thermal resistance and to reduce the distortion of the connection between the semiconductor device chip and the heat sink or submount. It is.

【0003】そのため、従来は図3に示すように、半導
体デバイスチップ12(本例では半導体レーザチップを
用いる。以下同じ。)と放熱部材13(本例ではヒート
シンクを用いる。以下同じ。)との接続部は、半導体レ
ーザチップ12の電極部14上に所定厚で金メッキを成
長させてボンディングパット11を形成し、このボンデ
ィングパット11とヒートシンク13とを半田材15を
用いたダイボンディングにより固定していた。
Conventionally, as shown in FIG. 3, a semiconductor device chip 12 (in this example, a semiconductor laser chip is used; the same applies hereinafter) and a heat radiation member 13 (a heat sink is used in this example; the same applies hereinafter). The connection part is formed by growing gold plating on the electrode part 14 of the semiconductor laser chip 12 with a predetermined thickness to form a bonding pad 11 and fixing the bonding pad 11 and the heat sink 13 by die bonding using a solder material 15. Was.

【0004】また、この接続部の作製方法は先ず図4
(a),(b) に示すように、半導体ウエハ18上に形成した
複数の半導体レーザチップ12(本図では6個の半導体
レーザチップ12を示している。)の非電極部19上に
メッキレジスト20を形成した後、半導体レーザチップ
12の電極部14上に金メッキをメッキレジスト20の
厚さよりも薄く成長させてボンディングパット11を形
成し、しかる後、メッキレジスト20を除去し、さらに
図4(c) に示すように、メッキレジスト20を除去した
非電極部19をダイシング、あるいは壁開等の手段を用
いて処理し、それぞれ個別の半導体レーザチップ12に
分離していた。
[0004] In addition, a method of manufacturing this connection portion is first described with reference to FIG.
As shown in (a) and (b), a plurality of semiconductor laser chips 12 (six semiconductor laser chips 12 are shown in the figure) formed on a semiconductor wafer 18 are plated on non-electrode portions 19. After forming the resist 20, gold plating is grown on the electrode portion 14 of the semiconductor laser chip 12 to be thinner than the thickness of the plating resist 20 to form a bonding pad 11, and thereafter, the plating resist 20 is removed. As shown in (c), the non-electrode portion 19 from which the plating resist 20 has been removed is processed by means such as dicing or wall opening to separate the individual semiconductor laser chips 12 from each other.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、前述し
た半導体レーザチップ12とヒートシンク13との接続
部においては以下に示すような問題点があった。
However, the connection between the semiconductor laser chip 12 and the heat sink 13 has the following problems.

【0006】即ち、半導体レーザチップ12の電極部1
4上に垂直方向に形成したボンディングパット11を介
して半導体レーザチップ12とヒートシンク13とを半
田材15で固定した場合、半田材15がボンディングパ
ット11の側面16の鉛直方向に沿って拡がるため、半
導体レーザチップ12の端部にダイシング、あるいは壁
開の際に発生した割れ、又はかけ等の欠損部17が存在
すると、半田材15が半導体レーザチップ12の側面に
露出しているp−n接合部に付着してしまい、半導体レ
ーザチップ12が短絡(ショート)し、半導体レーザチ
ップ12が使用できなくなってしまう。
That is, the electrode portion 1 of the semiconductor laser chip 12
When the semiconductor laser chip 12 and the heat sink 13 are fixed with the solder material 15 via the bonding pad 11 formed vertically on the solder pad 4, the solder material 15 spreads along the vertical direction of the side surface 16 of the bonding pad 11. If there is a defect 17 such as a crack generated at the time of dicing or opening the wall at the end of the semiconductor laser chip 12, or the like, the solder material 15 is exposed on the side surface of the semiconductor laser chip 12. This causes the semiconductor laser chip 12 to be short-circuited (short-circuited), making the semiconductor laser chip 12 unusable.

【0007】[0007]

【発明の目的】本発明の目的は前記問題点に鑑みなされ
たものでその目的とするところは、半導体デバイスチッ
プを半田材の付着によって短絡(ショート)させること
のない半導体デバイスチップと放熱部材との接続部、お
よびその作製方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a semiconductor device chip and a heat radiation member which do not short-circuit a semiconductor device chip due to the adhesion of a solder material. And a manufacturing method thereof.

【0008】[0008]

【課題を解決するための手段】前記目的を達成するため
の本発明の構成は、半導体デバイスチップと放熱部材と
の間にボンディングパットを介在させて前記半導体デバ
イスチップと放熱部材とを固定する半導体デバイスチッ
プと放熱部材との接続部において、前記ボンディングパ
ットは前記半導体デバイスチップの非電極部との間に隙
間を有し、且つ非電極部の少なくとも一部を覆うように
形成されていることを特徴とする。また、前記接続部を
作製する方法は、半導体ウエハ上に形成された複数の半
導体デバイスチップの非電極部にメッキレジストを形し
た後、前記半導体デバイスチップの電極部に金属メッキ
を前記メッキレジスト厚よりも厚く、且つ等方的に成長
させ、しかる後、前記メッキレジストを除去し、さらに
該メッキレジストを除去した前記非電極部をダイシン
グ、あるいは壁開して個別の半導体デバイスチップに分
離することを特徴とする。
According to a first aspect of the present invention, there is provided a semiconductor device having a semiconductor device chip and a heat radiating member fixed by interposing a bonding pad between the semiconductor device chip and the heat radiating member. In the connection portion between the device chip and the heat radiation member, the bonding pad has a gap between the non-electrode portion of the semiconductor device chip and is formed so as to cover at least a part of the non-electrode portion. Features. Further, the method of manufacturing the connection portion includes forming a plating resist on non-electrode portions of a plurality of semiconductor device chips formed on a semiconductor wafer, and then applying metal plating on an electrode portion of the semiconductor device chip. Thicker and isotropically grown, after which the plating resist is removed and the non-electrode part from which the plating resist is removed is diced or cleaved to separate it into individual semiconductor device chips It is characterized by.

【0009】[0009]

【実施例】本発明の一実施例を図1を用いて説明する。An embodiment of the present invention will be described with reference to FIG.

【0010】本発明の半導体デバイスチップ2(本実施
例では半導体レーザチップを用いる。以下同じ。)と放
熱部材6(本実施例ではヒートシンクを用いる。以下同
じ。)との接続部の特徴は、半導体レーザチップ2とヒ
ートシンク6との間に介在させるボンディングパット1
が、半導体レーザチップ2の非電極部3との間に隙間4
を有し、且つ非電極部3の少なくとも一部を覆うように
形成されていることである。
The connection between the semiconductor device chip 2 of the present invention (a semiconductor laser chip is used in this embodiment; the same applies hereinafter) and a heat radiation member 6 (a heat sink is used in this embodiment; the same applies hereinafter) is characterized by the following features. Bonding pad 1 interposed between semiconductor laser chip 2 and heat sink 6
Gap 4 between the non-electrode portion 3 of the semiconductor laser chip 2
And is formed so as to cover at least a part of the non-electrode portion 3.

【0011】図1は本発明の一実施例であるボンディン
グパット1を介在させて半導体レーザチップ2とヒート
シンク6とを固定した際の正面図である。ボンディング
パット1は、例えば300マイクロメートル四方に形成
された半導体レーザチップ2の電極部5上に、金メッキ
を所定の厚さに成長させることにより形成され、半導体
レーザチップ2の非電極部3との間に隙間4を有し、且
つ非電極部3の一部を覆うように形成(図1においては
紙面垂直長手方向に形成されている。)されている。
FIG. 1 is a front view when a semiconductor laser chip 2 and a heat sink 6 are fixed via a bonding pad 1 according to an embodiment of the present invention. The bonding pad 1 is formed by growing gold plating to a predetermined thickness on the electrode portion 5 of the semiconductor laser chip 2 formed, for example, in a square of 300 micrometers, and is connected to the non-electrode portion 3 of the semiconductor laser chip 2. It is formed so as to have a gap 4 therebetween and to cover a part of the non-electrode portion 3 (in FIG. 1, it is formed in a longitudinal direction perpendicular to the paper surface).

【0012】隙間4の間隔は、例えば1〜2マイクロメ
ートル程度であって、この隙間4を設けることにより後
述する半田材7がボンディングパット1の側面9の鉛直
方向(X方向)に沿って拡がらなくなる。また、間隔1
〜2マイクロメートルの隙間4に対して、ボンディング
パット1の厚さは10〜25マイクロメートルにするこ
とが好ましく、10マイクロメートル以下ではダイボン
ディングの条件によって半田材7が隙間4の中まで回り
こむ可能性が高く、また、25マイクロメートル以上に
なると、メッキ厚のバラツキが大きくなったり、メッキ
時間のロス、および経済的に好ましくない。
The space between the gaps 4 is, for example, about 1 to 2 μm. By providing the gaps 4, the solder material 7 described later expands along the vertical direction (X direction) of the side surface 9 of the bonding pad 1. You will not get stuck. Also, interval 1
The thickness of the bonding pad 1 is preferably set to 10 to 25 micrometers for the gap 4 of 2 to 2 micrometers, and if it is 10 micrometers or less, the solder material 7 goes into the gap 4 depending on the die bonding conditions. If the thickness is 25 micrometers or more, the variation in plating thickness becomes large, the plating time is lost, and it is not economically preferable.

【0013】また、ボンディングパット1とヒートシン
ク6との固定は、例えば金80wt%、錫20wt%から成
る半田材7によりなされ、具体的には半田材7を約30
0℃に加熱して溶融させ、半田材7が溶けたら半導体レ
ーザチップ2をヒートシンク6上で移動(スクラブ)さ
せて半田材7を延ばすことにより行う。
The bonding pad 1 and the heat sink 6 are fixed with a solder material 7 made of, for example, 80% by weight of gold and 20% by weight of tin.
Heating is performed by melting at 0 ° C., and when the solder material 7 is melted, the semiconductor laser chip 2 is moved (scrubbed) on the heat sink 6 to extend the solder material 7.

【0014】ヒートシンク6は、例えばシリコン、ダイ
アモンド、又は窒化アルミ等の表面に、半田材7とのな
じみの良好な金が1〜2マイクロメートル厚で施された
ものである。尚、本実施例では放熱部材としてヒートシ
ンク6を用いたが、ヒートシンク6の代わりにサブマウ
ントを使用してもよい。
The heat sink 6 has a surface of, for example, silicon, diamond, aluminum nitride, or the like coated with gold having a thickness of 1 to 2 μm, which has good compatibility with the solder material 7. In this embodiment, the heat sink 6 is used as the heat radiating member, but a submount may be used instead of the heat sink 6.

【0015】以下、図2を用いて前記接続部の作製方法
を説明する。
Hereinafter, a method for manufacturing the connection portion will be described with reference to FIG.

【0016】先ず、図2(a) に示すように、半導体ウエ
ハ10上に複数個形成(本図では3個の半導体レーザチ
ップ2を示している。)された半導体レーザチップ2の
非電極部3に厚さ1〜2マイクロメートルのメッキレジ
スト10-(1)を形成する。尚、メッキレジスト10-(1)
はOMR(商品名)を使用する。
First, as shown in FIG. 2A, non-electrode portions of a plurality of semiconductor laser chips 2 formed on a semiconductor wafer 10 (three semiconductor laser chips 2 are shown in this figure). Next, a plating resist 10- (1) having a thickness of 1 to 2 micrometers is formed on the substrate. In addition, plating resist 10- (1)
Uses OMR (trade name).

【0017】次に、図2(b) に示すように、半導体レー
ザチップ2の電極部5上に、例えば無電解メッキ法によ
り金メッキをx方向に、且つ等方的に成長させて厚さ
(x方向の厚さ)10〜25マイクロメートルのボンデ
ィッグパット1を形成する。この時、金メッキを等方的
に成長させているので、メッキレジスト10-(1)の厚さ
(1〜2マイクロメートル)以上に成長した金メッキは
メッキレジスト10-(1)上にも回り込み、同時にy方向
にも成長する。
Next, as shown in FIG. 2B, gold plating is isotropically grown in the x direction on the electrode portion 5 of the semiconductor laser chip 2 by, for example, electroless plating to obtain a thickness ( A bond pad 1 having a thickness of 10 to 25 micrometers (x-direction thickness) is formed. At this time, since the gold plating is grown isotropically, the gold plating that has grown to a thickness (1-2 micrometers) or more of the plating resist 10- (1) also wraps around the plating resist 10- (1), At the same time, it grows in the y direction.

【0018】さらに、図2(c) に示すように、メッキレ
ジスト10-(1)を溶剤で除去することにより隙間4を形
成し、さらにメッキレジスト10-(1)を除去した非電極
部をダイシング、あるいは壁開して個別の半導体レーザ
チップ2に分離する。
Further, as shown in FIG. 2C, the gap 4 is formed by removing the plating resist 10- (1) with a solvent, and the non-electrode portion from which the plating resist 10- (1) has been removed is removed. Dicing or cleaving to separate into individual semiconductor laser chips 2.

【0019】本実施例の接続部によれば、ボンディング
パット1が半導体レーザチップ2の非電極部3との間に
隙間4を有し、且つ非電極部3の少なくとも一部を覆う
ように形成されているので、半田材7がボンディングパ
ット1の側面9の鉛直方向に沿って拡がらず、仮に半導
体レーザチップ2に割れ、又はかけ等の欠損部8が生じ
ていても、半田材7が半導体レーザチップ2に付着する
ことがなく、その結果、半田材7により半導体レーザチ
ップ2が短絡(ショート)しなくなる。また、本実施例
の作製方法によれば、簡素な方法で上記効果を有する接
続部を提供することができる。
According to the connection portion of this embodiment, the bonding pad 1 is formed so as to have the gap 4 between the non-electrode portion 3 of the semiconductor laser chip 2 and to cover at least a part of the non-electrode portion 3. Therefore, even if the solder material 7 does not spread along the vertical direction of the side surface 9 of the bonding pad 1 and the semiconductor laser chip 2 has a crack 8 The semiconductor laser chip 2 does not adhere to the semiconductor laser chip 2, and as a result, the semiconductor laser chip 2 is not short-circuited (short-circuited) by the solder material 7. Further, according to the manufacturing method of the present embodiment, it is possible to provide a connection portion having the above-described effects by a simple method.

【0020】[0020]

【発明の効果】本発明の半導体デバイスチップと放熱部
材との接続部によれば、半導体デバイスチップと放熱部
材との間に介在させるボンディングパットが半導体デバ
イスチップの非電極部との間に隙間を有し、且つ非電極
部の少なくとも一部を覆うように形成されているので、
仮に半導体デバイスチップに割れ、又はかけ等が生じて
いても、半田材が半導体デバイスチップに付着しなくな
り、半導体デバイスチップが短絡(ショート)しなくな
る。また、本発明の作製方法によれば、簡素な方法で接
続部を提供することができる。
According to the connecting portion between the semiconductor device chip and the heat radiating member of the present invention, the bonding pad interposed between the semiconductor device chip and the heat radiating member forms a gap between the semiconductor device chip and the non-electrode portion of the semiconductor device chip. Since it is formed so as to cover at least a part of the non-electrode part,
Even if the semiconductor device chip is cracked or broken, the solder material does not adhere to the semiconductor device chip, and the semiconductor device chip does not short-circuit. Further, according to the manufacturing method of the present invention, the connection portion can be provided by a simple method.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例を示す正面図であるFIG. 1 is a front view showing an embodiment of the present invention.

【図2】図2(a) 〜(c) は本発明の接続部を作製する際
の製造工程である
FIGS. 2 (a) to 2 (c) show a manufacturing process when manufacturing a connecting portion of the present invention.

【図3】従来の接続部を示す正面図であるFIG. 3 is a front view showing a conventional connecting portion.

【図4】図4(a) 〜(c) は従来の接続部を作製する際の
製造工程図である
FIGS. 4 (a) to 4 (c) are manufacturing process diagrams when a conventional connection portion is manufactured.

【符号の説明】[Explanation of symbols]

1 ボンディングパット 2 半導体レーザチップ 3 非電極部 4 隙間 5 電極部 6 ヒートシンク 7 半田材 8 欠損部 9 側面 10 半導体ウエハ 10-(1) メッキレジスト DESCRIPTION OF SYMBOLS 1 Bonding pad 2 Semiconductor laser chip 3 Non-electrode part 4 Gap 5 Electrode part 6 Heat sink 7 Solder material 8 Defect part 9 Side surface 10 Semiconductor wafer 10- (1) Plating resist

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 半導体デバイスチップと放熱部材との間
にボンディングパットを介在させて前記半導体デバイス
チップと放熱部材とを固定する半導体デバイスチップと
放熱部材との接続部において、前記ボンディングパット
は前記半導体デバイスチップの非電極部との間に隙間を
有し、且つ非電極部の少なくとも一部を覆うように形成
されていることを特徴とする半導体デバイスチップと放
熱部材との接続部。
1. A connecting portion between a semiconductor device chip and a heat radiating member for fixing the semiconductor device chip and the heat radiating member by interposing a bonding pad between the semiconductor device chip and the heat radiating member. A connection portion between a semiconductor device chip and a heat radiating member, which has a gap between the device chip and a non-electrode portion and is formed so as to cover at least a part of the non-electrode portion.
【請求項2】 半導体ウエハ上に形成された複数の半導
体デバイスチップの非電極部にメッキレジストを形成し
た後、前記半導体デバイスチップの電極部に金属メッキ
を前記メッキレジスト厚よりも厚く、且つ等方的に成長
させ、しかる後、前記メッキレジストを除去し、さらに
該メッキレジストを除去した前記非電極部をダイシン
グ、あるいは壁開して個別の半導体デバイスチップに分
離することを特徴とする請求項1記載の半導体デバイス
チップと放熱部材との接続部の作製方法。
2. After forming a plating resist on the non-electrode portions of a plurality of semiconductor device chips formed on a semiconductor wafer, metal plating is performed on the electrode portions of the semiconductor device chip so as to be thicker than the plating resist. The non-electrode portion from which the plating resist is removed, and the non-electrode portion from which the plating resist has been removed is diced or cleaved to be separated into individual semiconductor device chips. 2. A method for manufacturing a connection portion between a semiconductor device chip and a heat dissipation member according to 1.
JP3188182A 1991-07-02 1991-07-02 Connection between semiconductor device chip and heat dissipation member and method of manufacturing the same Expired - Lifetime JP2801434B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3188182A JP2801434B2 (en) 1991-07-02 1991-07-02 Connection between semiconductor device chip and heat dissipation member and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3188182A JP2801434B2 (en) 1991-07-02 1991-07-02 Connection between semiconductor device chip and heat dissipation member and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH0513478A JPH0513478A (en) 1993-01-22
JP2801434B2 true JP2801434B2 (en) 1998-09-21

Family

ID=16219203

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3188182A Expired - Lifetime JP2801434B2 (en) 1991-07-02 1991-07-02 Connection between semiconductor device chip and heat dissipation member and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP2801434B2 (en)

Also Published As

Publication number Publication date
JPH0513478A (en) 1993-01-22

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