JP2790733B2 - Drive circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving circuit for driving a load.

[0002]

2. Description of the Related Art FIG. 3 is a circuit diagram showing a configuration of a conventional drive circuit for driving various actuators such as a motor and a solenoid.

This drive circuit comprises a command voltage input terminal 1, a reference voltage input terminal 2, gain setting resistors 3, 4, 5, 6,
It includes a sensing resistor 7 and operational amplifiers 9 and 10. Command voltage input terminal 1 is supplied with command voltage VCTL, and reference voltage input terminal 2 is supplied with reference voltage VREF.

The resistor 3 is connected between the command voltage input terminal 1 and the inverting input terminal 14 of the operational amplifier 9, and the resistor 4 is connected between the inverting input terminal 14 of the operational amplifier 9 and the output terminal 11. . The resistor 5 is connected between the command voltage input terminal 1 and the inverting input terminal 15 of the operational amplifier 10, and the resistor 6 is connected between the inverting input terminal 15 of the operational amplifier 10 and the sensing terminal 12. Operational amplifiers 9, 10
Are connected to the reference voltage input terminal 2.

[0005] The output terminal of the operational amplifier 9 is connected to the output terminal 11, and the output terminal of the operational amplifier 10 is connected to the output terminal 13. The sensing resistor 7 is connected between the output terminal 11 and the sensing terminal 12. The load 8 is connected between the sensing terminal 12 and the output terminal 13.

Next, the operation of the driving circuit shown in FIG. 3 will be described.
The operational amplifier 9 includes a command voltage VCTL and a reference voltage VREF.
Is inverted and amplified at an amplification degree determined by the resistance ratio of the resistors 3 and 4, and a voltage VO1 is applied to the output terminal 11. Resistance 3,
4 are R1 and R2, respectively, the output terminal 1
The voltage VO1 of 1 is as follows.

VO1 = VREF + (VREF−VCTL) · (R2 / R1) (1) The operational amplifier 10 includes a command voltage VCTL and a reference voltage VREF.
The difference voltage from F is inverted and amplified at an amplification degree determined by the resistance ratio between the resistors 5 and 6, and the voltage VO2 is applied to the sensing terminal 12. Assuming that the resistance values of the resistors 5 and 6 are R3 and R4, respectively, the voltage VO2 of the sensing terminal 12 is expressed by the following equation.

VO2 = VREF + (VREF−VCTL) · (R4 / R3) (2) At this time, the polarities of the voltages VO1 and VO2 are inverted around the reference voltage VREF. Also, R2 / R1 and R4 / R
The resistance values of the resistors 3, 4, 5, and 6 are set so that 3 does not become equal. The output impedance of the output terminal 11 is determined by the resistors 3 and 4, and is set relatively high.
Generally, a low resistance of about 0.5Ω to 2Ω is selected as the sensing resistor 7.

Therefore, the voltage generated between the output terminal 11 and the sensing terminal 12 is converted into a current by the sensing resistor 7, and the current is supplied to the load 8 as the drive current Io. Output terminal 11 and sensing terminal 12
Is the difference voltage (VO2-VO1) between Equations (1) and (2).
The following equation is obtained.

VO2−VO1 = (R2 / R1−R4 / R3) · (VCTL−VREF) (3) Assuming that the resistance value of the sensing resistor 7 is R7, the driving current I
o is given by the following equation from equation (3).

Io = (VCTL−VREF) · (R2 / R1−R4 / R3) / R7 (4) The voltage VO3 of the output terminal 13 is the product of the resistance value Z of the series resistance of the load 8 and the drive current Io. Is the voltage added to the voltage VO2 of the sensing terminal 12. Therefore, the voltage VO3 of the output terminal 13 is expressed by the following equation.

VO3 = VO2 + Z · Io (5) FIG. 4 shows the difference voltage (VCTL−VREF) and the voltage VO1,
The relationship with VO2 and VO3 is shown. In FIG.
sat1 and Vsat2 indicate the upper saturation voltage and the lower saturation voltage of the operational amplifiers 9 and 10, respectively. The output dynamic range is the saturation voltage Vsa lower than the ground voltage GND.
than the power supply voltage Vcc from t2 by high voltage V _L in the range of up to only a low voltage V _H upper saturation voltage Vsat1.
As can be seen from FIG. 4, the output voltage is determined around the reference voltage VREF.

[0013]

In FIG. 4, when the upper saturation voltage Vsat1 is equal to the lower saturation voltage Vsat2, the output dynamic range becomes maximum when the reference voltage VREF is set to Vcc / 2.

However, generally, the upper saturation voltage V
Since there is a voltage difference between sat1 and the lower saturation voltage Vsat2, setting the reference voltage VREF to Vcc / 2 does not maximize the output dynamic range. To set the output dynamic range to the maximum, the reference voltage VRE
F must be set to the center voltage of the output dynamic range. Therefore, the reference voltage VREF is shifted and set to the smaller one of the upper saturation voltage Vsat1 and the lower saturation voltage Vsat2.

As described above, in order to maximize the output dynamic range, the input reference voltage VREF must be adjusted to the center value of the output dynamic range. In this case, the output specifications of the preceding circuit are affected, which is not preferable.

An object of the present invention is to provide a drive circuit capable of setting an input reference voltage without being limited by an output dynamic range.

[0017]

According to a first aspect of the present invention, a drive circuit includes a current control circuit and an inverting amplifier circuit.
The current control circuit amplifies an input difference voltage between the first reference voltage and the command voltage and outputs a differential output; an inverted output and a non-inverted output of the differential output of the differential amplifier circuit And a resistive element connected therebetween. The inverting amplifier circuit amplifies an inverted output voltage of the differential output of the differential amplifier circuit with reference to the second reference voltage, and outputs the amplified voltage to a non-inverted output of the differential amplifier circuit. The load applied to one end is applied to the other end. A drive circuit according to a second aspect of the present invention includes a command voltage input terminal, a first reference voltage input terminal, a second reference voltage input terminal, an output terminal, a sensing output terminal, a current control circuit, and an inverting amplifier circuit.
A command voltage is input to the command voltage input terminal. The first reference voltage is input to the first reference voltage input terminal.
The second reference voltage is input to the second reference voltage input terminal. One end of a load is connected to the output terminal. The other end of the load is connected to the sensing output terminal. The current control circuit includes a first gain setting resistor having one end connected to the command voltage input terminal, a second gain setting resistor having one end connected to the first reference voltage input terminal, and an inverting input. A first operational amplifier having a node connected to the other end of the first gain setting resistive element and a non-inverting input node connected to the other end of the second gain setting resistive element; A third gain setting resistor element having one end connected to the non-inverting input node of the first operational amplifier and a fourth gain setting resistor element connected between the inverting input node and the output node of the first operational amplifier. An output node of the first operational amplifier is an inverted output node in the differential output, and the other end of the third gain setting resistance element is a non-inverted output node in the differential output and connected to the sensing output terminal. Differential amplifier circuit and Having a sensing resistor connected between the inverted output node and the non-inverting output node of the differential amplifier circuit. An inverting amplifier circuit, a first output voltage setting resistor element having one end connected to the inverted output node of the differential amplifier circuit, and an inverting input node connected to the other end of the first output voltage setting resistor element; A second operational amplifier having a non-inverting input node connected to the second reference voltage input terminal and an output node connected to the output terminal; and a second operational amplifier having a non-inverting output node connected between the non-inverting output node and the output node. And a second output voltage setting resistance element connected thereto.

[0018]

In the drive circuit according to the present invention, the voltage difference between both ends of the load is determined by the difference voltage between the command voltage and the first reference voltage, and the absolute voltage at at least one end of the load is determined by the second reference voltage. Therefore, the center voltage of the output dynamic range and the center voltage of the input dynamic range can be set separately.

[0019]

An embodiment of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a circuit diagram showing a configuration of a drive circuit according to one embodiment of the present invention.

This drive circuit comprises a command voltage input terminal 1, a first reference voltage input terminal 2, and a second reference voltage input terminal 1.
8, including gain setting resistors 3, 4, 5, 6, sensing resistor 7, output voltage setting resistors 16, 17 and operational amplifiers 9, 10.

The command voltage input terminal 1 has a command voltage VCTL
Is given. The first reference voltage input terminal 2 is supplied with a first reference voltage VREF, and the second reference voltage terminal 18 is supplied with a second reference voltage VREF2.

The resistor 3 is connected between the first reference voltage input terminal 2 and the non-inverting input terminal 14 of the operational amplifier 9, and the resistor 4 is connected between the non-inverting input terminal 14 of the operational amplifier 9 and the sensing terminal 12. It is connected to the. The resistor 5 is connected between the command voltage input terminal 1 and the inverting input terminal 15 of the operational amplifier 9, and the resistor 6 is connected between the inverting input terminal 15 of the operational amplifier 9 and the output terminal 11. The sensing resistor 7 is connected between the output terminal 11 and the sensing terminal 12. The load 8 is connected between the sensing terminal 12 and the output terminal 13.

The resistor 16 is connected between the output terminal 11 and the operational amplifier 10.
The resistor 17 is connected between the inverting input terminal 19 and the output terminal 13 of the operational amplifier 10. The non-inverting input terminal of the operational amplifier 10 is connected to the second reference voltage input terminal 18.

Next, the operation of the driving circuit of FIG. 1 will be described.
Here, the resistance values of the resistors 3, 4, 5, and 6 are represented by R1,
R2, R3, and R4. The voltages of the output terminals 11 and 13 are VO1 and VO3, respectively,
The voltage of No. 2 is VO2. Further, the resistance values of the resistors 16 and 17 are R5 and R6, respectively. The resistance value of the resistor 7 is R
7 is assumed.

The operational amplifier 9 functions as a differential amplifier, and differentially amplifies the difference voltage between the command voltage VCTL and the first reference voltage VREF at an amplification degree determined by the resistance ratio of the resistors 3, 4, 5, and 6, and A voltage proportional to the difference voltage is generated between the output terminal 11 and the sensing terminal 12. At this time, the absolute voltage of the voltages VO1 and VO2 is not determined only by the circuit system including the operational amplifier 9 and the resistors 3, 4, 5, and 6, and only the difference voltage (VO1−VO2) is determined. This difference voltage (VO1-VO2) is expressed by the following equation.

[0026]

(Equation 1) Further, the resistors 3 are set so that R1 = R3 and R2 = R4.
When the resistance values of 4, 5, and 6 are set, the above equation becomes simple and is expressed by the following equation.

VO2−VO1 = (R2 / R1) · (VCTL−VREF) (7) The output impedance of the sensing terminal 12 is the resistance 3 or 4.
Is set to be higher. Therefore, when the difference voltage (VO2-VO1) is represented by Vs, the drive current Io supplied to the load 8 is determined by the following equation.

Io = Vs / R7 (8) The voltage (VO3-VO2) across the load 8 is determined by the product of the driving current Io and the series resistance Z of the load 8 as in the following equation.

VO3−VO1 = Z · Io (9) From the above equations (6) to (9), the absolute voltage generated at the output terminals 11 and 13 only in the circuit system including the operational amplifier 9 and the resistors 4 to 7 Is not determined, but the difference voltage (VO3-
VO1) will be determined.

A circuit system for determining the absolute voltages of the output terminals 11 and 13 is an operational amplifier 10 and resistors 16 and 17. Next, this will be described.

The operational amplifier 10 performs an inverting amplification operation,
The difference voltage (VO3-VO1) is converted to a second reference voltage VREF2.
Are divided up and down by the resistance ratio of the resistors 16 and 17 around the center. Since the feedback circuit works so that the same current i flows through the resistors 16 and 17, the voltage VO3 at the output terminal 13 and the voltage VO1 at the output terminal 11 are expressed by the following equations, respectively.

VO3 = VREF2 + R6 · i (10) VO1 = VREF2-R5 · i (11) As can be seen from the equations (10) and (11), the difference voltage (VO
3-VO1) is distributed around the second reference voltage VREF2 at a ratio of upper side: lower side = R6: R5. R
In the case of 5 = R6, the difference voltage (VO3-VO1) is distributed in half with respect to the second reference voltage VREF2.

FIG. 2 shows the relationship between the difference voltage (VCTL-VREF) and the voltages VO1, VO2, and VO3. FIG.
, The difference voltage (VCTL−
VREF) and a second reference voltage VR which is the center voltage of the output dynamic range.
It can be set separately from EF2. Therefore,
The center voltage of the output dynamic range and the center voltage of the input dynamic range can be set separately.

Further, in the circuit of the above-described embodiment in which the operational amplifier 9 generates a voltage proportional to the difference voltage between the command voltage VCTL and the first reference voltage VREF, both ends of the sensing resistor 7 are used. Variations in drive current due to variations in resistance can be reduced, and a highly accurate drive current can be obtained.

[0035]

As described above, according to the present invention, the center voltage of the output dynamic range and the input reference voltage can be set separately, so that the restriction on the setting of the input reference voltage value can be relaxed. it can.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a drive circuit according to an embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between voltages in the drive circuit of the embodiment.

FIG. 3 is a circuit diagram showing a configuration of a conventional driving circuit.

FIG. 4 is a diagram showing a relationship between respective voltages in a conventional drive circuit.

[Explanation of symbols]

 1 Command voltage input terminal 3-6 Gain setting resistor 7 Sensing resistor 8 Load 9,10 Operational amplifier 16,17 Output voltage setting resistor 18 Second reference voltage input terminal VCTL Command voltage VREF First reference voltage VREF2 Second The same reference numerals in the drawings indicate the same or corresponding parts.

Claims (2)

(57) [Claims] 1. A differential amplifier circuit for amplifying an input difference voltage between a first reference voltage and a command voltage to output a differential output, and an inverted output and a non-inverted output of the differential output of the differential amplifier circuit. A current control circuit having a resistive element connected therebetween; and amplifying an inverted output voltage in a differential output of the differential amplifier circuit with reference to a second reference voltage, and amplifying the amplified voltage. A drive circuit including an inverting amplifier circuit that applies a non-inverted output of a differential output of the differential amplifier circuit to one end of a load that receives one end thereof. 2. A command voltage input terminal for inputting a command voltage, a first reference voltage input terminal for receiving a first reference voltage, a second reference voltage input terminal for receiving a second reference voltage, An output terminal to which one end of the load is connected, a sensing output terminal to which the other end of the load is connected, a first gain setting resistor element having one end connected to the command voltage input terminal, and the first reference voltage A second gain setting resistor element having one end connected to the input terminal; an inverting input node connected to the other end of the first gain setting resistor element; and a non-inverting input node connecting to the second gain setting resistor. A first operational amplifier connected to the other end of the resistance element;
A third gain setting resistor element having one end connected to the non-inverting input node of the operational amplifier, and a fourth gain setting resistor connected between the inverting input node and the output node of the first operational amplifier. A resistance element, an output node of the first operational amplifier serves as an inverted output node in differential output, and the other end of the third gain setting resistor element serves as a non-inverted output node in differential output. A differential amplifier connected to the sensing output terminal, a current control circuit having a sensing resistor connected between an inverted output node and a non-inverted output node of the differential amplifier, and the differential amplifier A first output voltage setting resistor element having one end connected to the inverted output node of the circuit, and an inverted input node connected to the other end of the first output voltage setting resistor element;
A second operational amplifier having a non-inverting input node connected to the second reference voltage input terminal and an output node connected to the output terminal; and a non-inverting output node and an output node of the second operational amplifier. A drive circuit including an inverting amplifier circuit having a second output voltage setting resistor element connected between the two.