KR830001977B1 - Power amplifier circuit - Google Patents

Abstract

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Description

Power amplifier circuit

1 is a circuit diagram showing one embodiment of the power amplifier circuit according to the present invention.

2 is a characteristic diagram for explaining the operation of the embodiment.

3 is a circuit diagram showing a second embodiment of the present invention.

4 (a) to 4 (b) are waveform diagrams for explaining the operation of the circuit shown in FIG. 3, respectively.

5 is a circuit diagram showing a third embodiment of the present invention.

The present invention relates to an improvement of a power amplifier circuit.

As is well known, in a power amplifier circuit for a low power supply voltage using a transistor at an output terminal, when a relatively large power output is required, the output amplitude is the voltage between the base emitters V _BE and the collector emitter saturation voltage V of the output transistor. Limited to _CE (SAT) and the like. When the load resistance is constant, the output power is proportional to the square of the output amplitude. In particular, in the power amplification circuit using a low power supply voltage, V _BE or V _CE (SAT) of the output transistor is large and sufficient high power is achieved. There was a problem that I could not get the output.

For this reason, conventionally, an output transistor or a bootstrap circuit is used to solve the above problem.

)의 증가를 초래하는 동시에 점유면적이 증대하는 등의 불편이 있었다. 또, 부우트 스트랩회로를 사용하면 브우트 스트랩용의 대용량 전해 콘덴서가 필요하고 역시 고가격화나 점유면적의 증대를 초래함과 동시에 예를들면 1.5[V]정도의 저전원 전압으로는 부우트 스트랩회로에 대한 직류적인 바이어스(bias)가 곤란해지는 결점이 있었다.However, if the output transformer is used, high price and torsion (

), And the occupancy area was increased. In addition, the use of the bootstrap circuit requires a large capacity electrolytic capacitor for the bootstrap, which also leads to high cost and an increase in the occupied area. There was a drawback that the direct current bias to is difficult.

)을 제거하기 위한 아이들 전류의 설정이 곤란하고 실용화하기 힘드는 등 여러가지 문제가 있었다.In particular, in the power amplifier circuit for the AB class amplification, the idle current of the output transistor is important, but the power amplifier circuit for the low power supply voltage has a cross-over twist (

There have been various problems, such as difficulty in setting the idle current for removing the current) and difficulty in practical use.

SUMMARY OF THE INVENTION The present invention has been studied in view of the above circumstances, and provides an extremely good power amplification circuit that is simple in configuration, can operate stably and reliably even at a low power supply voltage, and can easily set an idle current of an output transistor. For the purpose of

Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. In Fig. 1, 11 is a signal source of the amplified signal to be output, and one end of the output thereof is connected to the base of the PNP transistor Q ₁ via the capacitor C ₁ . Transistor Q and the _first emitter connected to the emitter of transistor Q ₂ of the other PNP type, and both transistors Q _1, the collector of Q ₂ are each resistor R _1, R ₂ the output of the signal source 11 via the other end Is connected to. Again, the connection point between the emitter of the transistor Q _{1 and} the emitter of the transistor Q ₂ is connected to the collector of the transistor Q ₃ of the PNP type. It is connected to the positive voltage source of the transistor Q ₃ emitter of the direct-current power supply 12 of the base is connected to the base of transistor Q ₁ of the PNP type. The emitter of the transistor Q ₁ is connected to the positive power supply terminal of the DC power supply 12 and connected to the output other end of the signal source 11 via resistors R ₄ and R ₃ in series. The connection point of the resistors R _3, R ₄ is through a resistor R ₅ is connected to the connection point with the capacitor C ₁ and the transistor Q ₁ base. In addition the collector of the transistor Q ₄ is connected to the other terminal of the output transistor Q signal source 11 at the same time, via a resistor R ₆ is connected to the base _4.

The circuit composed of the transistors Q ₁ to Q ₄ resistors R to R ₄ and the capacitor C constitutes the pre-layer width circuit 13 of the power amplifier circuit.

The connection point between the collector of transistor Q ₂ and resistor R ₂ is connected to the base of NPN transistor Q ₅ . The emitter of this transistor Q ₅ is connected to the other end of the output of the signal source 11, and the collector is connected to the collector of the transistor Q ₆ of the PNP type. The emitter of the transistor Q ₆ is connected to the electrostatic source of the DC power supply 12 via the resistor R ₇ , and the base is connected to the collector of the transistor Q ₆ and to the base of the output PNP transistor Q ₇ . It is.

The circuit composed of the transistors Q ₅ , Q ₆ and the resistor R ₇ constitutes the drive circuit 14 of the transistor Q ₇ for output.

The connection point between the collector of transistor Q ₁ and resistor R ₁ of the preamplifier circuit 13 is connected to the base of an NPN transistor Q ₈ for output. The emitter of this transistor Q ₈ is connected to the other end of the output of the signal source 11, and the collector is connected to the collector of the transistor Q ₇ .

The emitter of transistor Q ₇ is connected to the electrostatic source of DC power supply 12. The connection point between the collector of transistor Q _{7 and} the collector of transistor Q ₈ is connected to the preamplifier circuit 13 and the base of transistor Q ₂ via a resistor R ₈ and at the same time a speaker 15 as a capacitor C ₂ and a load. Is connected to the output other end of the signal source 11 via.

The connection point between the base of the transistor Q ₂ and the resistor R ₈ is connected to the output other end of the signal source 11 via a resistor R ₉ and a capacitor C ₃ in series.

The circuit composed of the transistors Q ₇ and Q ₈ constitutes the output circuit 16 of the power amplifier circuit.

Each base of the transistors Q ₇ and Q ₈ is connected to each base of the transistors Q ₉ and Q ₁₀ of the PNP type. The emitter of the transistor Q ₉ is connected to the electrostatic source of the DC power supply 12, the collector of the transistor Q ₁₀ is connected to the output other end of the signal source 11, and the collector of the transistor Q _{9 and} the emitter of the transistor Q ₁₀ . Are connected to each other.

The transistor Q ₉ forms a detection circuit 17 for detecting the operating current of the transistor Q ₇ .

The connection point between the collector of transistor Q _{9 and} the emitter of transistor Q ₁₀ is connected to the base of NPN transistor Q ₁₁ . The collector of the transistor Q ₁₁ is a transistor Q ₁ of the pre-amplifier circuit 13, is connected to the connection point of the emitter of the tree common connection point of transistors Q ₂ and Q ₃ collector. The emitter is connected to the emitter of the transistor Q ₁₂ of PNP type other. The base and the collector of the transistor Q ₂ are all connected to the other end of the output of the signal source 11.

하는 전류 I_F를 생성하고, 이 전류 I_F를 상기 전치증폭회로(13)에 귀환하여 약 일정으로 유지하도록 하는 연산 귀환회로(18)을 구성하는 것이다.And a circuit composed of the transistors Q ₁₁ and Q ₁₂ is approximately equal to the operating currents I _U and I _L of the transistors Q ₇ and Q ₈ of the output circuit 16.

It generates a current I _F and which, to this current I _F to the pre-feedback to the amplifier circuit 13 constituting the feedback operation circuit 18 to maintain approximately constant.

Further, a negative power supply terminal is connected to the DC power supply 12 with an output other end of the signal source 11.

In the power amplifying circuit having the above-described configuration, the operation thereof will be described, that is, a square wave phase alternately repeating the positive and negative cycles and the negative and negative cycles based on, for example, the ground potential in the signal source 11. Assume that the amplified power signal is output. then. This power amplified signal is supplied to the transistor Q ₁ of the preamplifier circuit 13. Here, since the transistors Q ₁ and Q ₂ are common to the emitter, they operate as differential amplifiers, and the negative half cycle and the positive half cycle of the power amplified signal are amplified from the respective collectors so that the transistors of the output circuit 16 are amplified. Q ₈ and transistor Q ₅ of drive circuit 14 are output. Then, the collector of transistor Q ₅ outputs a current adapted to the collector output of transistor Q ₂ , that is, an amplification current corresponding to a positive half cycle of the power amplified signal.

And the collector current of the transistor Q ₅ is via a transistor Q ₆ to drive the transistor Q _7. As a result, an amplification current corresponding to the positive half cycle and the negative half cycle of the power amplified signal flows to the collectors of the transistors Q ₇ and Q ₈ constituting the output circuit 16 to drive the speaker 15. In other words, the output circuit 16 has a pre-pull configuration for amplifying the positive and negative half cycles of the power amplified signal, respectively.

At this time, the DC voltage of the outputs of the transistors Q ₇ and Q ₈ is negatively fed back to the base of the transistor Q ₂ via the resistor R ₈ . When the base potential of the transistor Q ₁ is set to 1/2 Vcc (Vcc is the output voltage of the DC power supply 12) with the same resistance values as the resistors R ₃ and R ₄ , the negative feedback or DC voltage is also about 1 /. 2 Vcc.

Here, the operating current of transistor Q ₇ of the output circuit 16 is supplied to the base of transistor Q ₉ of the detection circuit 17. The transistor Q ₁₀ operates in proportion to the output current of the transistor Q ₉ , and detailed operation will be described later, but the current I _F generated by the operation feedback circuit 18 is fed back to the preamplifier circuit 13.

The operating current of the transistor Q ₇ here has been detected by the transistor Q _9. I.e., the transistor Q ₇ to Q ₉ are current constitutes a mirror circuit, now the transistors Q ₇ and Q ₉ with an emitter area ratio N: When a first collector current of the transistor Q ₉ Ic ₉ is a collector current of the transistor Q ₇ Ic ₇ about

Ic₇ Ic ₉ =

Ic ₇

It can be represented as.

When here think of the potential of the first middle point A (the base of the transistor Q _11), the potential of the transistor Q _8, the potential between the meter to the base of Q ₁₀ V _BE8, the sum of V _BE10, or the transistors Q _11, Q ₁₂ a can represent the sum of the potentials V _BE11, V _BE12 between the meter base. In other words, if the emitter area ratio between transistors Q ₈ and Q ₁₁ is M: 1, the collector current of transistor Q ₈ is I _L , and the saturation current of transistor Q ₁₁ of NPN type is I _SN, and the potential V between base emitters of transistor Q ₈ is present. _BE8 becomes the following equation.

K: Boltzmann constant

T: absolute temperature q: charge of electron

When the operating current of transistor Q ₇ is I _U and the saturation current of transistor Q ₁₀ of PNP type is I _SP , the potential V _BE10 between base emitters of transistor Q ₁₀ is given by the following equation.

Therefore, the potential at point (A) is (1) + (2)

Becomes

On the other hand, the transistors Q _11, when the current through Q _{12 F} to I, the transistor Q _11, the base emitter voltage V _BE11, V _BE12 of Q ₁₂ is the expression of the following:

Therefore, the potential of the point (A) is (4) + (5),

And since the formula (3) and (6) is the same,

Becomes

Again, since I _F is fed back to the collector of transistor Q ₃ of the preamplifier circuit 13,

V _BE4 : potential between base emitters of transistor Q ₄

V _BE5 : potential between base emitters of transistor Q ₅

It becomes a constant value given by, and the product (I _U × I _L ) of the operating currents of the transistors Q ₇ and Q ₈ for output is kept constant.

In addition, at the time of no signal,

Because of this, transistors Q ₇ and Q ₈ have an idle current (Ic idle)

It is decided. For example, when the current I _U of the transistor Q ₇ decreases in the negative half cycle of the power amplified signal, the current I _L of the transistor Q ₈ increases, and in the positive half cycle, I _L decreases with the increase of the I _U. As a result, characteristics as shown in Fig. 2 are obtained, and the class AB push-pull operation is performed. In FIG. 2, the horizontal axis indicates the output voltage V. In FIG.

Incidentally, the dotted line during the second period represents the idle currents Ic idle of the transistors Q ₇ and Q ₈ .

인 전류 I_F를 생성하도록 하고 있기 때문에, 회로구성이 간편하고, 감전압 특성도 개량되어 저전원 전압으로도 안전하고 또 확실하게 동작할 수가 있다.Therefore, the power amplifying circuit having the above-described configuration makes it possible to detect the operating current of one of the transistors Q ₇ of the output transistors Q ₇ and Q ₈ with the transistor Q ₉ , and the operation feedback circuit 18 outputs the transistor Q for output. Also use the voltage V _BE8 between the base emitters of ₈

Since the phosphorus current I _F is generated, the circuit configuration is simple, and the reduced voltage characteristic is also improved, so that it can safely and reliably operate even at a low power supply voltage.

In addition, the idle currents of the transistors Q ₇ and Q ₈ for output can also be easily set.

가 되는 전류 I_F를 출력하는 연산회로(연산 귀환회로(18)과 겸용)와 이 연산회로의 출력전류 I_F를 약일정으로 유지하도록한 기능을 갖는 귀환회로(연산 귀환회로(18)과 겸용)를 구비한 것이 본 발명의 특징이 되는 부분이다.The first and second transistors (transistors Q ₇ and Q ₈ for the push-pull output configured as described above, the detection circuit 17 for detecting the operating current of the first transistor, and the detection current of the detection circuit) It operates as a proportional current base emitter voltage V _BE10 is the base of the second transistor emitter voltage V _BE8 and the transistor of the added third (transistor Q ₁₀₎ and the base emitter voltage V _BE11, to be added together V _BE12 The addition of the voltage between the base emitters of the fourth and fifth transistors and the voltage between the base emitters of the second and third transistors with the fourth and fifth transistors (transistors Q ₁₁ , Q ₁₂ ). Are connected to be the same, and are approximately equal to the operating currents I ₁ and I ₂ of the first and second transistors.

The current I _F calculation circuit for outputting a (calculated feedback circuit 18 and combined) that the output current I _F to the feedback having functions of maintaining approximately constant circuit (operational feedback circuit 18 and the combination of the arithmetic circuit ) Is a part of the present invention.

3 shows a second embodiment of the present invention. That is, 21 is a signal source of the amplified signal to be output, and one end of the output thereof is connected to the base of the transistor Q ₂₁ of the PNP type. The emitter of this transistor Q ₂₁ is connected to the base of the transistor Q ₂₂ of the PNP type, and the collector is connected to the other end of the output of the signal source 21. The collector of the transistor Q ₂₂ is connected to the output other end of the signal source 21 via a resistor R ₁₁ , and the emitter is connected to the emitter of another PNP transistor Q ₂₃ . The collector of this transistor Q ₂₃ is connected to the other end of the signal source 21 via the resistor R ₁₂ , and the base is connected to the other end of the signal source 21 via the resistor R ₁₃ and the capacitor C ₁₁ in series. have.

In addition, a connection point of the emitter of the transistor Q ₂₂ and the transistor Q ₂₃ and the emitter of the transistor Q is connected to the collector ₂₄ of the PNP type.

And is connected to the electrostatic fabric emitter direct current power source 22 of the transistor Q _24, the base is connected to the base and collector of the transistor Q ₂₅ of PNP type other. Via the emitter resistor R ₁₄ of the transistor Q ₂₅ it is connected to the positive supply of the direct current power source (22).

The circuit composed of the transistors Q ₂₁ to Q ₂₅ , the resistors R ₁₁ to R _14, and the capacitor C ₁₁ constitute the power amplifier circuit 23.

The connection points of the collectors of the transistors Q ₂₂ and Q ₂₃ and the resistors R ₁₁ and R ₁₂ are connected to the bases of the transistors Q ₂₆ and Q ₂₇ of the NPN type, respectively. The emitter of this transistor Q ₂₆ is connected to the other end of the output of the signal source 21, and the collector is connected to the collector of the transistor Q ₂₈ of the PNP type.

The emitter of the transistor Q ₂₈ is connected to the electrostatic source of the DC power supply 22 via the resistor R ₁₅ , and the base is connected to the base of the other PNP type transistor Q ₂₉ , and the collector and transistor Q of the transistor Q ₂ are also connected. The connection point of the collector of ₂₈ is connected. Connected to the electrostatic fabric emitter direct current power source 22 of the transistor Q ₂₉ and the collector is connected to the other end of the output of the signal source 21 via a resistor R _16. The output terminal of the emitter signal source 21 of the transistor Q ₂₇ is connected, and the collector is connected to the collector of the transistor Q ₃₀ of the PNP type. The emitter of the transistor Q ₃₀ is connected to the constant current source of the DC power supply 22 via the resistor R ₁₇ , and the base is connected to the base of the output PNP type transistor Q ₃₁ , and the collector of the transistor Q ₂₇ and the transistor Q ₃₀ are connected. It is connected to the connection point of the collector.

The circuit composed of the transistors Q ₂₆ to Q ₃₀ and the resistors R ₁₅ to R ₁₇ constitutes the drive circuit 24 of the power amplifier circuit.

Again, the emitter of the transistor Q ₃₁ is connected to the electrostatic source of the DC power supply 22, and the collector is connected to the collector of the NPN transistor Q ₃₂ for output. The base of the transistor Q ₃₂ is connected to the connection point of the collector of the transistor Q ₂₉ and the resistor R ₁₆ , and the emitter is connected to the output end of the signal source 21. The connection point between the collector of transistor Q _{31 and} the collector of transistor Q ₃₂ is connected to the connection point between the base of transistor Q ₂₃ and resistor R ₁₃ via resistor R ₁₈ and via capacitor C ₁₂ and speaker 25. The other end of the signal source 21 is connected.

The circuit composed of the transistors Q ₃₁ and Q ₃₂ constitutes the output circuit 26 of the power amplifier circuit.

The bases of the transistors Q ₃₁ and Q ₃₂ are commonly connected to the bases of the PNP transistors Q ₃₃ and Q ₃₄ , respectively. The emitter of the transistor Q ₃₃ is connected to the electrostatic source of the DC power supply 22 via the resistor R ₁₉ , and the collector is connected to the emitter of the transistor Q ₃₄ . The base of the transistor Q ₃₄ is connected in common with the base of the transistor Q ₃₂ , and the collector is connected to the output end of the signal source 21. In the connection point of the emitter of the transistor Q ₂₃ and the collector of the transistor Q ₃₄ is of an NPN type transistor Q ₃₅ is connected to the base. The collector of this transistor Q ₃₅ is connected to the positive power supply terminal of the DC power supply 22 via the resistor R ₂₀ , and the emitter is connected to the emitter of another PNP type transistor Q ₃₆ . The base and the collector of the transistor Q ₃₆ are both connected to the other end of the output of the signal source 21.

로 하는 전류 I_F를 생성하는 연산회로(27)을 구성하는 것이다.And a circuit composed of the transistors Q ₃₃ to Q ₃₅ and a resistor R ₁₉ is about the operating current I _U .I _L of transistors Q ₃₁ and Q ₃₂ of the output circuit 26.

The calculation circuit 27 for generating a current I _F is formed.

The connection point between the collector of the transistor Q ₃₅ and the resistor R ₂₀ is continuous at the output end of the signal source 21 with diodes D ₁ and D ₂ interposed in the forward direction. The connection point of the diodes D ₁ and D ₂ are connected to the transistor Q ₃₇ of NPN type base.

The collector of the transistor Q ₃₇ is connected to the connection point of the collector and the base of the transistor Q ₂₅ constituting the preamplifier circuit 23, and the emitter is continuously connected to the output end of the signal source 21.

The circuit composed of the diodes D ₁ , D ₂ , the transistor Q ₃₇ and the resistor R ₂₀ generates a difference current between the output current I _F from the arithmetic circuit 27 and the reference current which will be described later. The feedback circuit 28 for returning the current to the preamplifier circuit 23 is configured.

The negative power supply terminal of the DC power supply 22 is connected to the other output end of the signal source 21.

The operation of the power amplifier circuit having the same configuration as that of the second embodiment will be described. In other words, the sine wave-powered amplified signal on the basis of the ground potential output from the signal source 21 is supplied to the base of the transistor Q ₂₂ via the transistor Q ₂₁ of the preamplifier circuit 23. Here, since the transistors Q ₂₂ and Q ₂₃ are common to the emitter, they operate as differential amplifiers, and the negative half cycle and the positive half cycle of the power amplified signal are amplified from the respective collectors so that the transistor Q ₂₆ of the drive circuit 24 is amplified. , Is output to Q ₂₇ . Then, a current suitable for the collector output of the transistors Q ₂₂ , Q ₂₃ , that is, an amplification current corresponding to the negative half cycle and positive half cycle of the power amplified signal is output to the collectors of the transistors Q ₂₈ and Q ₂₇ . The collector outputs of the transistors Q ₂₆ and Q ₂₇ drive transistors Q ₃₁ and Q ₃₂ of the output circuit 26 via transistors Q ₂₈ , Q ₂₉ and transistor Q ₃₆ , respectively. This is because the collector of the transistor Q _31, Q ₃₂ of the output circuit 26, the amplified current corresponding to a defined half cycle and negative half cycle of the to-be-amplified signal power flow, and drives the speaker acres (25). In other words, the output circuit 26 has a push-pull configuration for amplifying the positive and negative half cycles of the power amplified signal, respectively.

At this time, the transistor Q _31, a direct current voltage division of the output Q of the feedback portion ₃₂ is the base of the transistor Q ₂₈ via the resistor R _18.

Here, the operating current of the transistor Q ₃₁ of the output circuit 26 is supplied to the base of the transistor Q ₃₃ of the calculation circuit 27. The transistor Q ₃₄ operates in proportion to the output current of the transistor Q ₃₃ , and as described in the circuit of FIG. 1, the sum of the voltages V _BE32 and V _BE34 between the base emitters of the transistors Q ₃₂ and Q ₃₄ and the transistor Q ₃₄ . _35, since the same, the sum of Q ₃₆ base-emitter voltage V _BE35, V _BE36 of the transistor Q ₃₅ and the transistor current I _F1 flowing through Q ₃₆ Q _31, the Q ₃₂ operating current I _U, the (7, with respect to I _L As shown in

Becomes

If the current flowing through the resistor R ₂₀ is set to I ₀ , this I ₀ always takes a constant value, and the collector current I _F2 of the transistor Q ₃₇ of the feedback circuit 28 is theoretically calculated.

Becomes The output current I _F2 of the transistor Q ₃₇ is fed back to the transistors Q ₂₄ and Q ₂₅ of the preamplifier circuit 23.

Here, the transistors Q ₂₄ and Q ₂₅ have an operating current of the differential amplifier composed of transistors Q ₂₂ and Q ₂₃ as the feedback current I _F2 from the feedback circuit 28 increases (that is, I _F1 decreases). This constitutes a current mirror circuit which operates so as to take the feedback in the increasing direction.

4 shows waveforms of respective parts of the circuit shown in FIG. That is, in the positive half cycle and the negative half cycle of the amplified signal whose current value I changes at the time T as shown in the same figure (a), the transistors Q ₃₁ and Q ₃₂ are respectively divided into the same figure (b) and (c). Amplify as shown.

As shown in the diagram d, the feedback current I _F2 changes depending on the magnitude of the power amplified signal.

Therefore, according to the same power amplifying circuit as in the second embodiment, since the operating currents of the preamplifier circuit 23, the drive circuit 24, and the like are changed in accordance with the magnitude of the power amplified signal, the entire circuit is rapidly supplied. When the power consumption voltage is reduced in proximity to the operation, the use effect of the power supply voltage is remarkably improved, and it is possible to operate stably and reliably even at a low power supply voltage.

In addition, the resistor R ₂₀ may be replaced with a constant current circuit.

The fifth turning the third embodiment the output of the transistor Q _41, Q ₄₂ as shown in the present invention is to donggeuk Castle NPN type as is. Then, the operating current of the transistor Q ₄₁ is detected by the transistor Q _43, transistor Q ₄₄ constituting a current mirror circuit, via the Q ₄₅ is the operating current of the transistor Q _46.

Here, the transistor Q _42, the sum of the base emitter voltage V _BE42, V _BE46 of Q ₄₆ and the transistor Q _47, since the base emitter voltage V _BE47, the sum of V _BE48 of Q ₄₈ is the same, as mentioned earlier The operating current I _F3 of the transistors Q ₄₇ and Q ₄₈ is equal to the operating currents I _U and I _L of the transistors Q ₄₁ and Q ₄₂ .

Becomes

The current I _F3 is taken a difference from the output current I ₁ from the constant current circuit composed of the transistors Q ₄₉ and Q ₅₀ , and the current suitable for the secondary current is composed of the transistors Q ₅₁ , Q ₅₂ and the resistor R ₂₁ . It is supplied to a differential amplifier circuit composed of transistors Q ₅₃ and Q ₅ via a current mirror circuit having a gain of.

Therefore, almost the same effect can be obtained by operation substantially the same as the above-mentioned first and second embodiments. In the circuit shown in the third embodiment, the capacitor C ₂₁ is inserted into a collector of transistor Q ₄₇ , i.e., a feedback loop for determining the idle currents of transistors Q ₄₁ and Q ₄₂ for output. To prevent oscillation when the gain is large. That is, by inserting the capacitor C ₂₁ , the gain of the feedback loop can be designed to be large, and the imbalance of the idle current can be effectively suppressed.

In addition, this invention is not limited to said each Example, In addition, it can be variously modified and implemented in the range which does not deviate from the summary.

Therefore, as described above, according to the present invention, a very good power amplifier circuit can be provided because the configuration is simple, it can operate stably and reliably even at a low power supply voltage, and the idle current of the output transistor can be easily set. There is a number.

Claims (1)

The first and second transistors for the push-pull output, the detection circuit for detecting the operating current of the first transistor, and the current proportional to the detection current of the detection circuit, so that the voltage between the base emitters The addition value of the voltage between the base emitters of the 4th and 5th transistors which has the 3rd transistor added with the voltage between base emitters of a transistor, and the 4th and 5th transistors added with the voltages between base emitters, and It is connected so that the added value of the voltage between the base emitters of the second and third transistors becomes equal, and is approximately equal to the operating currents I ₁ and I ₂ of the first and second transistors.

The current I _F and the output operation circuit, the arithmetic circuit output current I _F to being configured by comprising a feedback circuit having a function to maintain the approximately constant power amplifying circuit of which is.

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