JP2790240B2 - Orthogonal frequency division multiplexed signal transmitting / receiving device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to OFDM (Orthogonal Frequency Division Multiplexing).
The present invention relates to a division multiplexing (signal multiplexing) signal transmitting / receiving apparatus, and particularly to an O / O signal suitable for digital mobile communication.
The present invention relates to an FDM signal transmitting / receiving apparatus.

[0002]

2. Description of the Related Art A conventional OFDM signal transmitting apparatus will be described with reference to FIG. First, a digital information data signal is supplied to a serial / parallel conversion circuit 70 via an input terminal.
An error correction code is added as needed. The output signal of this circuit 70 is supplied to an IFFT circuit 71, and the output signal is supplied to a D / A converter 73 via a guard interval circuit 72 for reducing multipath distortion. Here, the signal is converted into an analog signal, and the next LPF 7
4 allows only the components of the required frequency band to pass. Output signals of the analog real and imaginary parts are supplied to a quadrature modulator 75, and an OFDM signal is output.

[0003] The OFDM signal is frequency-converted by a frequency converter 76 into a frequency band to be transmitted, and is supplied to the next transmitting unit 77, which transmits the signal through a linear amplifier and a transmitting antenna. Is done. The output signal of the intermediate frequency generation circuit 78 and the signal passed through the 90 ° shift circuit 78A are supplied to the quadrature modulator 75, respectively. The clock signal output from the circuit 79 is supplied as an operation signal to the serial-parallel conversion circuit 70, the IFFT circuit 71, the guard interval circuit 72, and the D / A converter 73, respectively.

Next, an OFDM signal receiving apparatus will be described with reference to FIG. The receiving section 80 amplifies the signal from the transmitting section 77 obtained by the receiving antenna constituting the same by a high frequency amplifier, and supplies the amplified signal to the intermediate frequency amplifier circuit 82 via the frequency converter 81. Demodulator 83
Supplied to The output signal of the circuit 82 is supplied to the intermediate frequency generation circuit 89 via the center carrier detection circuit 90. The output signal of the circuit 89 and the signal passed through the 90 ° shift circuit 89A are respectively supplied to the quadrature demodulator 83, and the output signals of the real and imaginary parts are decoded. The output signal of the quadrature demodulator 83 is supplied to an A / D converter 85 via an LPF 84 and is converted into a digital signal, and the output signal of the 83 is also supplied to a synchronization signal generation circuit 91.

[0005] These signals are supplied to an FFT / QAM decoding circuit 87 via the next guard interval circuit 86. This circuit 87 is supplied with a synchronization signal generation circuit 91.
Performs a complex Fourier operation on the basis of the synchronizing signal, finds the level of the real part and imaginary part signals (real part, imaginary part) for each frequency of the input signal, and quantizes the signal transmitted by the carrier for digital information transmission. The level of the obtained digital signal is obtained, and the digital information is decoded. The output signal of the FFT / QAM decoding circuit 87 is output via the parallel / serial conversion circuit 88. Here, if the intermediate frequency of the transmitting device and the intermediate frequency of the receiving device completely match, only the modulation component can be obtained, and there is no problem. However, the intermediate frequency generating circuit and the local oscillator of the frequency converter (not shown) ), If the frequency stability is not high, or if there is a phase error between both output signals, the subsequent demodulation operation is affected, and the error occurrence probability of QAM decoded data increases.

[0006]

In an OFDM signal transmitting and receiving apparatus, a large number of carriers can be modulated and demodulated relatively easily using an IFFT circuit and an FFT circuit. Frequency amplitude characteristics and phase characteristics within the band are no longer constant, and accurate QAM
In order to perform demodulation, calibration for each carrier wave is required. The present invention has been made in view of the above points, and has been made to reduce the number of carriers required for calibration as much as possible, perform appropriate inverse quantization of a QAM signal, and decode an OFDM signal. It is an object of the present invention to provide an OFDM signal transmitting / receiving apparatus having the above configuration.

[0007]

An OFDM signal transmitting and receiving apparatus according to the present invention is an orthogonal frequency division multiplexing signal transmitting apparatus in which carriers are arranged orthogonally and independent digital information is transmitted in each carrier. An IFFT circuit for generating a supplied multi-level QAM modulation signal;
A D / A converter to which an output of the IFFT circuit is supplied;
A quadrature modulator to which the output of the D / A converter is supplied, and a symbol number counting circuit that counts the number of symbols and supplies a carrier number signal corresponding to the number of symbols to the IFFT circuit as a switching signal, The symbol number counting circuit specifies whether an applied signal is an information signal or a reference signal for QAM decoding, and the IFFT circuit determines whether a predetermined carrier number is specified by the symbol number counting circuit. The orthogonal signal is transmitted from the quadrature modulator so that the reference signal is transmitted on the carrier of the number and the information signal that should have been transmitted on the specified carrier is transmitted on the auxiliary information transmission carrier. And receiving the signal from the orthogonal frequency division multiplexing signal transmitting apparatus. A quadrature demodulator for demodulating a signal, an A / D converter supplied with the output of the quadrature demodulator, an FFT / QAM decoding circuit supplied with the output of the A / D converter, Generate a carrier number signal to be associated with the calibration carrier,
The switching signal for switching the information signal transmitted by the auxiliary carrier into a predetermined information signal sequence and inserting the switching signal is the FFT, QA
A symbol number counting circuit to be supplied to the M decoding circuit is configured to achieve the above object.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an OFDM signal transmitting / receiving apparatus according to the present invention will be described below with reference to FIGS. 1 to 4 and FIG. FIG. 1 shows an embodiment of an OFDM signal transmitting apparatus according to the present invention.
These are compressed audio and video signals. OFDM
Is a technique in which a large number of carriers are arranged orthogonally and independent digital information is transmitted in each carrier. Since the carriers are orthogonal, the spectrum of an adjacent carrier becomes zero at the frequency position of the carrier.

In order to make this orthogonal carrier, IFFT
Circuit technology is used. By performing an inverse DFT (Discrete Fourier Transform) with N complex numbers during the time interval T, O
An FDM signal can be generated, and each point of the inverse DFT corresponds to a modulation signal output. The basic specifications of the device of the present invention shown in FIGS. 1 and 2 are as follows. (A) Central carrier frequency: 100 MHz (b) Number of carriers for transmission: 248 waves (c) Modulation method: 256 QAM OFDM (d) Number of carriers used: 257 waves (e) Transmission bandwidth: 100 kHz, used bandwidth: 99
kHz (f) Transfer rate: 750 kbps (g) Guard interval: 60.6 μsec

Next, the arrangement of carriers will be described. The arrangement of the carriers is centered on the intermediate frequency 10.7 MHz (this is referred to as the 0th carrier), and the left and right carriers of 128 waves (the carriers on the right side of the center frequency are arranged in the first order in order).
The carrier, the second carrier,..., The 128th carrier, and the left carrier are referred to as the −1st carrier, the −2nd carrier,. ) Is arranged, and the carrier assignment is set as follows.

The 0th carrier transmits an unmodulated carrier as a reference for amplitude and phase to the entire carrier. The mode information of the first carrier system is transmitted. Second carrier Transmits information that should have been transmitted on the positive calibration carrier. 21st carrier The reference angle level, reference amplitude level, and no carrier are transmitted alternately, with four symbols as one sequence. 128th carrier This carrier is set to the highest positive frequency. The -1st carrier transmits a carrier number to which the calibration information is transmitted. 2nd carrier Transmits the information that should have been transmitted on the negative calibration carrier. 21st carrier Reference angle level, reference amplitude level,
No carrier is transmitted alternately with four symbols as one sequence. -128th carrier This is a carrier set to the negative maximum frequency. Other carriers Transmit information signals except for being specified as a calibration information carrier.

Next, the individual definition of the carrier is as follows. 0th carrier Unmodulated carrier without angular modulation component First carrier Defines the transmission mode. 1st carrier Specifies the positive and negative carrier numbers of the calibration carrier. If the order is set to twice every eight lines in advance, the carrier number is uniquely determined from the symbol number as described below. Where X
Indicates a state in which no calibration carrier is specified. Symbol number 0 1 2 3 4 5 6 7 8 9 ... Carrier number X X 8 8 16 16 24 24 32 32 ...

The symbol number is a first symbol, a second symbol,..., A 256 symbol in order with respect to a predetermined calibration frame transmitted by mode information bits and a symbol transmitted after the end signal. Call. The symbol number is set to 00 (X'00) at the start point of the calibration frame, counting starts from that point, and ends at 255 (X'FF). In the case of carrier numbers 0 and 21, replacement for carrier calibration is not performed.

The relationship between the symbol number and the calibration carrier is as follows. 8th bit (MSB) 1st place carrier address (0 = 0, 1 = + 1) 7th bit 2th place carrier address (0 = 0, 1 = + 2) 6th bit 4th place carrier address (0 = 0,1 = + 4) 5th bit Carrier address of 64th digit (0 = 0,1 = + 64) 4th bit Carrier address of 32nd digit (0 = 0,1 = + 32) 3rd bit 16th digit of 16th digit Carrier address (0 = 0, 1 = + 16) Second bit Carrier address of 8th place (0 = 0, 1 = + 8) First bit (LSB) 0: First half 1: Second half

[0015] When the information transmission carrier is set to the calibration state, the information is transmitted by this carrier (auxiliary signal transmission carrier). ± 21st carrier Transmits the details of the calibration information. A signal switching state is detected, and a symbol synchronization signal is detected. The angle information at the time of encoding the ± 128th carrier is set to 0, and the sample clock information is transmitted.

Transmission of information signal 24 in one symbol period
Transmits 8 bytes of digital data. The digital data includes the 3rd to 20th carriers, the 22nd to 127th carriers, the -3rd to -20th carriers, and the 22nd to -127th carriers.
M-modulated and transmitted.

Next, the calibration of the carrier will be described below. When the calibration state of a carrier is designated by a carrier number represented by 8 bits, data to be transmitted on positive and negative carriers (A1, A2) is as follows.
The transmission is performed by the positive and negative second carriers (B1, B2), and the next calibration signal is transmitted by each carrier. That is, at the time of the odd symbol, the positive carrier is used for the eighth symbol.
The amplitude level, the eighth angle level is transmitted by a negative carrier, the eighth angle level is transmitted by a positive carrier, and the eighth amplitude level is transmitted by a negative carrier in the case of an even symbol. However, usually, data to be transmitted is transmitted on a given carrier, but transmission of data is periodically stopped, and a signal of a reference level is transmitted. When 21 carriers are designated, this carrier is not replaced. The details of the conditions of the amplitude level and the angle level will be described later.

Next, calibration frame synchronization will be described below. Calibration frame is 2
It is composed of 56 symbols, and the calibration frame section can be known from the symbol number of the -1st carrier. The calibration frame end code has an error correction function so that it can be identified even if an error is mixed during decoding. The calibration corrects the crosstalk component of the amplitude / angle signal due to the quadrature angle error in the carrier and corrects the reference amplitude / angle level.

The correction level of these characteristics with respect to the carrier number is recognized as a curve, and the correction amount according to the characteristics is obtained by calculation even during the period when the calibration signal is not transmitted. This makes it possible to smoothly perform inverse quantization of 256 QAM in a long calibration frame period. 256QAM decoding is performed using a predetermined correction curve, and when the data error amount is smaller than a predetermined value, the correction curve is determined to be appropriate and the correction amount is fixed.

As shown in FIG. 1, for example, a digital information signal which is an audio or video signal in which an information signal is compressed by an encoding method such as MPEG is supplied to a serial / parallel conversion circuit 2 via an input terminal 1. An error correction code is added as needed. In this circuit 2, the input signal is 2
The signals are arranged and output as 56QAM modulation signals. The 256 QAM modulation is a method of defining 16 levels in the amplitude direction and 16 levels in the angle direction for a carrier to transmit information, and specifying a value of 256 of 16 × 16 for transmission. In this embodiment, of the 257 wave carriers, 2
The information is transmitted using 48 waves, and the remaining 9 waves are used for calibration and for transmitting other auxiliary signals.

The serial / parallel conversion circuit 2 is configured to output 248 bytes of digital data during one symbol period, that is, 248 sets of 4-bit parallel data during one symbol period. The output signal of the serial-parallel conversion circuit 2 is
IFFT, pilot signal generation circuit (IFFT circuit) 3
And the symbol period setting circuit 3S.

The symbol period setting circuit 3S generates the symbol period information, the reference amplitude level for QAM decoding, and the reference angle level by switching the inputs of the IFFT and pilot signal generation circuits 3 using a common reference carrier. Is supplied to the circuit 3 and the symbol number counting circuit 3C. The symbol number counting circuit 3C counts the number of symbols, and supplies a carrier number signal corresponding to the number of symbols to the IFFT / pilot signal generation circuit 3 as a switching signal.

The reference carrier is switched between the reference amplitude level and the reference angle level for each symbol, and the guard interval is a case where the reference carrier is an integral multiple of the wavelength, that is, the guard interval is set using N = 256 IFFT. A case where reference signal information is transmitted using the 21st carrier as a reference carrier when setting to 6 clocks will be described. The carrier phase difference caused by the guard interval differs depending on how many sample clocks the guard interval is given and the order of the frequency used in the IFFT.

If the period of the guard interval is p clocks and the order of the carrier frequency used as the reference wave is q in the IFFT whose period is N, the period in which the carrier frequency exists in the guard interval is as follows. 2π × p × q / N That is, when N = 256 and p = 6, the signal of q = 21 has a carrier of approximately half a wavelength in the guard interval period. As another example, N = 256 IF
When setting the Garteau interval to p = 4 clocks using FT, the case where reference signal information is transmitted using the 32nd carrier (q = 32) corresponds to this.

A case where the 21st carrier is used as a reference carrier (reference carrier) will be described. When numbering a transmitted symbol signal, the symbol signal is transmitted as a modulated signal for the center carrier according to a sequence given by the lower two bits of the number. The manner of providing a modulated signal to each of the positive and negative 21st-order carriers (sidebands with respect to the center carrier) is as follows. Symbol sequence Positive 21st carrier Negative 21st carrier 08 amplitude, 0 angle level 0 amplitude, 0 angle level 10 amplitude, -8 angle level 0 amplitude, 0 angle level 20 amplitude, 0 angle level -8 amplitude, 0 angle level 30 amplitude, 0 angle level 0 amplitude, 8 angle level

However,

The level is given to the reference carrier for each symbol in either the positive or negative carrier in the amplitude direction,
Alternatively, any modulation in the angular direction is given. Therefore, these signals are decoded in order, and the receiving apparatus can know the level of the reference signal necessary for the inverse quantization of the QAM signal. , Or what kind of crosstalk is given to carriers with positive / negative symmetry. This is summarized below. Reference amplitude level Reference angle level Amplitude-angle crosstalk within the same carrier Crosstalk to symmetric carrier (due to amplitude-angle level difference, etc.)

Next, the operation of the 21st carrier as a side band with respect to the center carrier will be described. 21st
When the carrier is given a level in the positive amplitude direction, it is equivalent to the positive side band of the upper and lower side buds generated when the center carrier is amplitude-modulated at a frequency 21 times the symbol frequency. Therefore, this sideband goes around the center carrier 21 times during the effective symbol period. Further, the rotation is performed by 回 転 during the guard interval.

The next sequence is equivalent to the positive sideband when the angle modulation is performed by the negative signal, and the next sequence is the negative sideband when the amplitude modulation is performed by the negative signal, The last sequence corresponds to a negative side band when angle modulation is performed with a positive signal. When considering the rotation of the positive and negative 21st carrier, the position returns to the original position at the beginning and end of the effective symbol period. Therefore, when considering the rotation in the guard interval, the phase of the positive and negative 21st carrier becomes the phase every symbol period. Change by 90 degrees. Therefore,
The receiving apparatus can detect the position of the symbol synchronization signal by detecting the signal switching state.

The IFFT and pilot signal generation circuit 3
Operates by the clock signal output from the clock signal generation circuit 10 and operates on 256 carriers for 256 waves.
QAM modulation is performed, and each output signal is output as a real and imaginary component. Further, the sampling frequency point information of the circuit 3 is transmitted as Nyquist frequency information (pilot signal) which is a value of 1/2 of the period N, and since this frequency information is 1/2 of the sampling frequency point information, The Nyquist signal information is decoded and multiplied by
A sampling position signal for operating the FT circuit can be created. This Nyquist frequency information is IFFT,
N / 2 real part input terminal R of pilot signal generation circuit 3
(Imaginary part input terminal I) is obtained by applying a signal of a certain level.

The output signals of these circuits 3 are transmitted to the next RAM
(Random access memory) This is supplied to a guard interval setting circuit 4 having 4A. The circuit 4 sets a guard interval gi, which is a predetermined section for reducing multipath distortion in the transmission path, as shown in FIG. The guard interval setting circuit 4 operates by the clock signal output from the clock signal generation circuit 10,
The last part in the window section obtained from the IFFT and pilot signal generation circuit 3 is arranged immediately before the window section signal. To achieve this, the guard interval setting circuit 4 sets this period equal to the last period (gi) when reading out the signal from the IFFT / pilot signal generation circuit 3 which is taken into the RAM (4A) of the guard interval setting circuit 4. ), The process returns to the beginning, reads out the effective symbol period ts, and sends out the signal of the symbol period ta. The Nyquist frequency information is transmitted even within the guard interval, but in order to maintain continuity with the preceding and following IFFT window interval signals, the transmitted pilot signal is made to have an integer wavelength within the guard interval.

Although the case where the Nyquist frequency is used as the pilot signal has been described, the Nyquist frequency need not be used as long as it has a simple integer ratio relationship with the sampling position signal. Higher ones may be used. When considering an IFFT with a period M, M /
The pilot signal is arranged at a position of 1/2 of the Nyquist frequency which is 4, and 3M / 4, and the carrier transmitted by OFDM is from the first to the M / 4th and the 3M / 4th in the IFFT. The signals output up to the Mth are used.

Thus, a signal equivalent to the case where M = 2N in the above example can be obtained. Therefore, a continuous pilot signal can be transmitted even within the guard interval, and the sampling position signal can be obtained by decoding this pilot signal and quadrupling it. FFT
If the window section signal information can be separately decoded, the FFT operation of the OFDM signal can be performed in combination with the sampling position signal obtained according to the present embodiment, and the OFDM signal can be decoded.

Next, the symbol period of the guard interval setting circuit 4 will be described with reference to FIG. First, when the used bandwidth is 99 kHz and the period is N = 256, the effective symbol frequency fs and the effective symbol period ts are as follows, respectively. fs = 99,000 / 256 = 387 Hz ts = 1 / fs = 2586 μsec If the guard interval period gi, which is a section for removing multipath distortion, is determined for six wavelengths of the carrier, gi is set as follows. gi = (1 / 99,000) × 6 = 60.6 μsec At this time, the symbol period ta and the symbol frequency fa are respectively as follows. ta = ts + gi = 2586 + 60.6 = 2646.6 μsec fa = 1 / ta = 378 Hz

The output signal of the guard interval setting circuit 4 is supplied to a D / A converter 5 where it is converted into an analog signal, and only components in a required frequency band are passed by the next LPF 6. Real analog value,
The imaginary output signal is supplied to the next quadrature modulator 7,
The output signal of the 10.7 MHz intermediate frequency generation circuit 9 and the signal passed through the 90 ° shift circuit 8 are supplied to the quadrature modulator 7 to output an OFDM signal. This OFDM signal is converted to a frequency band to be transmitted by a frequency converter 1.
The signal is frequency-converted by 1 and supplied to the next transmitting unit 12, which transmits the signal through the linear amplifier and the transmitting antenna. Since 248 sets of 4 + 4 bit parallel data are transmitted by 248 carriers, the transmission speed of the present apparatus is 248 bytes per symbol period. Therefore, the transmission rate per second is approximately 750 kbits.

Next, an embodiment of the receiving apparatus of the present invention will be described with reference to FIGS. Each component of the receiving device is configured by a circuit that operates in the opposite direction to the transmitting device. The receiving unit 20 amplifies the signal from the transmitting unit 12 obtained by the receiving antenna constituting the receiving unit 20 with a high frequency amplifier and supplies the amplified signal to the frequency converter 21. This output signal is supplied to the intermediate frequency amplifier circuit 22 and outputs a reception signal of a predetermined level. The output signal of the intermediate frequency amplification circuit 22 is supplied to a quadrature demodulator 23 and a center carrier detection circuit 29, respectively. The center carrier detecting circuit 29 has a phase comparator (multiplier), an LPF, a VCO circuit, and a PLL circuit composed of a 1/4 frequency dividing circuit. The intermediate frequency generating circuit 31 to which the output signal is supplied is provided. Operate to extract the center carrier with less phase error.

In this embodiment, carriers for transmitting information are arranged adjacent to each other at every 378 Hz which is a symbol frequency, and constitute an OFDM signal. The information carrier adjacent to the center carrier is also separated by only 378 Hz, and the center carrier needs to be performed without being affected by the adjacent information carrier, and a circuit with high selectivity is used. In this embodiment, the center carrier is extracted by using the PLL circuit, but ± 200 which is approximately の of the adjacent carrier frequency is extracted.
A circuit is operated using a crystal oscillator (VCXO) oscillating at about Hz as a voltage controlled oscillator (VCO) 43.
The LPF used in the PLL circuit has a cutoff frequency sufficiently lower than 378 Hz. The output signal of the intermediate frequency generation circuit 31 and the signal passed through the 90 ° shift circuit 30 are supplied to the quadrature demodulator 23 having the multipliers 40 and 41, respectively, and the real and imaginary parts (real part and imaginary part) are provided. Are decoded. The real part and imaginary part output signals are supplied to the LPF 24,
A signal in a required frequency band transmitted as DM signal information is passed, an input analog signal is sampled, and an output signal is converted into an A / D converter (sampling circuit).
25 for conversion into a digital signal.

The sample synchronizing signal generating circuit 32 is generated by a PLL circuit which synchronizes the phase with the pilot signal, and the analog output signal of the quadrature demodulator 23 is supplied to this circuit. The pilot signal transmitted as a continuous signal in each symbol section including the guard interval period has a PL
L is phase-synchronized, and pilot frequency information is obtained. In the transmitting device, the pilot signal is set to a predetermined integer ratio with respect to the sample clock frequency, and performs frequency multiplication according to the frequency ratio to obtain a sample clock signal. The guard interval processing circuit 26 obtains an effective symbol period signal less affected by multipath distortion from the transmitted signal, and supplies an output signal to the FFT / QAM decoding circuit 27.

As will be described later, the symbol synchronization signal generation circuit 33 for detecting the symbol period examines a change in the phase of the transmitted reference carrier by 90 degrees, detects the symbol period, and detects the symbol period (synchronization). ) Signal to F
It is supplied to the FT / QAM decoding circuit 27. At the same time, this symbol period (synchronization) signal is output to the symbol number counting circuit 33C.
Supplied to Here, a carrier number signal that is uniquely determined according to the number of symbols is generated, and this is made to correspond to the calibration carrier, and the auxiliary carrier (B
1, B2), FFT, Q
It is supplied to the AM decoding circuit 27.

The next FFT and QAM decoding circuit 27 is supplied with the obtained clock synchronizing signal and symbol synchronizing signal, performs a complex Fourier operation, and outputs a real part and imaginary part signal (real part) for each frequency of the input signal. Part, imaginary part) level. The thus obtained real part and imaginary part signal levels for each frequency are compared with the demodulation output of the reference carrier, and the level of the quantized digital signal transmitted on the digital information transmission carrier is obtained. And the digital information is decoded. The output signal of this circuit 27 is output via a parallel / serial conversion circuit 28.

Next, the carrier extraction circuit and the sample synchronization (sample clock) signal generation circuit will be described below with reference to FIG. The purpose of this circuit is to extract a more accurate sample synchronization (sample clock) signal from a pilot signal transmitted at a constant level. First, the VCO circuit 43 constituting the carrier extraction circuit is oscillated at a frequency of 42.8 MHz, which is four times the intermediate frequency of 10.7 MHz. The output signal of the circuit 43 is supplied to multipliers 40 and 41 via quarter frequency dividing circuits 44 and 45, respectively. An output signal from one of the multipliers 41 is supplied to an LPF 42 to extract a component equal to or lower than a symbol frequency, and the output signal controls a VCO circuit 43. Multiplier 41, L
A loop formed by the PF 42, the VCO circuit 43, and the frequency divider 45 forms a PLL circuit.

The intermediate frequency-amplified signal is applied to the input terminals of the multipliers 40 and 41, and orthogonal decoding is performed by this circuit, thereby obtaining real and imaginary part output signals. Next, the sample synchronization signal generating circuit 32 will be described. A real part output signal from the quadrature demodulator 23 is supplied, and a Nyquist frequency component transmitted as a pilot signal is detected. The variable frequency dividing circuit (VCO circuit) 50 includes a VCO circuit 43
Output signal is supplied, and the frequency division ratio is 1/426 to 1/4.
It is configured to be set up to 38. The multiplier 52 in the clock extraction unit is supplied with the output signal from the quadrature demodulator 23 and the signal of the VCO circuit through the 1/2 frequency dividing circuit 51, and operates as a phase comparator.

The output signal of the multiplier 52 is passed by the LPF circuit 53 so that only the error signal relating to the frequency control passes. The delay circuit 54 and the addition circuit 55 are circuits for attenuating adjacent carrier components, and have a symbol frequency of 387H.
It has a characteristic that z has a dip. VCO circuit 5
The PLL circuit composed of 0, the multiplier 52, and the LPF 53 oscillates a VCO output signal synchronized with a continuous pilot signal included in the real part output signal of the carrier extraction unit, and outputs it as a 99 kHz sample clock output signal. You. In the above embodiment, the case where a 256-order IFFT is used to generate 257-wave carriers has been described. However, as another embodiment, an example in which a 512-order IFFT is used will be described below. In this other embodiment, the Nyquist frequency is not used as the pilot frequency, but a higher-order frequency having a simple integer ratio relationship with the sampling position signal is used.

That is, when considering an IFFT with a period M, M
/ 4 and 1/2 of the Nyquist frequency which is 3M / 4
, And a carrier output by OFDM is a signal output as the first to M / 4th and the 3M / 4th to Mth in IFFT. Thereby, a signal equivalent to the case where M = 2N in the above embodiment can be obtained. Therefore, a continuous pilot signal can be transmitted even within the guard interval, and the signal at the sampling position can be obtained by decoding and quadrupling the pilot signal.

In the block of the clock extraction unit used at this time, the frequency of the pilot signal is the same as that of the above embodiment, but the frequency of the sample clock for driving the FFT / QAM decoding circuit 27 is doubled. Accordingly, 2
A double 198 kHz sample clock signal is output.
Therefore, this block is different from the above embodiment in that the division ratio of the division ratio variable circuit 50 is 1/213 to 1/219, and the division ratio of the division circuit 51 is 1/4. The configuration is different, and the other configuration is the same as that of FIG. 4, and the description thereof is omitted.

Next, the symbol synchronization signal generating circuit 33 will be described below with reference to FIG. The frequency-division ratio variable circuit 61 of the 21st carrier detection unit constituting the symbol synchronization detection unit is supplied with the doubled sample clock, and
A frequency division of 3 to 1/27 is performed. That is, the frequency of the double clock is 198 kHz, the frequency obtained by 1/27 this is 7333 Hz, and the reference signal frequency to be synchronized is 7937 Hz which is 21 times the symbol frequency.

In the present invention, the phase of the reference signal is shifted by 90 degrees every symbol period, and the variable ratio of the frequency dividing ratio variable circuit 61 is normally set to a value of about 1/25. The frequency division ratio is also changed at the position where the phase is shifted. In the circuit shown in FIG. 7, the multiplier 62, the LPF 63, and the frequency division ratio variable circuit 61 constitute a PLL circuit, and decode the phase shift information transmitted on the 21st carrier. The reference signal (reference carrier) has a phase of 9 for each symbol period.
The phase is shifted by 0 degrees, and the phase detection by the PLL circuit can be performed most efficiently. The output of the imaginary part of the orthogonally decoded OFDM signal and the output signal from the frequency division ratio variable circuit 61 are supplied to a multiplier 62 to perform an operation as a phase comparator.

The output signal of the multiplier 62 is supplied to an LPF 63 to extract an error signal which is a low-frequency component, and is supplied to a frequency dividing ratio variable circuit 61 corresponding to a VCO. The division ratio is usually set to about 1/25, but the VCO
When the phase is advanced, the frequency division ratio is increased to delay the output phase of the frequency division ratio variable circuit. When the phase is delayed, the output signal phase is advanced with a small frequency division ratio. The reference level of the amplitude and angle modulation signal transmitted on the 21st carrier is obtained by the FFT / QAM decoding circuit 27 shown in FIG.
The decoding of the QAM signal is calculated and determined by the signal ratio to this level.

As described above, the method of using the 512 order as the IFFT and using the 256 order of the actual OFDM signal has been described. The guard interval is 6 sampling clocks, and the carrier number carrying the reference information is 2
It was set to 1. Further, as for the 21st carrier, the reference information for QAM decoding is transmitted to both the positive carrier and the negative carrier in the order determined by the sequence of four symbols.

The carrier that gives a predetermined phase difference for each symbol is one that transmits a level reference for QAM decoding and transmits transmission characteristic measurement information. The property required for the carrier is that the carrier energy is constant over a plurality of symbol periods, and the phase difference is shifted by a predetermined amount for each symbol period including the guard interval before transmission. As a carrier for this purpose, a 21st carrier having a half wavelength within the guard interval was selected, and reference information was transmitted alternately in the amplitude direction and the angle direction to give a phase difference corresponding to an odd multiple of 90 degrees. Since the detection PLL circuit outputs the maximum output for a signal whose phase shift is an odd multiple of 90 degrees, the existence period of the carrier in the guard interval and the transmission order of the reference information are used to determine the phase shift for each symbol. Is set to be an odd multiple of 90 degrees.

According to the OFDM signal transmitting / receiving apparatus of the present invention,
The following effects are obtained. The address of the positive and negative calibration carriers can be easily specified, and the transmission of the information signal that cannot be performed due to being specified for calibration is performed by another carrier, so that the transmission sequence of the information signal is not disturbed. Can transmit information. In addition, since both the positive and negative carriers are designated for calibration, characteristics relating to interference between the two carriers can be examined, and calibration of transmission characteristics required for decoding of multi-level QAM can be performed. Still further, since the calibration carrier can be skipped for continuous address information, general calibration of the receiving apparatus can be performed in a relatively short time after the start of transmission.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of an OFDM signal transmitting apparatus according to the present invention.

FIG. 2 is a block diagram of an embodiment of an OFDM signal receiving apparatus according to the present invention.

FIG. 3 is a diagram showing a relationship between a symbol period and a guard interval in the embodiment of the transmitting and receiving apparatus of the present invention.

FIG. 4 is a block diagram of a carrier extracting unit and a sample clock extracting unit of the embodiment of the OFDM signal receiving apparatus according to the present invention.

FIG. 5 is a block diagram of a conventional OFDM signal transmission device.

FIG. 6 is a block diagram of a conventional OFDM signal receiving device.

FIG. 7 is a block diagram of a symbol synchronization signal generator of an embodiment of the OFDM signal receiver according to the present invention.

[Explanation of symbols]

2 serial-parallel conversion circuit 3 IFFT, pilot signal generation circuit (IFFT circuit) 3C, 33C symbol number counting circuit 3S symbol period signal setting circuit 4 guard interval setting circuit 4A RAM (random access memory) 5 D / A demodulator 6, 24, 42, 53, 63 LPF 7 Quadrature modulator 8, 30 90 ° shift circuit 9, 31 Intermediate frequency generation circuit 10 Clock signal generation circuit 11, 21 Frequency converter 12 Transmitter 20 Receiver 23 Quadrature demodulator 25 A / D converter (sampling circuit) 26 guard interval processing circuit 27 FFT, QAM decoding circuit 28 parallel-serial conversion circuit 29 center carrier detection circuit 32 sample synchronization signal generation circuit 33 symbol synchronization signal generation circuit 40, 41, 52, 62 multiplier ( Phase comparator) 43, 50, 61 Variable frequency division ratio Circuits (VCO circuit) 44, 45 1/4 frequency divider 51 1/2 frequency divider A1, A2 Carrier for information transmission B1, B2 Auxiliary carrier for information transmission

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H04J 11/00

Claims (4)

(57) [Claims] 1. An orthogonal frequency division multiplexing signal transmitting apparatus for arranging carriers orthogonally and transmitting independent digital information on each carrier, comprising: an IFFT circuit supplied with a digital information signal to generate a multilevel QAM modulated signal; A D / A converter to which the output of the IFFT circuit is supplied, a quadrature modulator to which the output of the D / A converter is supplied, and a switching signal for counting the number of symbols and switching a carrier number signal corresponding to the number of symbols. As the IF
And a symbol number counting circuit for supplying to the FT circuit. The symbol number counting circuit specifies whether an applied signal is an information signal or a reference signal for QAM decoding.
When a predetermined carrier number is designated by the symbol number counting circuit, the FFT circuit transmits the reference signal on the carrier of that number, and transmits the information signal that should have been transmitted on the designated carrier for auxiliary information transmission. An orthogonal frequency division multiplex signal transmitting apparatus, wherein an orthogonal frequency division multiplex signal is transmitted from the orthogonal modulator so as to be transmitted by a carrier. 2. The reference signal transmitted on the symmetrical positive and negative carriers is such that a reference signal of a real part is generated by an IFFT circuit for one of the positive and negative carriers, and a reference signal of the other real part is not generated. 2. The orthogonal frequency division multiplex signal transmitting apparatus according to claim 1, wherein: 3. The carrier according to claim 1, wherein the carrier for transmitting the information of the symbol number counting circuit is arranged near a center carrier transmitted as a non-modulated carrier at a predetermined level. Orthogonal frequency division multiplex signal transmission device. 4. An orthogonal frequency division multiplex signal receiving apparatus for receiving a signal from an orthogonal frequency division multiplex signal transmitting apparatus according to claim 1, wherein: a quadrature demodulator for demodulating the received frequency multiplex signal;
An A / D converter supplied with the output of the quadrature demodulator, an FFT / QAM decoding circuit supplied with the output of the A / D converter, and a carrier number signal corresponding to the number of symbols are generated. Corresponding to the calibration carrier,
The switching signal for switching the information signal transmitted by the auxiliary carrier into a predetermined information signal sequence and inserting the switching signal is the FFT, QA
An orthogonal frequency division multiplexed signal receiving apparatus comprising: a symbol number counting circuit for supplying to an M decoding circuit.