JPH07336322A - Orthogonal frequency division multiplex signal transmitter-receiver - Google Patents

Abstract

PURPOSE:To inversely quantize QAM signals with less carrier and to decode OFDM signals by constituting a transmitter by a symbol number counting circuit and an IFFT circuit and constituting a receiver by an FF circuit and the symbol number counting circuit. CONSTITUTION:The IFFT and pilot signal generation circuit 3 of an orthogonal frequency division multiplex OFDM signal transmitter is operated by clock signals from a clock signal generation circuit 10. 256 orthogonal amplitude modulation is performed to the carrier of 248 waves and respective output signals are outputted as real R and imaginary I components. Also, the discrete frequency point information of the circuit 3 is transmitted as Nyquist frequency information which is the value of 1/2 of a cycle N. Thus, in the receiver, the Nyquist signal information is decoded and multipled and sampling position signals for operating an FFT circuit are prepared. The Nyquist frequency information is obtained by impressing the signals of a fixed level to the imaginary number input terminal I and the real number input terminal R of N/2 of the circuit 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to OFDM (Orthogonal Frequency Division Multiplexing Orthogonal Frequency).
Division Multiplexing) signal transmitting / receiving apparatus, particularly suitable for digital mobile communication.
The present invention relates to an FDM signal transmitting / receiving device.

[0002]

2. Description of the Related Art A conventional OFDM signal transmitting apparatus will be described with reference to FIG. First, the digital information data signal is supplied to the serial-parallel conversion circuit 70 via the input terminal,
An error correction code is added as needed. The output signal of the circuit 70 is supplied to the IFFT circuit 71, and the output signal thereof is supplied to the D / A converter 73 via the guard interval circuit 72 for reducing multipath distortion. Here, it is converted into an analog signal and the next LPF 7
4 allows only the components in the required frequency band to pass. The output signal of the real, imaginary part of analog value is supplied to the quadrature modulator 75, and the OFDM signal is output.

This OFDM signal is frequency-converted into a frequency band to be transmitted by a frequency converter 76 and supplied to the next transmitting section 77, and is transmitted via a linear amplifier and a transmitting antenna constituting the same. To be done. The output signal of the intermediate frequency generation circuit 78 and the signal passed through the 90 ° shift circuit 78A are supplied to the quadrature modulator 75, respectively. The clock signal output from the circuit 79 is supplied as an operation signal to the serial / parallel conversion circuit 70, the IFFT circuit 71, the guard interval circuit 72, and the D / A converter 73, respectively.

Next, the OFDM signal receiving apparatus will be described with reference to FIG. The receiving section 80 amplifies the signal from the transmitting section 77 obtained by the receiving antenna constituting the same by a high frequency amplifier, supplies the amplified signal to the intermediate frequency amplifying circuit 82 via the frequency converter 81, and further, orthogonally. Demodulator 83
Is supplied to. The output signal of the circuit 82 is supplied to the intermediate frequency generation circuit 89 via the center carrier detection circuit 90. The output signal of the circuit 89 and the signal passed through the 90 ° shift circuit 89A are supplied to the quadrature demodulator 83, respectively, and the output signals of the real and imaginary reparts are decoded. The output signal of the quadrature demodulator 83 is supplied to the A / D converter 85 via the LPF 84 and converted into a digital signal, and the output signal of 83 is also supplied to the synchronization signal generation circuit 91.

These signals are supplied to the FFT and QAM decoding circuit 87 via the next guard interval circuit 86. This circuit 87 is supplied with a synchronizing signal generating circuit 91.
Based on the synchronization signal of, the complex Fourier operation is performed, the level of the real part and imaginary part signal (real part, imaginary part) of each frequency of the input signal is obtained, and the quantization transmitted by the carrier for digital information transmission. The level of the digital signal thus obtained is obtained, and the digital information is decoded. The output signal of the FFT / QAM decoding circuit 87 is output via the parallel-serial conversion circuit 88. Here, if the intermediate frequency of the transmitting device and the intermediate frequency of the receiving device are completely the same, only the modulation component is obtained, and there is no problem, but the intermediate frequency generating circuit, the local oscillator of the frequency converter (not shown). If the frequency stability is not high, or if there is a phase error between both output signals, it will affect the subsequent demodulation operation and increase the error occurrence probability of the QAM decoded data.

[0006]

In an OFDM signal transmitter / receiver, a large number of carriers can be relatively easily modulated and demodulated by using an IFFT circuit and an FFT circuit. However, if there is a system that causes multipath distortion in a transmission line, transmission is possible. Accurate QAM because the frequency and amplitude characteristics and phase characteristics in the band are not constant
For demodulation, calibration for each carrier wave is required. The present invention has been made by paying attention to the above points, and the number of carriers required for calibration is reduced as much as possible to achieve an appropriate QAM.
It is an object of the present invention to provide an OFDM signal transmitting / receiving apparatus which decodes an OFDM signal by dequantizing the signal.

[0007]

In the OFDM signal transmitting / receiving apparatus of the present invention, the transmitting apparatus includes a symbol number counting circuit for designating whether the applied signal is an information signal or a reference signal for QAM decoding. When a predetermined carrier number is designated by the symbol counting circuit, the reference signal is transmitted by the carrier of that number, and the information signal that should have been transmitted by the designated carrier is transmitted by the auxiliary information transmission carrier. And an IFFT for generating a multi-level QAM modulated signal, and a pilot signal generating circuit, and a receiving device is an FF for calculating the received frequency-multiplexed signal.
A switching signal for generating a carrier number signal corresponding to the number of symbols and a T / QAM decoding circuit, and correlating the carrier number signal with a calibration carrier to switch the information signal transmitted by the auxiliary carrier into a predetermined information signal sequence and insert the signal signal. And a symbol number counting circuit for supplying the circuit to the above circuit, thereby achieving the above-mentioned object.

[0008]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of an OFDM signal transmitting / receiving apparatus of the present invention will be described below with reference to the attached FIGS. 1 to 4 and 7. FIG. 1 shows an embodiment of an OFDM signal transmitting apparatus of the present invention, in which digital data transmitted here is
These include compressed audio and video signals. OFDM
Is a technique in which a large number of carriers are arranged orthogonally and independent digital information is transmitted by the respective carriers. Since the carriers are orthogonal, the spectrum of adjacent carriers becomes zero at the frequency position of the carrier.

[0009] To make this orthogonal carrier, IFFT
Circuit technology is used. If the inverse DFT (discrete Fourier transform) with N complex numbers is executed during the time interval T, O
An FDM signal can be generated, and each point of the inverse DFT corresponds to the modulation signal output. The basic specifications of the device of the present invention shown in FIGS. 1 and 2 are as follows. (a) Central carrier frequency ... 100 MHz (b) Number of carriers for transmission ... 248 waves (c) Modulation method ... 256QAM OFDM (d) Number of carriers used ... 257 waves (e) Transmission bandwidth ... 100 kHz, bandwidth ... 99 k
Hz (f) Transfer rate… 750kbps (g) Guard interval… 60.6μsec

Next, the arrangement of carriers will be described. The carriers are arranged with an intermediate frequency of 10.7 MHz as the center (this is called the 0th carrier), and carriers of 128 waves are provided on the left and right respectively (the carrier on the right side of the center frequency is the first carrier in order).
The carrier, the second carrier, ..., The 128th carrier are called, and the ones on the left side are sequentially called the −1th carrier, the −2nd carrier ,. ) Is placed and carrier allocation is set as follows.

No. 0 carrier An unmodulated carrier serving as a reference of amplitude and phase is transmitted for the entire carrier. The mode information of the first carrier system is transmitted. Second carrier Transmits information that should have been transmitted on the positive calibration carrier. 21st carrier A reference angle level, a reference amplitude level, and no carrier are alternately transmitted with 4 symbols as one sequence. 128th carrier This is a carrier that can be set to the highest positive frequency. -1st carrier Transmits a carrier number for transmitting calibration information. Second carrier Transmits information that should have been transmitted by the negative calibration carrier. -21st carrier reference angle level, reference amplitude level,
No carrier is transmitted alternately with four symbols as one sequence. -128th carrier This is a carrier that is set to the highest negative frequency. Other carriers Transmit information signals except those designated as calibration information carriers.

Next, the individual definition of carriers is as follows. 0th carrier Unmodulated carrier without angle modulation component Defines the 1st carrier transmission mode. -1st carrier Specifies the specified positive and negative carrier numbers of the calibration carrier. If the order is set twice every eight lines in advance, the carrier number is uniquely determined from the symbol number as described below. However, X
Indicates a state in which the calibration carrier is not designated. Symbol number 0 1 2 3 4 5 6 7 8 9 ... Carrier number X X 8 8 16 16 16 24 24 32 32 32 ...

The symbol numbers are, in order from the predetermined calibration frame transmitted by the mode information bits and the symbols transmitted after the end signal, the first symbol, the second symbol, ... 256 symbols in order. Call. The symbol number is 00 (X'00) at the calibration frame start point, and counting is started from that point.
It ends at 255 (X'FF). When the carrier numbers are 0 and 21, the replacement for carrier calibration is not performed.

The relationship between the symbol number and the calibration carrier is as follows. 8th bit (MSB) 1st place carrier address (0
= 0,1 = + 1) 7th bit 2nd place carrier address (0
= 0, 1 = +2) 6th bit 4th place carrier address (0
= 0,1 = +4) 5th bit 64th place carrier address (0
= 0, 1 = + 64) 4th bit 32nd place carrier address (0
= 0, 1 = + 32) 3rd bit 16th place carrier address (0
= 0, 1 = + 16) 2nd bit 8th place carrier address (0
= 0, 1 = +8) 1st bit (LSB) 0: first half 1: second half

± 2nd carrier When the information transmission carrier is set in the calibration state, the information is transmitted by this carrier (auxiliary signal transmission carrier). The details of the ± 21st carrier calibration information are transmitted. The signal switching state is detected, and the symbol synchronization signal is detected. The angle information in the ± 128th carrier encoding is set to 0, and the sample clock information is transmitted.

Transmission of information signal 24 in one symbol period
Transmits 8 bytes of digital data. The digital data is the 3rd to 20th carriers, the 22nd to 127th carriers, the -3rd to -20th carriers, and the -22nd to -127th carriers, and QA according to the allocation of information bits.
It is M-modulated and transmitted.

Next, the calibration of the carrier will be described below. For the calibration of each carrier, when the calibration state of the carrier is designated by the carrier number shown by 8 bits, the data to be transmitted by the positive and negative carriers (A1, A2) are:
It is assumed that the positive and negative second carriers (B1, B2) are used for transmission, and the next calibration signal is transmitted for each carrier. That is, in the case of an odd number of symbols, the positive carrier
The amplitude level and the negative carrier transmit the eighth angle level, and the positive carrier and the negative carrier transmit the eighth angle level and the negative amplitude carrier, respectively. However, when the 0th carrier (center carrier) and the 21st carrier are designated, the carrier is not replaced. Details of the conditions of the amplitude level and the angle level will be described on pages 11 to 12.

Next, the calibration frame synchronization will be described below. 2 calibration frames
It is composed of 56 symbols, and the calibration frame section can be known from the symbol number of the -1st carrier. The calibration frame end code has an error correction function so that it can be identified even if an error is mixed during decoding. The calibration corrects the crosstalk component of the amplitude / angle signal and the reference amplitude / angle level due to the orthogonal angle error in the carrier.

The correction level of these characteristics with respect to the carrier number is recognized as a curve, and the correction amount according to the characteristics is calculated by calculation even during the period in which the calibration signal is not transmitted. This makes it possible to smoothly perform the dequantization of 256QAM in the long calibration frame period. 256QAM decoding is performed using a predetermined correction curve, and when the data error amount is smaller than a predetermined value, the correction curve is determined to be appropriate and the correction amount is fixed.

As shown in FIG. 1, for example, a digital information signal, which is an audio or video signal in which an information signal is compressed by an encoding method such as MPEG, is supplied to a serial / parallel conversion circuit 2 via an input terminal 1. An error correction code is added if necessary. In this circuit 2, the input signal is 2
The signal is arranged and output as a 56QAM modulation signal. This 256QAM modulation is a method for defining 16 levels in the amplitude direction and 16 levels in the angle direction for a carrier to transmit information, and specifying and transmitting 256 values of 16 × 16. In this embodiment, of the 257 wave carriers, 2
Information is transmitted using 48 waves, and the remaining 9 waves are used for calibration and for transmitting other auxiliary signals.

The serial-parallel conversion circuit 2 is configured to output 248 bytes of digital data in one symbol period, that is, 248 sets of parallel data of 4 bits each in one symbol period. The output signal of the serial-parallel conversion circuit 2 is
The signal is supplied to the IFFT / pilot signal generation circuit 3 and the symbol period setting circuit 3S, respectively.

The symbol period setting circuit 3S generates the symbol period information, the QAM decoding reference amplitude level, and the reference angle level by switching the inputs of the IFFT and the pilot signal generation circuit 3 with a common reference carrier (reference carrier). And a setting signal for supplying the signal to the circuit 3 and the symbol number counting circuit 3C. The symbol number counting circuit 3C counts the number of symbols and supplies a carrier number signal corresponding to the number of symbols as a switching signal to the IFFT / pilot signal generating circuit 3.

The reference carrier is switched between the reference amplitude level and the reference angle level for each symbol, and when the reference carrier exists in the guard interval by an integral multiple of a half wavelength, that is, when the IFFT of N = 256 is used, A case will be described in which reference signal information is transmitted using the 21st carrier as a reference carrier when is set to 6 clocks. The carrier phase difference caused by the guard interval depends on how many sample clocks the guard interval is given, IFFT.
It depends on the order of the frequency used in.

In the IFFT having a cycle of N, when the guard interval period is p clock and the order of the carrier frequency used as the reference wave is q, the period during which the carrier frequency exists within the guard interval is as follows. 2π × p × q / N That is, when N = 256 and p = 6, the signal of q = 21 has carriers of approximately half wavelength in the guard interval period. As another example, N = 256 IFs
When FT is used and the Garteau interval is set to p = 4 clocks, this corresponds to the case where reference signal information is transmitted using the 32nd carrier (q = 32).

A case where the 21st carrier is used as a reference carrier (reference carrier) will be described. When the transmitted symbol signal is numbered, it is transmitted as a modulated signal for the center carrier according to the sequence given by the lower 2 bits of the number. The method of giving a modulation signal to each of the positive and negative 21st-order carriers (sidebands with respect to the center carrier) is as follows. Symbol sequence Positive 21st carrier Negative 21st carrier 0 8 amplitude, 0 angle level 0 amplitude, 0 angle level 10 amplitude, -8 angle level 0 amplitude, 0 angle level 2 0 amplitude, 0 angle level -8 amplitude, 0 angle level 3 0 amplitude, 0 angle level 0 amplitude, 8 angle level

However, 0 amplitude level = no amplitude modulation 8 amplitude level = positive maximum amplitude modulation degree -8 amplitude level = negative maximum amplitude modulation degree 0 angle level = no angle modulation 8 angles Level = gives a maximum positive angle modulation degree -8 angle level = gives a maximum negative angle modulation degree

The way of giving the level to the reference carrier for each symbol is as follows.
Alternatively, either modulation in the angular direction is applied. Therefore, these signals are sequentially decoded, and the receiving apparatus can know the level of the reference signal required for the dequantization of the QAM signal, and what crosstalk the quadrature-modulated signal has on the other side of the carrier. It is possible to know what kind of crosstalk is given to a carrier having positive or negative symmetry. This is summarized below. Reference amplitude level Reference angle level Amplitude-angle crosstalk within the same carrier Crosstalk to symmetrical carrier (due to amplitude-angle level difference, etc.)

Next, the operation of the 21st carrier as a sideband with respect to the central carrier will be described. 21st
When giving a positive amplitude level to a carrier, it is equivalent to the positive sidebands of the upper and lower sidebuds that occur when the center carrier is amplitude modulated at 21 times the symbol frequency. Therefore, this sideband orbits the central carrier 21 times during the effective symbol period. Further, it makes a half rotation during the guard interval.

The following sequence is equivalent to the positive sideband when the angle modulation is performed by the negative signal, and the next sequence is the negative sideband when the amplitude modulation is performed by the negative signal, The last sequence corresponds to the negative sideband when angle-modulating with a positive signal. When considering the rotation of the positive / negative 21st carrier, the original position returns to the same position at the beginning and end of the effective symbol period. Therefore, when considering the rotation in the guard interval, the phase of the positive / negative 21st carrier is the phase for each symbol period. It can be seen that is changing by 90 degrees. Therefore,
The receiving device can detect the switching state of the signal and detect the position of the symbol synchronization signal.

The IFFT and pilot signal generation circuit 3
Operates according to the clock signal output from the clock signal generation circuit 10, and operates on a 256-wave carrier for 256 carriers.
QAM modulation is performed and each output signal is output as a real and imaginary component. Further, the discrete frequency point information of the circuit 3 is transmitted as Nyquist frequency information which is a value of 1/2 with respect to the cycle N. Since this frequency information is 1/2 of the discrete frequency point information, the Nyquist signal information is received by the receiving device. Can be decoded and multiplied to generate a sampling position signal for operating the FFT circuit. This Nyquist frequency information is N / 2 of the IFFT / pilot signal generation circuit 3.
It is obtained by applying a signal of a constant level to the real part input terminal R (imaginary part input terminal I).

The output signals of these circuits 3 are output to the next RAM.
It is supplied to the guard interval setting circuit 4 having (random access memory) 4A. This circuit 4 sets a guard interval gi, which is a predetermined section for reducing multipath distortion in the transmission path, as shown in FIG. The guard interval setting circuit 4 operates according to the clock signal output from the clock signal generation circuit 10,
The last part in the window section obtained from the IFFT / pilot signal generation circuit 3 is arranged immediately before the window section signal. To achieve this, the guard interval setting circuit 4 sets the last period (equal to gi) when reading the signal from the IFFT / pilot signal generation circuit 3 fetched in the RAM (4A) of the guard interval setting circuit 4. .), The effective symbol period ts is read and the signal of the symbol period ta is transmitted. The Nyquist frequency information is transmitted even within the guard interval, but in order to maintain continuity with the preceding and following IFFT window section signals, the transmitted pilot signal has an integral wavelength within the guard interval.

Although the case where the Nyquist frequency is used as the pilot signal has been described, the Nyquist frequency does not have to be the Nyquist frequency as long as the sampling position signal and the sampling position signal have a simple integer ratio. Higher ones may be used. When considering the IFFT of period M, M / 4,
Further, the pilot signal is arranged at a position of 1/2 of the Nyquist frequency, which is 3M / 4, and the carriers transmitted by OFDM are from the first to the M / 4th and from the 3M / 4th to the fourth in the IFFT. The signals output up to the Mth are used.

As a result, a signal equivalent to that when M = 2N in the above example can be obtained. Therefore, a continuous pilot signal can be transmitted even within the guard interval, and a sampling position signal can be obtained by decoding this pilot signal and multiplying it by four. FFT
If the window section signal information of 1 can be separately decoded, the FFT operation of the OFDM signal can be performed by combining with the sampling position signal obtained in the present embodiment, and the decoding of the OFDM signal can be performed.

Next, the symbol period of the guard interval setting circuit 4 will be described with reference to FIG. First, when the used bandwidth is 99 kHz and the cycle is N = 256, the effective symbol frequency fs and the effective symbol period ts are as follows, respectively. fs = 99,000 / 256 = 387 Hz ts = 1 / fs = 2586 μsec Further, when the guard interval period gi, which is a section for multipath distortion removal, is determined for 6 carrier wavelengths, gi is set as follows. gi = (1 / 99,000) × 6 = 60.6 μsec The symbol period ta and the symbol frequency fa at this time are as follows. ta = ts + gi = 2586 + 60.6 = 2646.6
μsec fa = 1 / ta = 378 Hz

The output signals of these guard interval setting circuits 4 are supplied to a D / A converter 5, where they are converted into analog signals, and only the necessary frequency band components are passed by the next LPF 6. Real analog value,
The imaginary output signal is supplied to the next quadrature modulator 7,
Further, the modulator 7 is supplied with the output signal of the 10.7 MHz intermediate frequency generation circuit 9 and the signal through the 90 ° shift circuit 8, respectively, and outputs an OFDM signal. This OF
The DM signal is frequency-converted into a frequency band to be transmitted by the frequency converter 11 and supplied to the next transmission unit 12, and is transmitted via the linear amplifier and the transmission antenna which configure the DM unit. Since 248 sets of 4 + 4 bits of parallel data are transmitted by the carrier of 248 waves, the transmission rate of this device is 248 bytes per symbol period. Therefore, the transmission rate per second is approximately 750 kbits.

Next, an embodiment of the receiving apparatus of the present invention will be described with reference to FIGS. Each component of the receiving device is composed of a circuit that operates in reverse to the transmitting device. The receiving unit 20 amplifies the signal from the transmitting unit 12 obtained by the receiving antenna constituting the receiving unit 20 by a high frequency amplifier and supplies the amplified signal to the frequency converter 21. This output signal is supplied to the intermediate frequency amplifier circuit 22 and outputs a reception signal of a predetermined level. The output signal of the circuit 22 is supplied to the quadrature demodulator 23 and the center carrier detection circuit 29, respectively. Circuit 29
Is a phase comparator (multiplier), LPF, VCO circuit, 1 /
The intermediate frequency oscillating circuit 31, which has a PLL circuit composed of a frequency-dividing circuit 4 and is supplied with this output signal, operates so as to extract the center carrier with a small phase error.

In this embodiment, carriers for transmitting information are arranged adjacent to each other at a symbol frequency of 378 Hz to form an OFDM signal. The information carrier adjacent to the center carrier is also 378 Hz apart, and it is necessary to perform the center carrier without being influenced by the adjacent information carrier, and a circuit with high selectivity is used. In this embodiment, the central carrier is extracted by using the PLL circuit, which is approximately 1/2 of the frequency of the adjacent carrier ± 20.
A crystal oscillator (VCXO) that oscillates at about 0 Hz is used as a voltage controlled oscillator (VCO) 43 to operate the circuit. The LPF used in the PLL circuit also has a cutoff frequency sufficiently low with respect to 378 Hz.
The output signal of the intermediate frequency generation circuit 31 and the signal passed through the 90 ° shift circuit 30 are supplied to the quadrature demodulator 23 having the multipliers 40 and 41, respectively, and the real and imaginary reparts (real part, imaginary part) are supplied. Is decoded. The real part and imaginary part output signals are supplied to the LPF 24,
A signal in a required frequency band transmitted as OFDM signal information is passed through, an input analog signal is sampled, an output signal is supplied to an A / D converter (sampling circuit) 25, and converted into a digital signal. .

The sample synchronizing signal generating circuit 32 is generated by a PLL circuit which is in phase with the pilot signal, and the analog output signal of the quadrature demodulator 23 is supplied to this circuit. PL is added to the pilot signal transmitted as a continuous signal in each symbol section including the guard interval period.
L is phase-locked, and pilot frequency information is obtained. In the transmitter, the pilot signal is set to a predetermined integer ratio with respect to the sample clock frequency, and frequency multiplication is performed according to the frequency ratio to obtain the sample clock signal. The guard interval processing circuit 26 obtains an effective symbol period signal which is less affected by multipath distortion than the transmitted signal, and the FFT / QAM decoding circuit 27.
Supply an output signal to.

The symbol synchronizing signal generating circuit 33 for detecting the symbol period detects the symbol period by detecting a change in the phase of the transmitted reference carrier by 90 degrees, and detects the symbol period (synchronization period) as described later. ) Signal F
It is supplied to the FT and QAM decoding circuit 27. At the same time, the symbol period (synchronization) signal is supplied to the symbol number counting circuit 33C.
Is supplied to. Here, a carrier number signal that is uniquely determined according to the number of symbols is generated, and this is made to correspond to the calibration carrier, and the auxiliary carrier (B
1, B2), the FFT, Q is used as a switching signal for switching and inserting the information signal into a predetermined information signal sequence.
It is supplied to the AM decoding circuit 27.

The next FFT and QAM decoding circuit 27 is supplied with the obtained clock synchronization signal and symbol synchronization signal, performs a complex Fourier operation, and outputs a real part and an imaginary part signal (real part) for each frequency of the input signal. Find the level of part, imaginary part). The real and imaginary part signal levels for each frequency obtained in this way are compared with the demodulated output of the reference carrier, and the level of the quantized digital signal transmitted by the carrier for digital information transmission is obtained. And the digital information is decoded. The output signal of the circuit 27 is output via the parallel-serial conversion circuit 28.

Next, the carrier extraction circuit and the sample synchronization (sample clock) signal generation circuit will be described with reference to FIG. The purpose of this circuit is to extract a more accurate sample synchronization (sample clock) signal from the pilot signal transmitted at a constant level. First, the VCO circuit 43 forming the carrier extraction circuit is oscillated at a frequency of 42.8 MHz which is four times the intermediate frequency of 10.7 MHz. The output signal of the circuit 43 is supplied to the multipliers 40 and 41 via the 1/4 frequency dividing circuits 44 and 45, respectively. An output signal from one of the multipliers 41 is supplied to the LPF 42, a component having a frequency equal to or lower than the symbol frequency is extracted, and the output signal controls the VCO circuit 43. Multiplier 41, L
A loop formed by the PF 42, the VCO circuit 43, and the frequency dividing circuit 45 constitutes a PLL circuit.

The intermediate frequency amplified signals are applied to the input terminals of the multipliers 40 and 41, and orthogonal decoding is performed by this circuit to obtain the output signals of the real number part and the imaginary number part. The sample sync signal generation circuit 32 will be described below. The real part output signal from the quadrature demodulator 23 is supplied and the Nyquist frequency component transmitted as a pilot signal is detected. The frequency division ratio variable circuit (VCO circuit) 50 includes a VCO circuit 43.
Output signal is supplied, and the division ratio is from 1/426 to 1/4
It is configured to be set up to 38. The multiplier 52 in the clock extraction unit is supplied with the output signal from the quadrature demodulator 23 and the signal from the VCO circuit via the 1/2 frequency divider circuit 51, and operates as a phase comparator.

As the output signal of the multiplier 52, only the error signal related to frequency control is passed by the LPF circuit 53. The delay circuit 54 and the adder circuit 55 are circuits for attenuating adjacent carrier components and have a symbol frequency of 387H.
It has a characteristic that z has a dip. VCO circuit 5
The PLL circuit composed of 0, the multiplier 52, and the LPF 53 oscillates the VCO output signal synchronized with the continuous pilot signal included in the real part output signal of the carrier extractor, and outputs it as the sample clock output signal of 99 kHz. It In the above embodiment, the case of using the 256th IFFT to generate the carrier of 257 waves was described, but as another embodiment, an example of using the 512th IFFT will be described below. In the other embodiment, the Nyquist frequency is not used as the pilot frequency, but a high-order frequency having a simple integer ratio relationship with the sampling position signal is used.

That is, when considering an IFFT of period M, M
/ 4 and 1/2 of the Nyquist frequency, which is 3M / 4
The pilot signals at the positions are arranged and the carriers transmitted in OFDM use the signals output from the first to M / 4th and from the 3M / 4th to Mth in IFFT. This makes it possible to obtain a signal equivalent to that when M = 2N in the above embodiment. Therefore, it is possible to transmit a continuous pilot signal even within the guard interval, and it is possible to obtain a signal at the sampling position by decoding the pilot signal and multiplying it by four.

In the block of the clock extraction unit used at this time, the frequency of the pilot signal is the same as that in the above-mentioned embodiment, but the sample clock frequency for driving the FFT and QAM decoding circuit 27 is doubled. Accordingly 2
And outputs a doubled 198 kHz sample clock signal.
Therefore, in this block, the frequency division ratio of the frequency division ratio variable circuit 50 is 1/213 to 1/219, and the frequency division ratio of the frequency division circuit 51 is 1/4 as compared with the above embodiment. The other configuration is the same as that of FIG. 4, and the description thereof is omitted.

Next, the symbol synchronizing signal generating circuit 33 will be described below with reference to FIG. The frequency dividing ratio variable circuit 61 of the 21st carrier detecting section constituting the symbol synchronization detecting section is supplied with the sample clock multiplied by 2,
Divide by 3 to 1/27. That is, the frequency of the doubled clock is 198 kHz, the frequency obtained by 1/27 is 7333 Hz, and the reference signal frequency to be synchronized is 7937 Hz, which is 21 times the symbol frequency.

In the present invention, the phase of the reference signal is shifted by 90 degrees for each symbol period, and the variable ratio of the frequency division ratio variable circuit 61 is normally set to a value of about 1/25. The division ratio is also variable at the position where the phase is shifted. In the circuit shown in FIG. 7, the multiplier 62, the LPF 63, and the frequency division ratio variable circuit 61 form a PLL circuit, and decode the phase shift information transmitted on the 21st carrier. The reference signal (reference carrier) has a phase of 9 for each symbol period.
Since it is shifted by 0 degree, the phase detection by the PLL circuit can be performed most efficiently. The imaginary part output of the orthogonally decoded OFDM signal and the output signal from the frequency division ratio variable circuit 61 are supplied to the multiplier 62 and operate as a phase comparator.

The output signal of the multiplier 62 is supplied to the LPF 63 to extract an error signal which is a low frequency component, and is supplied to the frequency division ratio variable circuit 61 corresponding to the VCO. The frequency division ratio is usually set to about 1/25, but the VCO
When the phase is advanced, the frequency division ratio is increased to delay the output phase of the frequency division ratio variable circuit, and when the phase is delayed, the frequency division ratio is reduced to advance the phase of the output signal. The amplitude and the reference level of the angle modulation signal transmitted on the 21st carrier are obtained by the FFT and QAM decoding circuit 27 shown in FIG.
The decoding of the QAM signal is calculated and determined by the signal ratio for this level.

The method of using the 512th order as the IFFT and using the 256th order of them as the actual OFDM signal has been described above. The guard interval is 6 sampling clocks, and the carrier number carrying the reference information is 2
It was set to 1. Further, as for the 21st carrier, the reference information for QAM decoding is transmitted to both the positive carrier and the negative carrier in the order defined by the sequence of 4 symbols.

As the carrier that gives a predetermined phase difference for each symbol, a carrier for transmitting QAM decoding level reference and transmission characteristic measurement information was used. The property required for this carrier is that the carrier energy is constant over a plurality of symbol periods, and the phase difference is shifted by a predetermined amount for each symbol period including the guard interval before transmission. As the carrier for that purpose, the 21st carrier having a half wavelength within the guard interval was selected, and the reference information was transmitted alternately in the amplitude direction and the angle direction to give a phase difference corresponding to an odd multiple of 90 degrees. P for detection
Since the LL circuit outputs the maximum output for a signal whose phase displacement is an odd multiple of 90 degrees, the period during which carriers exist within the guard interval and the transmission order of reference information are such that the phase displacement for each symbol is 90. Set to be an odd multiple of degrees.

According to the OFDM signal transmitting / receiving apparatus of the present invention,
It has the following effects. The address of the positive and negative calibration carriers can be easily specified, and the transmission of the information signal that cannot be done because it was specified for calibration is performed by another carrier,
Information can be transmitted without disturbing the transmission sequence of the information signal. Further, since both positive and negative carriers are designated for calibration, it is possible to check the characteristics relating to the interference between both carriers and to calibrate the transmission characteristics required for decoding multi-level QAM. Furthermore, since the calibration carrier can be specified for continuous address information, it is possible to roughly calibrate the receiving device in a relatively short time after starting transmission.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of an OFDM signal transmission apparatus of the present invention.

FIG. 2 is a block diagram of an embodiment of an OFDM signal receiving apparatus of the present invention.

FIG. 3 is a diagram showing a relationship between a symbol period and a guard interval according to the embodiment of the transmission / reception device of the present invention.

FIG. 4 is a block diagram of a carrier extraction unit and a sample clock extraction unit of the embodiment of the OFDM signal receiving apparatus of the present invention.

FIG. 5 is a block diagram of a conventional OFDM signal transmitter.

FIG. 6 is a block diagram of a conventional OFDM signal receiving apparatus.

FIG. 7 is a block diagram of a symbol synchronization signal generation device of an embodiment of an OFDM signal reception device of the present invention.

[Explanation of symbols]

 2 serial-parallel conversion circuit 3 IFFT, pilot signal generation circuit 3C, 33C symbol number counting circuit 3S symbol period signal setting circuit 4 guard interval setting circuit 4A RAM (random access memory) 5 D / A converter 6, 24, 42, 53,63 LPF 7 Quadrature modulator 8,30 90 ° shift circuit 9,31 Intermediate frequency generation circuit 10 Clock signal generation circuit 11,21 Frequency converter 12 Transmitter 20 Receiver 23 Quadrature demodulator 25 A / D converter ( Sampling circuit) 26 Guard interval processing circuit 27 FFT, QAM decoding circuit 28 Parallel-serial conversion circuit 29 Central carrier detection circuit 32 Sample synchronization signal generation circuit 33 Symbol synchronization signal generation circuit 40, 41, 52, 62 Multiplier (phase comparator) 43, 50, 61 Frequency division ratio variable circuit (VCO circuit 44 and 45 1/4 frequency divider 51 ½ divider circuit A1, A2 information transmission carrier B1, B2 information transmission auxiliary carrier

Claims (4)

[Claims] 1. Whether the applied signal is an information signal or QA
A symbol number counting circuit for designating whether or not the reference signal is for M decoding, and when a predetermined carrier number is designated by the symbol number counting circuit, the reference signal is transmitted by the carrier of that number and the designated Orthogonal frequency division multiplexing characterized by comprising an IFFT for generating a multilevel QAM modulated signal and a pilot signal generation circuit for transmitting an information signal which should have been transmitted by a carrier by a carrier for auxiliary information transmission. Signal transmitter. 2. The reference signal transmitted by the symmetrical positive and negative carriers is such that the reference signal of the real part is generated by the IFFT circuit on one of the positive and negative sides and the reference signal of the other real part is not generated. The orthogonal frequency division multiplex signal transmission device according to claim 1, wherein the orthogonal frequency division multiplex signal transmission device is configured. 3. The carrier for transmitting the information of the symbol number counter is arranged in the vicinity of a center carrier transmitted as an unmodulated carrier at a predetermined level, according to claim 1 or 2. Orthogonal frequency division multiplex signal transmitter according to the paragraph. 4. An FFT, QAM decoding circuit for calculating a received frequency-multiplexed signal, and a carrier number signal corresponding to the number of symbols are generated, and this is made to correspond to a calibration carrier and transmitted by an auxiliary carrier. An orthogonal frequency division multiplex signal reception device comprising a symbol number counting circuit for supplying a switching signal for switching the information signal into a predetermined information signal sequence and inserting the switching signal into the circuit.