JP2782997B2 - Data correctness judgment device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data corrector, and more particularly to a data corrector, in which a primary station and a secondary station are connected to each other at a multipoint or point-to-point, and a primary station issues a polling signal to be polled. In a method of performing half-duplex serial data communication in which a secondary station sends a status signal back, when a communication device to be the secondary station is polled by the primary station, the status signal sent back to the primary station is the status signal of the primary station. The present invention relates to a data validity / judgment device used when each secondary station device confirms whether the format is different from an expected format.

[0002]

2. Description of the Related Art Conventionally, as a first judgment method, this type of data right / wrong judgment device puts a protocol analyzer on a data line between a primary station and a secondary station and observes a state of data exchange. Accordingly, there is a method of determining whether the data is correct. As a second determination method, there is a method of storing the status data on the primary station side or the polling data on the secondary station side in the RAM, and then determining the correctness of the status by software.

[0003]

The first method in the above-mentioned conventional true / false judgment device requires that an observation connector be mounted on a data line between a primary station and a secondary station. If the connector is not equipped, it cannot be observed. Further, since the protocol analyzer is a special measuring instrument, there is a disadvantage that it may be difficult to prepare it. Next, the second method is that if these polling data and status data are changed, or if there are several secondary station-side communication devices and their status data is different, Since software must be created and mounted every time a communication device to be inspected changes, it takes a lot of time and effort, and there is a disadvantage that device inspection cannot be performed easily.
Furthermore, a special CP for executing such data processing
There are also disadvantages such as the need to incorporate special software with U.

[0004]

According to the present invention, a primary data station performs polling of a secondary data station , and the data correct / incorrect judgment device of the present invention performs the secondary data polling.
The next station responds by sending a status signal to the primary
Half-duplex communication that sends back a response signal consisting of
In addition, the secondary station transmits polling data and status signals.
I / O ports for inputting and outputting data signals such as signals
Shift to convert serial input data to parallel signal
Register and output data of the shift register by one byte.
Clock generator that converts the packet data
Calculator and divide-by-8 counter and stores data of each byte
Latch circuit and compare status data with expected value
And the desired data value
A data determination unit having a comparison data generation circuit
In the data correct / incorrect judgment device, the first to N-th data
The comparator provided in the data determination unit is from a primary station.
The input status data is compared with the comparison data for each byte.
Data match from the data generation circuit
Output a high-level signal indicating positive
Enables the comparator of the data
Error when the comparison results of the comparators do not match.
Output a high-level signal and then determine the data to be connected
Has the effect of unenabling some of the comparators.
The status data received by the Nth data determination unit
And green and red LEDs for indicating the correctness of the data.

[0005]

Next, the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of one embodiment of the present invention, FIG. 2 is a block diagram of the present embodiment at the time of judging whether the polling data is correct, FIG. 3 is a block diagram of the present embodiment at the time of judging the correctness of status data, and FIG. FIG. 3 is a circuit diagram of a comparison data generation circuit of a main part of the embodiment.

Before describing the data validity / incorrectness determiner as a test apparatus main body, the case where this data correctness / incorrectness determiner is used for checking polling data transmitted by the primary station (FIG. 2), When polling data is received correctly and used to check whether the secondary station is sending correct status data (Fig. 3)
Will be described. First, when the data validity / incorrectness determiner of the present invention is used for validity / invalidity determination of polling data coming from the primary station, as shown in FIG. Connect to O port.
Conversely, when the correctness of the status data coming from the secondary station is determined, as shown in FIG. 3, by combining with a polling data generating circuit for polling the secondary station, the data correctness determination device of the present invention is provided. Is connected to the I / O port of the device for the secondary station as a pseudo primary station.

Next, the operation of the data corrector will be described with reference to FIG. Here, a case where the status data is determined to be correct will be described as an example. The status signal sent from the secondary station enters the shift register 2 as serial data via the I / O port 1. Shift register 2
Then, the serial data is sent to the latch circuit 5 in parallel. Then, the latch circuit 5 divides the status signal into one byte according to the synchronization signal divided by the divide-by-8 counter 4 by the clock generator 3, and divides the status signal into 1-byte data determination units 6-1 to 6-N. Send to The data that has entered the data determination unit 6-1 enters the comparator 9-1 through the latch circuit 7-1. On the other hand, the comparison data generation circuit 8-1 has a configuration as shown in FIG. 4, and the DIP switch 20 is turned on / off to generate data to be compared, and the comparator 9-
Send to 1. The comparator 9-1 compares the status signal from the latch circuit 7-1 with the data from the comparison data generation circuit 8-1, and if they are equal, the latch circuit 7-1.
And outputs a high-level signal to the latch circuit 10-1.
If they are not equal, a low level signal is output. At this time, when a high level signal is output, the latch circuit 7-1 holds the compared data, and the latch circuit 10-1 enables the comparator 9-2 for the next one byte. On the other hand, when a low level signal is output, it is assumed that there is an error in the status data at that time. That is, this does not enable the next comparator 9-2, so that the red L
ED11 remains lit. When this series of processing is sequentially performed and the determination of the last byte is completed, if the last byte is correct, the red LED 11 is turned off and the green LED 12 is turned on.

In the case of FIG. 2, the correct / incorrect judgment of the polling signal output from the primary station is the same as the above-mentioned operation.

[0009]

As described above, the following effects can be obtained by using the data correct / incorrect judgment device of the present invention.

(1) When data exchange is not performed normally, it is possible to easily determine whether the cause is the primary station side or the secondary station side.

(2) Whether the communication device on the secondary station side is operating normally even if the communication device serving as the primary station has not been prepared yet or has failed and cannot be used. It is possible to investigate.

(3) Since the DIP switch is used in the comparison data generation circuit, there are a plurality of devices for which the correctness of the status data is to be determined, and the comparison data can be freely created by the DIP switch even when each device has a different format. It can be used for any device.

(4) Even when the length of the status data changes, a data comparison unit composed of two latch circuits, one comparator, and one comparison data generation circuit is added to or deleted from the data bus and the clock line. Can respond freely.

(5) Even when there are a plurality of devices on the side of the secondary station for which it is desired to determine the correctness of the status signal and each of them transmits status data of a different format to the primary station, the status data of each device is There is no need to create correct / wrong software.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 is a configuration diagram at the time of judging correctness of polling data according to the present embodiment.

FIG. 3 is a configuration diagram at the time of correct / incorrect determination of status data according to the present embodiment.

FIG. 4 is a circuit diagram of a comparison data generation circuit of a main part of the embodiment.

[Explanation of symbols]

Reference Signs List 1 I / O port 2 Shift register 3 Clock generator 4 Divide-by-8 counter 5, 7-1, 7-N, 10-1 to 10-2 Latch circuit 6-1 to 6-N Data determination unit 8-1 8-N comparison data generation circuit 9-1 to 9-N comparator 11, 12 LED 20 DIP switch

Claims (1)

(57) [Claims] 1. A primary station polls a secondary station.
The secondary station responds by copying the status signal to the primary station.
Half-duplex communication that returns a response signal consisting of several words
The secondary station polls data and stays
I / O port for inputting and outputting data signals such as status signals
And convert serial input data to parallel signals
A shift register and output data of the shift register.
Clock that converts the data into packet data for each byte
Generator and divide-by-8 counter and data of each byte
Circuit that stores the status data and the value that expected the status data
Comparator for comparing with the desired data value
A data judgment unit having a comparison data generation circuit that can be created
In the data correct / incorrect judgment device having
The comparator provided in the data determination unit up to
The status data input from the station is
Compared with the data from the comparison data generation circuit,
Output a high-level signal indicating a positive
Enable the comparator of the data judgment unit
If the comparison result of the located comparator does not match, an error is
And outputs the low-level signal
Has the effect of un-enabling the comparator of the data determination unit,
The status received by the final N-th data judgment unit
A data right / wrong judgment device having green and red LEDs for indicating whether data is right or wrong.