JP2782035B2 - Glass substrate processing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a thin film semiconductor device formed on a glass substrate. In particular, it relates to a step that follows a heat treatment.

[0002]

2. Description of the Related Art As a thin film semiconductor device formed on a glass substrate, a thin film transistor (hereinafter referred to as TFT) is known. TF formed on such a glass substrate
T is arranged in a pixel driving portion or a peripheral circuit of the liquid crystal display device, and is used when displaying a high image. It is also used for image sensors and other integrated circuits.

[0003] The use of a glass substrate as a substrate is as follows: Since it is optically transmissive to visible light, it is easy to use when light passes through the device as in a liquid crystal display device. ·Cheap price. However, there is a problem that the upper limit of the heat treatment temperature is limited by the heat resistant temperature of the glass substrate.

[0004] As a glass substrate, Corning 70 is used due to problems such as precipitation of impurities from the glass substrate and price.
59 glass is commonly used. The transition point temperature of this 7059 glass is 628 ° C., and the strain point is 593 ° C. Other practical glass materials having a strain point of 550 to 650 ° C. shown in Table 1 are known.

[0005]

[Table 1]

On the other hand, when an amorphous silicon film formed on a glass substrate by a vapor phase method is crystallized by heating, for example,
A temperature of 00 ° C. or higher is required. When a 7059 glass substrate is used, the substrate shrinks due to heating.

As a device using a TFT formed on a glass substrate, an active matrix type liquid crystal display device is known. In this case, tens to tens of millions of TFTs are formed in a matrix on a glass substrate. It needs to be formed in a shape. Since forming a TFT requires a process using a large number of masks, the problem of substrate shrinkage is a major obstacle in the manufacturing process.

In particular, when mask alignment needs to be performed before the heat treatment, there is a problem that the substrate shrinks due to the heat treatment. On the other hand, in the step of heat-treating the substrate, it is usual to arrange a plurality of substrates vertically and arrange them in a heating furnace due to the problem of the processing speed. Becomes remarkable.

[0009]

An object of the present invention is to solve the problem of shrinkage of a glass substrate and the problem of bending (deflection) of a glass substrate in a heating step in manufacturing a semiconductor device using a glass substrate. It is an object of the invention.

[0010]

According to the present invention, in order to solve the problem of substrate deflection during the heat treatment of the glass substrate, the glass substrate is heated substantially horizontally. FIG. 1 shows an example of an apparatus for performing a heat treatment while holding the substrate substantially horizontally. FIG. 1 shows an outline of a heating furnace, and a quartz reaction tube 1 is shown.
1, a substrate holding means (substrate holder) 12 and a horizontally arranged substrate 13 are shown. Although not shown in the figure, the apparatus is provided with a heater for heating the reaction tube 11 from outside. Also provided are means for supplying a predetermined gas into the reaction tube and means for moving the substrate holding means from the reaction tube to the outside.

FIG. 1 shows a state in which a glass substrate 13 is horizontally held by a substrate holding portion 12. Here, the reason why the glass substrate is held horizontally is to prevent the substrate from being bent and the planarity from being impaired by performing the heat treatment while holding the substrate horizontally. The above configuration is useful when a step of applying a temperature higher than the strain point to the glass substrate is required.

Further, there is a method in which, when it is not desired to shrink the glass substrate in the heating step, the glass substrate is preliminarily subjected to a heat treatment (pre-heat treatment) to be contracted, and the contraction in the subsequent heating step is reduced. According to the experiments of the present inventors, when this pre-heat treatment is performed at a temperature equal to or higher than the transition point temperature of the glass substrate, and when the glass substrate is gradually cooled after the heat treatment, the glass substrate shrinks greatly, and the subsequent heating step is performed at the transition point It was found that the glass substrate hardly shrinks when the temperature is lower than the temperature and when the glass substrate is rapidly cooled after the heat treatment.

[0013] In the pre-heat treatment, the glass substrate is heated to 0.01 to
It is important to cool slowly at a rate of 0.5 ° C./min, for example, 0.2 ° C./min or less. When the glass substrate shrinks by heating, particularly when cooled slowly after the heating is completed, the glass substrate shrinks significantly and at the same time, local stress in the glass substrate is alleviated. As a result, the larger the shrinkage, the smaller the shrinkage of the substrate in the subsequent heating step. In addition, the higher the heating temperature, the greater the effect.

Further, a film formed after the above pre-heat treatment,
In the heat treatment required for crystal growth, oxidation, etc., it is important to rapidly cool at a rate of 10 ° C./min to 300 ° C./min after heating. In particular, at ± 100 ° C. near the strain point of the glass material, expansion and contraction of the glass material could be suppressed by rapid cooling at the above rate. For example, in processes that require processing temperatures of 493-693 ° C. for Corning 7059 glass, at least quenching up to 493 ° C. can result in additional shrinkage (or elongation in some cases) of 30 ppm.
It is effective in keeping below.

The heat treatment steps performed after the pre-heat treatment include crystallization of the amorphous semiconductor formed on the glass substrate by heating, heat annealing of the semiconductor film and the semiconductor device formed on the glass substrate, and heat treatment. Examples of the heat treatment required for forming a semiconductor film or an insulating film over a glass substrate, such as heat treatment applied to a glass substrate, can be given. The heat treatment (pre-heat treatment) for shrinking the glass substrate described above in advance needs to be performed at a temperature higher than the heating temperature in the heating step performed thereafter.

A technique is known in which an amorphous silicon film is formed directly on a glass substrate or via a buffer such as silicon oxide and crystallized by heating at about 600 ° C. By introducing Ni, Pb, and Si as impurities for promoting crystallization into the amorphous silicon film, the amorphous silicon film can be crystallized even at a temperature of 600 ° C. or less. It has been found that by selectively introducing Ni, Pb, and Si, which are impurities that promote crystallization, crystal growth in a direction parallel to the substrate and selective crystal growth can be performed.

When such a step is adopted, a step of performing mask alignment is required in order to selectively introduce impurities before crystallization by heating. Therefore,
In this case, it is possible to effectively utilize the present invention in which shrinkage of the glass substrate (some glass has anisotropy in expansion and contraction) in the subsequent heating step is minimized (at least 30 ppm or less). The present invention is also useful when an oxide film is formed on a semiconductor surface by heating in an oxidizing atmosphere (generally called thermal oxidation). It is also effective when a predetermined film is formed by heating in an atmosphere containing a raw material to be formed into a film.

[0018]

【Example】

[Embodiment 1] In this embodiment, a P-channel TFT (referred to as a PTFT) and an N-channel TFT using a crystalline silicon film formed on a glass substrate shown in FIGS.
(Referred to as NTFT) in a complementary manner. The configuration of this embodiment can be applied to a switching element of a pixel electrode and a peripheral driver circuit of an active liquid crystal display device, as well as an image sensor and a three-dimensional integrated circuit.

In this embodiment, Corning 7059 glass is used as a substrate. First, the glass substrate is pre-heat treated. This step is performed at a temperature of 640 ° C. above the strain point (593 ° C.) of Corning 7059 glass for 4 hours.
This step is performed by using the heating furnace shown in FIG. 1 and holding a plurality of substrates 13 horizontally. The heat treatment atmosphere is a nitrogen atmosphere (normal pressure). This heat treatment is desirably performed at an angle of ± 30 degrees or less from the horizontal in order to prevent the substrate from bending.

After the completion of the heat treatment, the heat treatment is performed at 0.01 to 0.5 ° C. /
The glass substrate is cooled at a rate of, for example, 0.2 ° C./min. This cooling rate is controlled by nitrogen gas (N ₂ ), ammonia (NH ₃ ), nitrous oxide (N
_This is performed by using a gas containing nitrogen such as ₂ O) and changing the inflow amount. In this slow cooling step, the glass substrate shrinks by 1000 ppm or more. Further, when nitrogen, ammonia, and nitrous oxide are used during cooling after the pre-heat treatment, these gases can nitride the vicinity of the surface of the glass substrate. Then
It was possible to prevent boron, barium, sodium, and the like, which are glass impurities, from being deposited in a semiconductor formed in a later step, which was effective in forming a highly reliable semiconductor device.

Then, as shown in FIG. 2, a 2000-nm-thick silicon oxide base film 202 is formed on a substrate (Corning 7059) 201 by sputtering or CVD. The formation of the base film may be performed before the above-described pre-heat treatment. Then, an intrinsic (I-type) amorphous silicon film 203 having a thickness of 300 to 1500 Å, for example, 800 Å is formed by a plasma CVD method. Further, a thickness of 100 to 800 °, for example, 2
A silicon oxide film 204 having a thickness of 00 ° is deposited. This serves as a protective film in the following thermal annealing step and prevents the film surface from being roughened. (Fig. 2 (A))

Next, under a nitrogen atmosphere (atmospheric pressure), at 600 ° C.
For 8 hours. By this thermal annealing,
The amorphous silicon film 203 is crystallized to become a crystalline silicon film.
Then, rapid cooling is performed at a rate of 10 to 300 ° C./min, for example, about 50 ° C./min or more, to a temperature 100 ° C. below the strain point of the glass, that is, to 493 ° C. in this case. At this time, shrinkage of 0 to 44 ppm (20 ppm or less on average) was observed in the glass substrate. This process also uses the heating furnace shown in FIG.

On the other hand, when a base film and an amorphous silicon film are formed on a glass substrate which is not subjected to pretreatment heating at 640 ° C., and the above-described thermal annealing is performed at 600 ° C. for 8 hours, , 1000 ppm or more shrinkage was observed. Prior to the crystallization of the amorphous silicon film by heating, N
By forming a film on the upper or lower surface of the amorphous silicon film using i or Pb as a crystallization promoting material, or by implanting the material into the amorphous silicon film by an ion implantation method, Can be grown in a direction parallel to the substrate from the region into which is introduced. Further, even when silicon ions are selectively implanted, selective crystal growth can be performed.

In such a case, a mask must be formed before the heating step for crystallization, and a film formation and an ion implantation step must be carried out. Must be suppressed. Therefore, in such a case, the present invention which can suppress the shrinkage of the glass substrate is effective. FIG. 3 shows data of shrinkage of the glass substrate (Corning 7059) in this embodiment. FIG. 3 shows that the substrate is pre-heated under the same conditions, then a base film is formed, and then an amorphous silicon film is formed.
This figure shows the final shrinkage of the substrate when heat crystallization is performed under different conditions.

As can be seen from FIG. 3, the heating treatment at a temperature lower than the transition point of the glass substrate (in this case, 628 ° C.), that is, the higher the cooling rate is, at least in the range of 100 ° C. above and below the glass strain point. It can be seen that the shrinkage of the substrate is small. After the crystallization step of the amorphous silicon film 202 by the above-mentioned heating, the protective film 204 is removed, and the silicon film 202 is patterned to form a TFT island-shaped active layer 205. The size of the active layer 205 is determined in consideration of the channel length and channel width of the TFT. 50μ for small ones
mx 20μm, 100μm × 1000μ for large ones
m.

Next, 0.6 to 4 μm, here 0.8 to
The active layer 205 is annealed by irradiating infrared light having a peak at 1.4 μm for 30 to 180 seconds. This annealing
This is performed to further increase the crystallinity of the active layer 205. At this time, the active layer 205 is irradiated with infrared light.
Is 800 to 1300 ° C., typically 900 to 1200
℃, for example 1100 ℃. This temperature is not the actual temperature on the glass (because glass transmits light), but the temperature on the silicon wafer used as a monitor. Here, in order to improve the condition of the surface of the active layer,
Irradiation is performed in an H ₂ atmosphere. In this step, since the active layer is selectively heated, heating of the glass substrate can be minimized. And, it is very effective in reducing defects and unbound bonds in the active layer. (Figure 2
(B))

A halogen lamp was used as an infrared light source. The intensity of visible / near-infrared light was adjusted so that the temperature of the monitor on the single crystal silicon wafer was 800 to 1300 ° C, typically 900 to 1200 ° C. Specifically, the temperature of the thermocouple embedded in the silicon wafer was monitored and fed back to the infrared light source. The temperature of the silicon surface on the glass substrate is about 2/3
It is estimated that it has decreased to a degree. In this embodiment,
The temperature is raised at a constant rate of 50 to 200 ° C./second, and the temperature is lowered by natural cooling at a rapid rate of 20 to 100 ° C./second.

When irradiating infrared light, it is preferable to form a silicon oxide or silicon nitride film as a protective film on the surface. This is to improve the state of the surface of the silicon film 205. In the present embodiment, in order to improve the condition of the surface of the silicon film 205, the process was performed in an H ₂ atmosphere.
0.1 to 10% by volume of HCl and other compounds such as hydrogen halide, fluorine, chlorine and bromine may be mixed in the H ₂ atmosphere.

This visible / near-infrared light irradiation selectively heats the crystallized silicon film, so that the heating of the glass substrate can be minimized. And it is very effective in reducing the defects and the dangling bonds in the silicon film. After this step is completed, 200 to 500
Performing hydrogen annealing at a temperature of 350C, typically 350C, is also effective in reducing defects. This is 1 × 10
^The same effect can be obtained by performing ion doping of hydrogen in an amount of ¹³ to 1 × 10 ¹⁵ cm ⁻² and further performing a heat treatment at 200 to 300 ° C.

After the infrared light irradiation step, the plasma CV
A silicon oxide film 206 having a thickness of 1000 ° is formed as a gate insulating film by Method D. The source gas for CVD is T
EOS (tetraethoxy silane, Si (OC
The substrate temperature at the time of film formation is 30 using ₂ H ₅ ) ₄ ) and oxygen.
0 to 550 ° C, for example, 400 ° C. After the formation of the silicon oxide film 206 serving as the gate insulating film, optical annealing is performed again by irradiating visible / near infrared rays under the same conditions as those of the above-described infrared light irradiating step. By this annealing, the level mainly at the interface between the silicon oxide film 206 and the silicon film 205 and in the vicinity thereof can be eliminated. This is extremely useful for an insulated gate field effect semiconductor device in which the interface characteristics between the gate insulating film and the channel formation region are extremely important.

Subsequently, by a sputtering method,
Aluminum (having a rare earth element of the periodic table IIIa of 0.01 to 0.25% by weight) having a thickness of 6000 to 8000 °, for example, 6000 ° is formed. A group IIIb element other than aluminum may be used. Then, by patterning the aluminum film, gate electrodes 207 and 209 are formed. Further, the surface of the aluminum electrode is anodized to form oxide layers 208 and 210 on the surface.
This anodization is performed in an ethylene glycol solution containing tartaric acid at 1 to 5%. Obtained oxide layers 208, 21
The thickness of 0 is 2000 mm. Note that this oxide 208
And 210 have a thickness for forming an offset gate region in a later ion doping process, so that the length of the offset gate region can be determined in the anodic oxidation process.

Next, the gate electrode portion (that is, the gate electrode 207 and the surrounding oxide layer 208, and the gate electrode 209 and the surrounding oxide layer 210) are used as masks by an ion doping method (also referred to as a plasma doping method).
An impurity imparting a P or N conductivity type is added to the silicon film 205 in a self-aligned manner. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) were used as doping gases.
In the former case, the acceleration voltage is 60 to 90 kV, for example, 80 kV.
kV, in the latter case 40-80 kV, for example 65 kV
And The dose is 1 × 10 ¹⁴ to 8 × 10 ¹⁵ cm ⁻² , for example, phosphorus is 2 × 10 ¹⁵ cm ⁻² and boron is 5 × 10 ¹⁵ . At the time of doping, each element is selectively doped by covering one region with a photoresist. As a result, N type impurity regions 214 and 21
6, P-type impurity regions 211 and 213 are formed,
Channel type TFT (PTFT) region and N-channel type TFT
A region with FT (NTFT) can be formed.

After that, annealing is performed by laser light irradiation. As the laser light, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) was used, but another laser may be used. The irradiation condition of the laser beam is such that the energy density is 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ^2, and ² to 10
A shot, for example, two shots was irradiated. The effect may be increased by heating the substrate to about 200 to 450 ° C. during the irradiation with the laser light. (Fig. 2 (C))

This step may be performed by lamp annealing using visible / near infrared light. Visible and near-infrared light is crystallized silicon, or phosphorus or boron is 10 ¹⁷ to 10
It is easily absorbed by amorphous silicon to which ²¹ cm ^{-3 is} added.
Effective annealing comparable to thermal annealing of 000 ° C. or more can be performed. When phosphorus or boron is added, light is sufficiently absorbed even in the near infrared due to the impurity scattering. This can be fully guessed from the fact that it is black even with the naked eye. On the other hand, since it is hardly absorbed by the glass substrate, it is not necessary to heat the glass substrate to a high temperature, and the process can be performed in a short time. .

Subsequently, a silicon oxide film 21 having a thickness of 6000.degree.
7 is formed as an interlayer insulator by a plasma CVD method. As the interlayer insulator, polyimide or a two-layer film of silicon oxide and polyimide may be used. Further, a contact hole is formed, and a metal material, for example, a multilayer film of titanium nitride and aluminum is used to form a TFT electrode / wiring 2.
18, 220 and 219 are formed. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere at 1 atm.
Is completed in a complementary type. (Figure 2
(D)) The circuit shown above has a CMOS structure in which PTFT and NTFT are provided in a complementary manner. In the above process, two independent TFTs are formed at the same time, and two independent TFTs are cut at the center. It is also possible to manufacture them at the same time.

[Embodiment 2] This embodiment is an example in which an N-channel TFT is provided as a switching element in each pixel in an active liquid crystal display device. Hereinafter, one pixel will be described, but a large number (generally, hundreds of thousands) of other pixels are formed in a similar structure. Also, N
It goes without saying that a P-channel TFT may be used instead of a channel TFT.

FIG. 4 shows an outline of the manufacturing process of this embodiment.
In this embodiment, the substrate 400 is Corning 70
59 glass substrate (1.1 mm thick, 300 × 400 m
m) was used. First, the aluminum nitride film 401 is formed to a thickness of 100 by a sputtering method or a reactive sputtering method.
The thickness was 0 to 5000 °, typically 2000 °. Since the aluminum nitride film has high transparency and suppresses the movement of ions, mobile ions
This is effective in blocking diffusion to an area. Further, as a base film, a silicon oxide film 402 was formed to a thickness of 2000 ° by a plasma CVD method. (Not shown) Next, a heat treatment at 640 ° C. for 4 hours was performed in nitrogen.
Cool slowly in ammonia at a cooling rate of 1 ° C./min. This step is effective if performed at a rate of 0.5 ° C./min or less. Through this step, the glass substrate on which the base film is formed can be contracted in advance. Also in this example, the heating step shown in FIG. 1 was used for the heating step.

Further, an amorphous silicon film is formed to a thickness of 1000 ° by a plasma CVD method. Next, a mask is formed with a photoresist, and silicon ions are implanted into a portion to be a channel formation region. At this time, the projected range of the implanted silicon ions is set near the center of the silicon film.

Then, the mask is removed, and the temperature is reduced to 550 ° C., 8
Time thermal annealing is performed. In this step, the region into which silicon ions have been implanted earlier is selectively crystallized. After this step, rapid cooling is performed at a cooling rate of 50 ° C./min or more. In this step, a method in which the substrate is taken out of the heating furnace and cooled naturally may be employed.

Next, the silicon film is patterned to leave only the island active layer 403 of the TFT. At this time, the central portion of the island-shaped active layer 403 is a region into which silicon ions have been implanted first and is a portion where a channel formation region is formed. Such a structure is employed in order to selectively form the channel formation region portion with a structure having high crystallinity. Then, the island-shaped active layer 40 is formed in an oxygen or nitrous oxide atmosphere.
3 is irradiated with visible / near-infrared light to improve the crystallinity of the silicon film and form a silicon oxide film 404 having a thickness of 50 to 200 Å, typically 100 に on its surface. The temperature was 1100 ° C. and the time was 30 seconds. This silicon oxide film 40
The step of forming 4 can be performed by heating to 550 to 650 ° C. in an oxygen or nitrous oxide atmosphere. In that case, it goes without saying that it is sufficient to use the apparatus shown in FIG. (FIG. 4 (A))

Further, a gate insulating film of aluminum nitride (thickness of 500 to 3000Å, typically 120１２０) is formed by a sputtering method using aluminum nitride as a target or a reactive sputtering method using aluminum as a target.
0 °) 406 is formed. The substrate temperature is 350 ° C.
As a result, a two-layer structure of a thin silicon oxide film 404 formed by thermal oxidation and an aluminum nitride film 406 formed by sputtering is formed. Since aluminum nitride has a ferroelectric constant five times or more that of silicon oxide, it is effective in reducing the threshold voltage of a TFT, particularly, the threshold voltage of a P-channel TFT. Further, unlike silicon nitride, aluminum nitride has a low probability of generating a localized center, and thus is preferable as a gate insulating film material. Next, a known film containing polycrystalline silicon as a main component is represented by L
The gate electrode 407 is formed by forming by PCVD and performing patterning. At this time, phosphorus is added to polycrystalline silicon as an impurity in order to improve conductivity.
-5 atomic%. (FIG. 4 (B))

Thereafter, phosphorus is implanted as an N-type impurity by ion doping, and the source region 40 is self-aligned.
8. The channel formation region 409 and the drain region 410 are formed simultaneously. By irradiating a KrF laser beam, the crystallinity of the silicon film having deteriorated crystallinity due to ion implantation is improved. At this time, the energy density of the laser beam is set to 250 to 300 mJ / cm ² . By the irradiation of the laser light, the sheet resistance of the source / drain of the TFT became 300 to 800 Ω / cm ² . When a low-concentration drain (LDD) structure having a lower doping concentration than usual is used, the sheet resistance is 10 to 200 kΩ / □. The step of annealing by laser irradiation may be performed by lamp annealing of visible / near infrared light.

After that, an interlayer insulator 411 is formed of silicon oxide or polyimide, and further, a pixel electrode 412 is formed.
Is formed by ITO. Then, a contact hole is formed, and a chromium /
The electrodes 413 and 414 are formed of an aluminum multilayer film, and one of the electrodes 414 is connected to the ITO 412 as well. Finally, hydrogenation is performed by annealing in hydrogen at 200 to 400 ° C. for 2 hours. Thus, TF
Complete T. (FIG. 4 (C))

[Embodiment 3] This embodiment will be described with reference to FIG. As the substrate, a glass substrate having a glass strain temperature of 550 to 650 ° C., for example, Corning 7059, was previously annealed in nitrogen at 640 ° C. for 4 hours to prevent shrinkage, and then 450 ° C. at 0.1 ° C./min. After gradually cooling in a nitrogen atmosphere, the one taken out of the heating furnace was used.

First, a base film 502 is formed on a substrate 501, and a thickness of 300 to 8
An amorphous silicon film of 00 ° was formed. And 600 ° C,
Heat annealing was performed for one hour. After thermal annealing, the substrate was rapidly cooled to 450 ° C. at a rate of 2-200 ° C./sec, preferably 10 ° C./sec or more. This is to prevent the substrate from shrinking by the thermal annealing step. In a heating furnace in which such rapid cooling is impossible, the same effect can be obtained by taking the substrate out of the furnace and leaving it at room temperature. In this example, the heating step shown in FIG. 1 was used for the heating step.

In this embodiment, since the thermal annealing temperature is higher than the strain point (593 ° C.) of Corning 7059, it is difficult to suppress the shrinkage of the substrate even if heat treatment / slow cooling treatment is performed in advance. In such a case, rapid cooling from the above annealing temperature is effective. Next, the silicon film is patterned to form island-like active layer regions 505 and 5.
06 is formed. The etching of the active layer was performed by the RIE method having anisotropy in the vertical direction. (FIG. 5 (A))

Next, a silicon oxide or silicon nitride film 507 having a thickness of 200 to 3000 ° is formed by a plasma CVD method. Low pressure CVD or optical CVD may be used for forming the silicon oxide film. Then, light processing of visible / near infrared light is performed. The conditions are the same as in the first embodiment. In the present embodiment, a protective film of silicon oxide or silicon nitride is formed on the surface of the active layer when irradiating visible / near infrared light. Can be prevented. (FIG. 5 (B))

After the irradiation with visible / near infrared light, the protective film 507 is removed. Thereafter, as in the first embodiment, the gate insulating film 50 is formed.
8. A gate electrode and its surrounding oxide layer 509, a gate electrode and its surrounding oxide layer 510 are formed, an impurity region is formed by ion doping, and this is activated by laser irradiation. (FIG. 5 (C))

Further, an interlayer insulator 511 is formed, a contact hole is formed in the interlayer insulator 511, and a metal wiring 512, 5
13, 514 are formed. (FIG. 5D) Thus, a complementary TFT circuit is formed. In the present embodiment, a protective film is formed on the surface of the active layer upon irradiation with visible / near infrared light, so that surface roughness and contamination are prevented. Therefore, the characteristics (electric field mobility and threshold voltage) and reliability of the TFT of this example were extremely good. Further, as is apparent from the present example, the present invention was particularly effective for a substrate material having a glass strain point of 550 to 650 ° C. Furthermore, in the present invention, if the slow cooling step is performed in an atmosphere containing nitrogen-based gas such as nitrogen, ammonia, nitrous oxide, etc., the glass will be nitrided, and various impurity elements contained in the glass will be reduced. Since the diffusion and deposition on the surface can be suppressed, high reliability can be obtained in forming a semiconductor element.

[0050]

According to the present invention, the glass substrate is previously heat-treated at a temperature equal to or higher than the transition point temperature, and is gradually cooled after this heat treatment to shrink the substrate. Thereafter, a heat treatment at a temperature equal to or lower than the distortion temperature of the glass substrate is performed. By further quenching, shrinkage of the glass substrate at this time can be minimized. In the embodiment of the present invention, the description has been mainly given of the Corning 7059 glass substrate. However, other glass substrates such as Corning 1733, HOYA LE30, and NA3 as shown in Table 1 are used.
5, it is needless to say that the same effect can be obtained even with materials such as NA45, NEC Glass OA2, Asahi Glass AN1, and AN2.

[Brief description of the drawings]

FIG. 1 shows a configuration of a heating furnace.

FIG. 2 shows a manufacturing process of an example.

FIG. 3 shows shrinkage data of a glass substrate.

FIG. 4 shows a manufacturing process of an example.

FIG. 5 shows a manufacturing process of an example.

[Explanation of symbols]

 Reference Signs List 11 reaction tube 12 substrate holding means 13 substrate 201 glass substrate 202 base film (silicon oxide film) 203 silicon film 204 silicon oxide film 205 island-like silicon film (active layer) 206 gate insulating film (silicon oxide film) 207 gate electrode (aluminum) 208 Anodized layer (aluminum oxide) 209 Gate electrode 210 Anodized layer 211 Source (drain) region 212 Channel formation region 213 Drain (source) region 214 Source (drain) region 215 Channel formation region 216 Drain (source) region 217 interlayer Insulator 218 electrode 219 electrode 220 electrode

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G02F 1/1333 500 G02F 1/136 500 G02F 1/13 101 H01L 29/78

Claims (13)

(57) [Claims] 1. The method of claim 1, wherein the glass substrate is held substantially horizontally.
First heating at a first temperature equal to or higher than the strain point of the glass substrate
And the step of moving the glass substrate from the first temperature by 0.01 to 0.5.
A second step of gradually cooling at a rate of between ° C./min, a third step of forming a base film on the glass substrate, and a fourth step of forming an amorphous silicon film on the base film At a second temperature lower than the first temperature.
Heating and crystallizing the amorphous silicon film.
A method for treating a glass substrate, comprising: 2. A first method for forming a base film on a glass substrate.
And holding the glass substrate while keeping the glass substrate substantially horizontal.
A second step of heating the glass substrate at a first temperature equal to or higher than the strain point of the plate;
A third step of gradually cooling at a rate between ° C / minute, a fourth step of forming an amorphous silicon film on the base film, and a second step of lowering the glass substrate at a temperature lower than the first temperature. At temperature
Heating and crystallizing the amorphous silicon film.
A method for treating a glass substrate, comprising: 3. The method according to claim 1, wherein in the first step,
The glass substrate has a surface within ± 30 degrees from horizontal.
Glass substrate processing characterized by being held at an angle
Method. 4. The method according to claim 2, wherein in the second step,
The glass substrate has a surface within ± 30 degrees from horizontal.
Glass substrate processing characterized by being held at an angle
Method. 5. The method according to claim 1, wherein the base film is
Glass substrate processing method characterized by being a silicon oxide film
Law. 6. The silicon oxide film according to claim 5, wherein
To be formed by the sputtering method or the CVD method.
Characteristic glass substrate processing method. 7. The amorphous silicon according to claim 1, wherein
The base film is formed by a plasma CVD method.
Glass substrate processing method. 8. The method according to claim 1, wherein the second step is nitrogen.
Performed in an atmosphere containing ammonia and nitrous oxide
A method for treating a glass substrate, comprising: 9. The method according to claim 2, wherein the third step comprises the steps of:
Performed in an atmosphere containing ammonia and nitrous oxide
A method for treating a glass substrate, comprising: 10. The method according to claim 1, wherein
After the process, quenching at a rate between 10 and 300 ° C / min
A glass substrate processing method characterized by the above-mentioned. 11. The amorphous semiconductor according to claim 1, wherein
The silicon film must be doped with impurities that promote crystallization.
And a method for processing a glass substrate. 12. The method according to claim 1, wherein
An acid is formed on the amorphous silicon film between the step and the fifth step.
A film having a step of forming a silicon nitride film.
Substrate processing method. 13. The silicon oxide film according to claim 12,
Is formed by a plasma CVD method.
Glass substrate processing method.