JP2780210B2 - Jig for holding integrated circuits - Google Patents

Jig for holding integrated circuits

Info

Publication number
JP2780210B2
JP2780210B2 JP18721691A JP18721691A JP2780210B2 JP 2780210 B2 JP2780210 B2 JP 2780210B2 JP 18721691 A JP18721691 A JP 18721691A JP 18721691 A JP18721691 A JP 18721691A JP 2780210 B2 JP2780210 B2 JP 2780210B2
Authority
JP
Japan
Prior art keywords
integrated circuit
external connection
connection terminals
holding jig
jig
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP18721691A
Other languages
Japanese (ja)
Other versions
JPH0536869A (en
Inventor
一宏 田代
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18721691A priority Critical patent/JP2780210B2/en
Publication of JPH0536869A publication Critical patent/JPH0536869A/en
Application granted granted Critical
Publication of JP2780210B2 publication Critical patent/JP2780210B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は集積回路の保持治具の構
成に係り、特に高集積度化によって微細な端子が小さい
ピッチで整列している集積回路でも該端子の曲がりや変
位を矯正して保持すると共に保持した状態で試験工程に
も適用し得るように保持治具を構成することで生産性の
向上を図った集積回路の保持治具に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a jig for holding an integrated circuit, and in particular, to correct the bending and displacement of the terminal even in an integrated circuit in which fine terminals are arranged at a small pitch due to high integration. The present invention relates to a holding jig for an integrated circuit, which is configured so that productivity is improved by configuring the holding jig so that the holding jig can be applied to a test process while holding the jig.

【0002】集積回路には外部接続端子の形成方法に多
くの種類が実用化されているが、中でも外部接続端子が
パッケージ周面から四方に突出した後該パッケージの片
面側にオフセット曲げされているQFP(Quad-Flat-Pac
kage) タイプや該端子がパッケージ周面から互いに逆の
二方向に突出した後上記同様にオフセット曲げされてい
るSOP(Small-Outline-Package) タイプが多用されて
いる。
Many types of external connection terminals have been put into practical use in integrated circuits. In particular, the external connection terminals are offset from one side of the package after projecting from the peripheral surface of the package in four directions. QFP (Quad-Flat-Pac
A SOP (Small-Outline-Package) type, in which the terminal protrudes in two opposite directions from the package peripheral surface and is bent in the same manner as described above, is often used.

【0003】そしてかかる集積回路では外部接続端子の
パッケージ外部へ突出している部分が外力によって変形
し易いため該端子を保護する専用の保持治具に収容した
まま、保管, 移送や試験作業等を行なうようにしてい
る。
[0003] In such an integrated circuit, the portion of the external connection terminal protruding outside the package is easily deformed by an external force. Therefore, storage, transfer, test work, and the like are performed with the external connection terminal housed in a dedicated holding jig for protecting the terminal. Like that.

【0004】[0004]

【従来の技術】図2は従来の保持治具の構成を説明する
図であるが、図ではQFPタイプ集積回路に対応する保
持治具の場合を例として説明する。
2. Description of the Related Art FIG. 2 is a view for explaining the structure of a conventional holding jig. In the figure, a holding jig corresponding to a QFP type integrated circuit will be described as an example.

【0005】図で所要の保持治具に保持される集積回路
1には、角形のパッケージ1aの各辺周面から四方に突出
した後該パッケージ1aの片面(図では下面)側にオフセ
ット曲げされた複数の外部接続端子1bが形成されてい
る。
In the figure, the integrated circuit 1 held by a required holding jig is projected to four sides from the peripheral surface of each side of the rectangular package 1a and then is offset-bent to one surface (the lower surface in the figure) of the package 1a. In addition, a plurality of external connection terminals 1b are formed.

【0006】そして該集積回路1を表裏反転させた状態
で保持する樹脂成形品からなる角板状の保持治具2の上
面2a側には、該集積回路1のオフセット曲げされた各外
部接続端子1bの先端領域1b′を除く大きさ領域(図の一
点鎖線で示す領域)Aに相当する大きさの角形の凹み孔
2bが形成され, またその中央部にはパッケージ1aとほぼ
等しい大きさの段差面2cが集積回路1を搭載するステー
ジとして該凹み孔2bの底面から僅かに突出して形成され
ている。
[0006] On the upper surface 2a side of a square plate-shaped holding jig 2 made of a resin molded product for holding the integrated circuit 1 in an inverted state, each of the external connection terminals of the integrated circuit 1 that are offset bent. A square recessed hole having a size corresponding to the area A (area indicated by a chain line in the figure) excluding the tip area 1b 'of 1b
2b is formed, and a step surface 2c having a size substantially equal to that of the package 1a is formed at a central portion thereof as a stage on which the integrated circuit 1 is mounted and slightly protrudes from the bottom surface of the recessed hole 2b.

【0007】更に上記凹み孔2bの周壁には、表裏反転さ
せた上記集積回路1のパッケージ1aが段差面2cの近傍ま
で入れられるように各外部接続端子1bの先端領域1b′と
対応する位置に該先端領域1b′が個々に挿入し得る溝2d
が隔壁2eを具えて形成されている。
Further, on the peripheral wall of the recessed hole 2b, a position corresponding to the tip region 1b 'of each external connection terminal 1b is placed so that the package 1a of the integrated circuit 1 which is turned upside down can be inserted into the vicinity of the step surface 2c. Groove 2d into which the tip region 1b 'can be inserted individually
Are formed with partition walls 2e.

【0008】なお該保持治具2の四隅に形成されている
貫通孔2fは、後述する試験装置等に係わる位置決め用の
孔である。そこで、矢印Bのように表裏反転した状態に
ある上記集積回路1を例えば図示されない真空吸着具等
で該保持治具2に挿入すると、集積回路1のパッケージ
1aが上記段差面2cの近傍に位置した時点で部分拡大図
(イ)に示す如く隔壁2e間に位置する外部接続端子1bの
先端領域1b′が溝2dの底面に接触して搭載されるが、こ
の場合保持治具2に挿入される前の各外部接続端子1bに
多少の曲がりや変形があっても該隔壁2eで矯正されるの
で安定した状態で保持されることになる。
The through holes 2f formed at the four corners of the holding jig 2 are holes for positioning related to a test device and the like described later. Then, when the integrated circuit 1 in a state of being turned upside down as shown by the arrow B is inserted into the holding jig 2 by, for example, a vacuum suction tool (not shown), the package of the integrated circuit 1 is packaged.
When 1a is located in the vicinity of the step surface 2c, as shown in the partially enlarged view (a), the tip region 1b 'of the external connection terminal 1b located between the partition walls 2e is mounted in contact with the bottom surface of the groove 2d. In this case, even if each of the external connection terminals 1b is slightly bent or deformed before being inserted into the holding jig 2, the external connection terminals 1b are corrected by the partition walls 2e, so that they are held in a stable state.

【0009】従ってかかる状態で集積回路1の保管や移
送を行なうことで、外力による各外部接続端子1bの曲が
りや変形を抑制することができる。一方、該保持治具2
に保持されたままの集積回路1を試験する測定ヘッド3
は制御部に繋がる図示されない測定器と一体化されてい
る。
Therefore, by storing or transferring the integrated circuit 1 in such a state, it is possible to suppress bending or deformation of each external connection terminal 1b due to external force. On the other hand, the holding jig 2
Measuring head 3 for testing integrated circuit 1 held in
Is integrated with a measuring device (not shown) connected to the control unit.

【0010】特にこの場合の該測定ヘッド3は、その端
面3aの上記保持治具2の溝2dと対応する各位置に先端部
が押圧されたときに後退し該押圧が解除されたときに復
帰して初期位置に戻るプローブピン4が制御部に繋がっ
て配設されており、該プローブピン4が授受する電気信
号で所要の特性が試験できるようになっている。
Particularly, in this case, the measuring head 3 retreats when its tip is pressed to each position of the end face 3a corresponding to the groove 2d of the holding jig 2, and returns when the pressing is released. The probe pin 4 which returns to the initial position is connected to the control unit, and required characteristics can be tested with an electric signal transmitted and received by the probe pin 4.

【0011】なお、上記保持治具2の貫通孔2fと対応す
る位置に端面3aから突出して設けられているガイドピン
5は該保持治具2の位置決め用のものである。そこで、
集積回路1が保持されている保持治具2と該測定ヘッド
3とを上記位置決め手段で矢印Cのように嵌合させるこ
とで、各プローブピン4がそれぞれ対応する外部接続端
子1bの先端領域1b′と接触して該集積回路1の所要の特
性を試験することができる。
A guide pin 5 provided at a position corresponding to the through hole 2f of the holding jig 2 so as to protrude from the end face 3a is for positioning the holding jig 2. Therefore,
By fitting the holding jig 2 holding the integrated circuit 1 and the measuring head 3 as shown by the arrow C by the above-described positioning means, each probe pin 4 can correspond to the tip region 1b of the corresponding external connection terminal 1b. 'To test the required characteristics of the integrated circuit 1.

【0012】かかる構成になる保持治具2では、外部接
続端子が保護された状態のまま保管,移送や試験作業が
行なえるので効率的である。
In the holding jig 2 having such a configuration, storage, transfer, and test operations can be performed while the external connection terminals are protected, which is efficient.

【0013】[0013]

【発明が解決しようとする課題】しかし集積回路として
の高集積度化が進展して外部接続端子数が増加するにつ
れて隔壁2eの厚さを薄くしなければならない。
However, as the degree of integration of the integrated circuit increases and the number of external connection terminals increases, the thickness of the partition wall 2e must be reduced.

【0014】このことは該隔壁2eが強度的に弱体化して
破損し易くなることを意味するが、特にこの場合の隔壁
2eは外部接続端子1bの先端領域1b′の部分に位置してい
ると同時に測定ヘッド3のプローブピン4の近傍に位置
している。
This means that the partition 2e is weakened in strength and is easily broken, and in particular, in this case, the partition 2e
2e is located near the probe pin 4 of the measuring head 3 at the same time as being located at the tip region 1b 'of the external connection terminal 1b.

【0015】従って、集積回路1を搭載するときの回部
接続端子の曲がりや変形矯正時の隔壁2eの破損屑や, 試
験時における保持治具2と測定ヘッド3ひいてはプロー
ブピン4との相対的位置ズレに伴うプローブピン4と隔
壁2aとの接触による該隔壁2eの破損屑が外部接続端子1b
の先端領域1b′に付着したときには所要の試験情報を得
ることができない場合がある。
Accordingly, when the integrated circuit 1 is mounted, bending of the connection portion connection terminal or breakage debris of the partition wall 2e at the time of correcting the deformation, and relative movement between the holding jig 2 and the measuring head 3 and thus the probe pin 4 at the time of the test. The debris of the partition wall 2e due to the contact between the probe pin 4 and the partition wall 2a due to the displacement is reduced to the external connection terminal 1b.
When it adheres to the tip region 1b ', required test information may not be obtained.

【0016】従来の構成になる保持治具では集積回路と
しての高集積度化につれて増大する外部接続端子間隔壁
の破損屑によって所要の試験情報が得られないことがあ
り、生産性の向上を期待することができないと言う問題
があった。
In the holding jig having the conventional structure, required test information may not be obtained due to breakage debris of the external connection terminal interval wall which increases as the degree of integration as an integrated circuit increases, and an improvement in productivity is expected. There was a problem that I could not do that.

【0017】[0017]

【課題を解決するための手段】上記課題は、パッケージ
周面から同一面内の周囲に突出した後該パッケージの片
面側にオフセット曲げされている複数の外部接続端子を
具えた集積回路を、外部接続端子のオフセット曲げ方向
が上側を向くように該外部接続端子と共に収容して保持
する集積回路の保持治具であって、外部接続端子間を隔
離する隔壁が、該集積回路を搭載したときにそのパッケ
ージ領域で該集積回路を位置決めし得る角形孔の周壁の
各外部接続端子と対応する位置に、集積回路のオフセッ
ト曲げされた各外部接続端子が個々にその先端領域を除
く領域まで挿入し得る深さに形成されている溝によって
構成されている集積回路の保持治具によって解決され
る。
SUMMARY OF THE INVENTION The object of the present invention is to provide an integrated circuit having a plurality of external connection terminals projecting from the package peripheral surface to the periphery in the same plane and then being bent to one side of the package. A jig for holding and holding an integrated circuit together with the external connection terminal so that an offset bending direction of the connection terminal is directed upward, wherein a partition separating the external connection terminals is mounted when the integrated circuit is mounted. The offset bent external connection terminals of the integrated circuit can be individually inserted into a region excluding its tip region at a position corresponding to each external connection terminal on the peripheral wall of the rectangular hole in which the integrated circuit can be positioned in the package region. The problem is solved by an integrated circuit holding jig constituted by a groove formed at a depth.

【0018】[0018]

【作用】プローブピンが外部接続端子と接触する面に図
2で示す隔壁2eがないように保持治具を構成すると、少
なくともプローブピンによって発生する隔壁屑をなくす
ことができるので所要の試験情報を確実に得ることがで
きる。
[Function] If the holding jig is configured so that the partition wall 2e shown in FIG. 2 does not exist on the surface where the probe pin contacts the external connection terminal, at least the partition dust generated by the probe pin can be eliminated. Can be obtained reliably.

【0019】また外部接続端子はその根本に近い程曲が
りや変形が少ない。そこで本発明では、各外部接続端子
間を隔離する隔壁を該端子の根本近傍すなわち図2で説
明した角形の凹み孔の内壁面に形成することで該端子の
先端領域ひいてはプローブピンとの接触領域に位置する
隔壁をなくすと共に、上記隔壁の端辺をガイドとして集
積回路が挿入し得るように該隔壁の端辺に開口側が広く
奥に行くほど狭くなるテーパを形成して該保持治具を構
成している。
The closer the external connection terminal is to its root, the less the bend or deformation. Therefore, in the present invention, a partition wall separating each external connection terminal is formed in the vicinity of the root of the terminal, that is, on the inner wall surface of the square concave hole described with reference to FIG. The holding jig is formed by eliminating the partition wall which is located and forming a taper on the edge side of the partition wall such that the opening side is wider and narrower toward the back so that an integrated circuit can be inserted using the edge side of the partition wall as a guide. ing.

【0020】このことは、集積回路搭載時における該集
積回路の位置決めの容易化が図れるばかりでなく試験時
での隔壁屑の発生が抑制できることを意味する。従っ
て、高集積度化された集積回路の場合でも容易に搭載,
保持し得ると共に所要の試験情報が確実に得られる保持
治具を実現することができる。
This means that not only can the positioning of the integrated circuit be easily performed when the integrated circuit is mounted, but also the generation of partition debris during the test can be suppressed. Therefore, even in the case of a highly integrated circuit, it can be easily mounted,
It is possible to realize a holding jig that can be held and that can reliably obtain required test information.

【0021】[0021]

【実施例】図1は本発明になる集積回路の保持治具の一
例を説明する構成図であり、(1-1) は全体斜視図,(1-2)
は(1-1) をa〜a′で切断した断面図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a structural diagram for explaining an example of a jig for holding an integrated circuit according to the present invention.
FIG. 2 is a cross-sectional view of (1-1) cut along a to a ′.

【0022】なお図では図2同様のQFPタイプ集積回
路に対応する保持治具を例として説明しているので、図
2と同じ対象部材には同一の記号を付して表わしてい
る。図2で説明した集積回路1を図2同様に表裏反転さ
せた状態で保持する樹脂成形品からなる角板状の保持治
具11には、片面すなわち上面11aから二段の角形孔11b
と11c とが同心に形成されている。
In the figure, a holding jig corresponding to a QFP type integrated circuit similar to FIG. 2 is described as an example, and therefore, the same members as those in FIG. 2 are denoted by the same symbols. As shown in FIG. 2, a square plate-shaped holding jig 11 made of a resin molded product for holding the integrated circuit 1 described in FIG.
And 11c are formed concentrically.

【0023】この内角形孔11b は、上記集積回路1の外
部接続端子1bを含む大きさを充分にカバーする大きさで
該集積回路1の厚さのほぼ半分程度の深さを有するもの
であり、また該角形孔11b から更に掘り下げられている
角形孔11c はその周壁11c1が底に行く程狭まるテーパを
もって形成されており上記集積回路1のパッケージ1a部
分を落とし込んだときに該周壁11c1によってほぼ位置決
めできるような大きさに形成されている。
The inner rectangular hole 11b is large enough to cover the size of the integrated circuit 1 including the external connection terminals 1b, and has a depth of about half the thickness of the integrated circuit 1. also rectangular hole 11c, further dug down from the angular-shaped hole 11b by the peripheral wall 11c 1 when dropped into the package 1a portion of the peripheral wall 11c 1 is formed with a taper which narrows enough go to the bottom the integrated circuit 1 It is formed in such a size that it can be almost positioned.

【0024】そしてこの角形孔11c の深さhは、(1-2)
の破線で示す集積回路1のパッケージ表面から外部接続
端子のオフセット曲げされた先端領域までの高さh1より
も僅かに大きくなるように設定されている。
The depth h of the rectangular hole 11c is (1-2)
It is set to be slightly larger than the height h 1 from the package surface of the integrated circuit 1 shown in broken lines until the offset bend is tip area of the external connection terminals.

【0025】更に上記周壁11c1には、位置決めされた集
積回路1の各外部接続端子1bと対応するそれぞれの位置
に各外部接続端子1bがその幅方向で自由に挿入し得る幅
を持つ溝11c2が隔壁11c3を隔てて図2で説明した領域A
に相当する領域まで形成されている。
Furthermore in the peripheral wall 11c 1, the grooves 11c having a width the external connection terminal 1b to the respective positions corresponding to the external connection terminal 1b of the positioning integrated circuit 1 can be freely inserted in the width direction area a 2 is described in FIG. 2 by partition walls 11c 3
Are formed up to a region corresponding to

【0026】従って図2で説明したように表裏反転させ
た集積回路1を該保持治具11に搭載すると、各外部接続
端子1bの根本近傍は(イ)で示すように隔壁11c3を隔て
て上述した溝11c2に挿入されるが、該端子1bの先端領域
1b′は該溝11c2から外れた角形孔11b の底面上に露出し
た状態となる。
[0026] Thus, when the integrated circuit 1 is reversed as described in FIG. 2 mounted on the holding jig 11, the root neighborhood of the external connection terminal 1b is partition walls 11c 3, as shown by (b) The terminal 1b is inserted into the groove 11c 2 described above.
1b 'is in a state of being exposed on the bottom surface of the rectangular hole 11b which deviates from the groove 11c 2.

【0027】このことは、該保持治具11に上記集積回路
1を搭載する際には該集積回路1が上述した周壁11c1
自動的に位置決めされると同時に各外部接続端子1bが溝
11c2によって保護されることを意味しており、また該保
持治具11に保持された集積回路1を図2で説明した試験
装置で試験する場合にそのプローブピン4が接触する上
記端子1bの先端領域1b′近傍に隔壁がないことを表わし
ている。
[0027] This means that the external connection terminal 1b simultaneously the integrated circuit 1 is automatically positioned in the peripheral wall 11c 1 described above when mounting the integrated circuit 1 to the holding jig 11 is a groove
11c 2 means that when the integrated circuit 1 held by the holding jig 11 is tested by the test apparatus described with reference to FIG. This indicates that there is no partition wall near the tip region 1b '.

【0028】なお、該保持治具11に搭載される前の各外
部接続端子1bの多少の曲がりや変形は上記隔壁11c3で矯
正されるが、薄くなって弱体化した該隔壁11c3に破損が
発生した場合でもその破損屑は試験領域である該端子1b
の先端領域1b′に位置することがない。
[0028] Note that some bending or deformation of the external connection terminal 1b before being mounted on the holding jig 11 is corrected by the partition wall 11c 3, damage to the partition wall 11c 3 which weakened thinner Even if a crack occurs, the debris remains in the terminal 1b, which is the test area.
Is not located in the front end region 1b 'of the.

【0029】従って、外力による各外部接続端子1bの曲
がりや変形が抑制できると共に試験工程において確実な
試験情報が得られる集積回路の保持治具を実現すること
ができる。
Therefore, it is possible to realize a jig for holding an integrated circuit that can suppress bending and deformation of each external connection terminal 1b due to external force and obtain reliable test information in a test process.

【0030】[0030]

【発明の効果】上述の如く本発明により、高集積度化に
よって微細な端子が小さいピッチで整列している集積回
路でも該端子の曲がりや変位を矯正して保持すると共に
保持した状態で試験工程にも適用し得る集積回路の保持
治具を提供することができる。
As described above, according to the present invention, even in an integrated circuit in which fine terminals are arranged at a small pitch due to high integration, the bending and displacement of the terminals are corrected and held, and the test process is performed in a state where the terminals are held. Thus, it is possible to provide an integrated circuit holding jig which can also be applied to the present invention.

【0031】なお本発明の説明では集積回路がQFPタ
イプである場合を例としているが、保持治具に形成する
溝を対向する二辺のみに設けることでSOPタイプの集
積回路の場合でも同等の効果を得ることができる。
In the description of the present invention, the case where the integrated circuit is of the QFP type is taken as an example. However, by providing grooves formed in the holding jig only on two opposite sides, the same applies to the case of an SOP type integrated circuit. The effect can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明になる集積回路の保持治具の一例を説
明する構成図。
FIG. 1 is a configuration diagram illustrating an example of a jig for holding an integrated circuit according to the present invention.

【図2】 従来の保持治具の構成を説明する図。FIG. 2 is a diagram illustrating a configuration of a conventional holding jig.

【符号の説明】[Explanation of symbols]

1 集積回路 1b 外部接続端
子 1b′先端領域 11 保持治具 11a上面 11b,11c 角形孔 11c1 周壁 11c2 溝 11c3 隔壁
1 integrated circuit 1b external connection terminal 1b 'tip area 11 holding jig 11a upper surface 11b, 11c square hole 11c 1 peripheral wall 11c 2 groove 11c 3 partition

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 パッケージ周面から同一面内の周囲に突
出した後該パッケージの片面側にオフセット曲げされて
いる複数の外部接続端子を具えた集積回路を、外部接続
端子のオフセット曲げ方向が上側を向くように該外部接
続端子と共に収容して保持する集積回路の保持治具であ
って、 外部接続端子間を隔離する隔壁(11c3)が、該集積回路を
搭載したときにそのパッケージ領域で該集積回路を位置
決めし得る角形孔(11c) の周壁(11c1)の各外部接続端子
と対応する位置に、集積回路(1) のオフセット曲げされ
た各外部接続端子(1b)が個々にその先端領域(1b ′) を
除く領域まで挿入し得る深さに形成されている溝(11c2)
によって構成されていることを特徴とした集積回路の保
持治具。
1. An integrated circuit having a plurality of external connection terminals, which protrudes from the package peripheral surface to the periphery in the same plane and is bent to one side of the package by offset bending, the external connection terminals having an offset bending direction upward. A jig for accommodating and holding together with the external connection terminals such that the partition wall (11c 3 ) for isolating between the external connection terminals is provided in the package area when the integrated circuit is mounted. in positions corresponding to the external connection terminals of the peripheral wall (11c 1) of square holes (11c) capable of positioning the integrated circuit, the offset bend is the external connection terminals of the integrated circuit (1) (1b) is the individual Groove (11c 2 ) formed to a depth that allows insertion to the area excluding the tip area (1b ′)
A holding jig for an integrated circuit, comprising:
【請求項2】 前記の集積回路を位置決めし得る角形孔
(11c) の周壁(11c1)が、該集積回路を搭載したときに自
動的に位置決めできるテーパを具えて形成されているこ
とを特徴とした請求項1記載の集積回路の保持治具。
2. A square hole for positioning said integrated circuit.
Peripheral wall of (11c) (11c 1) is holding jig of the integrated circuit of claim 1 wherein characterized in that it is formed comprises a taper can be automatically positioned when mounting the integrated circuit.
JP18721691A 1991-07-26 1991-07-26 Jig for holding integrated circuits Expired - Fee Related JP2780210B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18721691A JP2780210B2 (en) 1991-07-26 1991-07-26 Jig for holding integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18721691A JP2780210B2 (en) 1991-07-26 1991-07-26 Jig for holding integrated circuits

Publications (2)

Publication Number Publication Date
JPH0536869A JPH0536869A (en) 1993-02-12
JP2780210B2 true JP2780210B2 (en) 1998-07-30

Family

ID=16202106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18721691A Expired - Fee Related JP2780210B2 (en) 1991-07-26 1991-07-26 Jig for holding integrated circuits

Country Status (1)

Country Link
JP (1) JP2780210B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2077363C (en) * 1992-09-02 1996-09-03 Leslie Edward Clark Vented mold and use thereof

Also Published As

Publication number Publication date
JPH0536869A (en) 1993-02-12

Similar Documents

Publication Publication Date Title
US4979903A (en) Surface mountable contact element and assembly
US4937655A (en) Film segment having integrated circuit chip bonded thereto and fixture therefor
JP2780210B2 (en) Jig for holding integrated circuits
US20030102483A1 (en) Method of manufacturing optical semiconductor device
EP0654672B1 (en) Integrated circuit test apparatus
KR0182506B1 (en) Method of manufacturing high density mounting package
JP3256455B2 (en) socket
KR100394774B1 (en) magazine for semiconductor
JPH10112365A (en) Ic socket
JP2986767B2 (en) IC socket
JP2682151B2 (en) Double-sided storage type carrier
JP2682299B2 (en) IC socket
JP2888043B2 (en) IC carrier
KR100406446B1 (en) Lead frame inspection jig
JPH0574982A (en) Semiconductor package
JPH07140190A (en) Electrical characteristics test operable ic transfer tray and method for electrical characteristics test using ic transfer tray
JP2002031665A (en) Positioning apparatus for ic device
JPH03214753A (en) Semiconductor device and its positioning member
JPH06302366A (en) Ic carrier
JPH10255942A (en) Ic socket
JP2766142B2 (en) IC socket
JP5119036B2 (en) IC socket
JPH05174926A (en) Testing socket
JPH05114661A (en) Ic carrier
JPH0737949A (en) Lead frame, of semiconductor device semiconductor device testing contactor, and manufacture of semiconductor device

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19980407

LAPS Cancellation because of no payment of annual fees