JPH07140190A - Electrical characteristics test operable ic transfer tray and method for electrical characteristics test using ic transfer tray - Google Patents

Electrical characteristics test operable ic transfer tray and method for electrical characteristics test using ic transfer tray

Info

Publication number
JPH07140190A
JPH07140190A JP30868493A JP30868493A JPH07140190A JP H07140190 A JPH07140190 A JP H07140190A JP 30868493 A JP30868493 A JP 30868493A JP 30868493 A JP30868493 A JP 30868493A JP H07140190 A JPH07140190 A JP H07140190A
Authority
JP
Japan
Prior art keywords
tray
positioning
contact
electrical characteristics
transfer tray
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP30868493A
Other languages
Japanese (ja)
Other versions
JP2953930B2 (en
Inventor
Takeo Miura
武夫 三浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP30868493A priority Critical patent/JP2953930B2/en
Publication of JPH07140190A publication Critical patent/JPH07140190A/en
Application granted granted Critical
Publication of JP2953930B2 publication Critical patent/JP2953930B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68313Auxiliary support including a cavity for storing a finished device, e.g. IC package, or a partly finished device, e.g. die, during manufacturing or mounting

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)
  • Packaging Of Annular Or Rod-Shaped Articles, Wearing Apparel, Cassettes, Or The Like (AREA)
  • Packaging Frangible Articles (AREA)

Abstract

PURPOSE:To provide an electrical characteristics test operable IC transfer tray even a surface mounted IC while containing in the tray and a method for testing the electrical characteristics. CONSTITUTION:A positioning hole 6 being inserted with an IC positioning pin 5 and an outer lead supporting part 7 for IC are provided at each IC containing part on an IC transfer tray 1 having a plurality of IC containing parts 2. A contact pusher 3 provided with positioning pins 5 are outer lead contact pins 4 is then lowered from above the IC transfer tray 1. The positioning pin 5 is fitted in the positioning hole 6 to position the IC and then the contact pin 4 is brought into contact with an outer lead 10 from above thus effecting the electrical characteristics test for the IC.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体集積回路(以下
「IC」という)の製造工程においてICを搬送するた
めのトレーに関し、特に電気的特性試験を実施するのに
適したIC搬送用トレーおよびそれを用いた電気的特性
試験の方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tray for carrying an IC in a manufacturing process of a semiconductor integrated circuit (hereinafter referred to as "IC"), and more particularly to an IC carrying tray suitable for carrying out an electrical characteristic test, and The present invention relates to a method of electrical characteristic test using the method.

【0002】[0002]

【従来技術】ICの製造工程において、組立の工程を終
えたICは、出荷を前提として所望の機能を有している
かどうかの電気特性試験を行う必要がある。そのため、
組み立てられたICは搬送用トレーに収納されて電気的
特性試験の検査部まで搬送されてくる。
2. Description of the Related Art In an IC manufacturing process, it is necessary to carry out an electrical characteristic test on an IC, which has completed an assembling process, on the assumption that it has a desired function before shipment. for that reason,
The assembled IC is stored in a transfer tray and transferred to the inspection section for the electrical characteristic test.

【0003】図2は従来のIC搬送用トレーおよび従来
の電気的特性試験の実施方法を示した図であり、(a)
はトレーの平面図、(b)は(a)のA−A′断面図、
(c)は(b)の円で囲った部分にICを収納した状態
を表す図、(d)はICに電気的特性試験を行っている
状態を示す図である。
FIG. 2 is a diagram showing a conventional IC transport tray and a conventional method for conducting an electrical characteristic test.
Is a plan view of the tray, (b) is a sectional view taken along the line AA ′ of (a),
(C) is a diagram showing a state where an IC is housed in a portion surrounded by a circle in (b), and (d) is a diagram showing a state where an electric characteristic test is performed on the IC.

【0004】ここで従来のIC搬送用トレー1には図1
(a)、(b)および(c)に示されるように、IC1
1の外周に合わせて周囲にガイド8が形成されたIC収
納部2が複数個設けられており、収納部2の底面はフラ
ットな受け面になっている。
FIG. 1 shows the conventional IC transport tray 1.
As shown in (a), (b) and (c), IC1
A plurality of IC storage portions 2 each having a guide 8 formed around the outer periphery of the storage portion 1 are provided, and the bottom surface of the storage portion 2 is a flat receiving surface.

【0005】この従来の搬送用トレー1は単にICを検
査部まで搬送するために用いられ、電気的特性試験を行
うためには、IC11をトレー1から一旦取り出し、図
2(d)に示すように、あらためて検査台9上に載置し
た上、検査台9上に設けられた複数の位置決め用ピン5
を、上方から下降してくるコンタクトプッシャ3に設け
られた位置決め孔6に挿入させることによって、IC1
1のアライメントを正確に行い、コンタクトピン4を外
部リード10に接触させ、電気信号を印加し、出力を取
り出して試験を行っている。また、試験が終了したIC
11は再び搬送用トレー1に収納され、次の工程に搬送
される。
This conventional transfer tray 1 is used simply to transfer the IC to the inspection section. In order to carry out an electrical characteristic test, the IC 11 is once taken out from the tray 1 and as shown in FIG. 2 (d). In addition, a plurality of positioning pins 5 are newly placed on the inspection table 9 and are provided on the inspection table 9.
Is inserted into the positioning hole 6 provided in the contact pusher 3 that descends from above, so that the IC1
1 is accurately aligned, the contact pin 4 is brought into contact with the external lead 10, an electric signal is applied, an output is taken out, and a test is conducted. Also, ICs that have completed the test
11 is again stored in the transfer tray 1 and transferred to the next step.

【0006】[0006]

【発明が解決しようとする課題】このように、従来の試
験方法では、搬送用トレーから一旦ICを取り出し、試
験を行った後再びICをトレーに収納するため、作業の
遅延や中断を招いたり、外部リードの変形や破損を招い
たりする要因となる。
As described above, according to the conventional test method, the IC is once taken out from the transport tray, and after the test, the IC is stored again in the tray, which causes a delay or interruption of the work. It may cause deformation or damage of the external leads.

【0007】そこで、本願の出願人はかかる問題点を解
決するためにすでに搬送用トレーにICを収納したまま
電気的特性試験を行うことができるようなIC搬送用ト
レーを提案している(特開平3−169043号公報参
照)。図3はこのトレーを示す図であり、(a)はトレ
ーの平面図、(b)は(a)のA−A′断面図である。
図3に示されるように、このトレー1では、IC収納部
2に外部リード12を挿入するための穴16を設け、こ
の穴16にIC11の外部リード12を挿入することに
よって収納されたIC11の位置決めを行うことがで
き、IC11の破損や外部リードの変形を防止すると共
に、穴16を貫通して外部へ導出された外部リード12
に検査用のコンタクトピン(図示せず)を接触させるこ
とによってIC11をトレーに収納したまま電気的特性
試験を行うことができる。
In order to solve such a problem, the applicant of the present application has proposed an IC carrying tray which allows an electric characteristic test to be carried out while the IC is already housed in the carrying tray (special feature: See Kaihei 3-169043). 3A and 3B are views showing this tray. FIG. 3A is a plan view of the tray, and FIG. 3B is a sectional view taken along the line AA ′ of FIG.
As shown in FIG. 3, in the tray 1, a hole 16 for inserting the external lead 12 is provided in the IC storage portion 2, and the IC 11 stored by inserting the external lead 12 of the IC 11 into the hole 16 is inserted. Positioning can be performed, damage to the IC 11 and deformation of the external leads can be prevented, and the external leads 12 that have been led out to the outside through the holes 16 can be positioned.
By making a contact pin (not shown) for inspection contact with, the electrical characteristic test can be performed with the IC 11 stored in the tray.

【0008】しかしながら、このトレーはピングリッド
アレイのような挿入実装タイプのICには用いることが
できるが、フラットパッケージのような表面実装タイプ
のICには用いることができない。しかも最近では電子
装置の小型化、高密度化の要求から表面実装タイプのI
Cの需要が高まっている。
However, although this tray can be used for an insertion mounting type IC such as a pin grid array, it cannot be used for a surface mounting type IC such as a flat package. In addition, recently, due to the demand for miniaturization and high density of electronic devices, surface mount type I
The demand for C is increasing.

【0009】本発明はかかる問題点にかんがみてなされ
たものであり、その目的は表面実装タイプのICであっ
ても、トレーに収納したまま電気的特性試験を行えるよ
うなIC搬送用トレーおよびそれを用いた電気的特性試
験の方法を提供することである。
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object thereof is to provide an IC transfer tray and an IC transfer tray which can perform an electrical characteristic test while being housed in a tray even if the IC is a surface mount type. It is to provide a method of an electrical characteristic test using the.

【0010】[0010]

【課題を解決するための手段】上記目的を達成するため
に、本発明のIC搬送用トレーは、複数のIC収納部を
有し、その各IC収納部にICの位置決め用ピンを挿入
する位置決め孔とICの外部リード支持部とを設けるこ
ととし、このIC搬送用トレーの上方から、位置決め用
ピンと外部リードコンタクト用ピンを設けたコンタクト
プッシャを下降させ、前記位置決め用ピンと位置決め孔
との嵌合によりICを位置決めし、前記コンタクト用ピ
ンを上方から前記外部リードに接触させることにより、
ICの電気的特性試験を行うようにした。
In order to achieve the above object, an IC carrying tray according to the present invention has a plurality of IC accommodating portions, and a positioning pin for inserting an IC positioning pin into each IC accommodating portion. A hole and an external lead supporting portion of the IC are provided, and the contact pusher provided with the positioning pin and the external lead contact pin is lowered from above the IC transport tray to fit the positioning pin and the positioning hole. By positioning the IC by contacting the contact pin with the external lead from above,
The electrical characteristics of the IC were tested.

【0011】[0011]

【作用】ICが搬送用トレーに収納されて検査部まで搬
送されると、コンタクトプッシャが上方から下降し、コ
ンタクトプッシャに設けられた位置決め用ピンが収納部
に設けられた位置決め孔に挿入されることによって、I
Cのアライメントを確実に行いながら、検査用のコンタ
クトピンをICの外部リード10に接触させることによ
り、ICを搬送用トレーに収納したまま電気的特性試験
を行うことができる。
When the IC is housed in the carrying tray and carried to the inspection section, the contact pusher descends from above, and the positioning pin provided in the contact pusher is inserted into the positioning hole provided in the housing section. By I
By bringing the contact pin for inspection into contact with the external lead 10 of the IC while ensuring the alignment of C, the electrical characteristic test can be performed while the IC is stored in the transport tray.

【0012】[0012]

【実施例】以下、本発明の実施例について図面を参照し
て説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0013】図1は本発明によるIC搬送用トレーおよ
びそれを用いた電気的特性試験の実施方法を示した図で
あり、(a)はトレーの平面図、(b)は(a)のA−
A′断面図、(c)は(b)の円で囲った部分にICを
収納した状態でICに電気的特性試験を実施しようとし
ている状態を示す図である。
1A and 1B are diagrams showing an IC carrying tray according to the present invention and a method for carrying out an electrical characteristic test using the same, wherein FIG. 1A is a plan view of the tray, and FIG. −
FIG. 6A is a sectional view taken along the line A ′, and FIG. 7C is a view showing a state where an electric characteristic test is to be performed on the IC in a state where the IC is housed in a portion surrounded by a circle in FIG.

【0014】本発明によるIC搬送用トレー1には図1
(a)、(b)に示されるように、IC11の外周に合
わせて周囲にガイド8が形成されたIC収納部2が複数
個設けられており、収納部2の底面には図1(c)に示
されるように2つの位置決め孔6が設けられており、上
部から下降してくるコンタクトプッシャ3に設けられた
位置決め用ピン5が位置決め孔6に挿入されることによ
ってIC11の位置決めを行うようになっている。ま
た、コンタクトプッシャ3には位置決め用ピン5の他に
電気的特性試験を行うための検査用のコンタクトピン4
が設けられており、収納部2の底面には検査を行うため
にこのコンタクトピン4が外部リード10に接触した際
に外部リード10を支えるためのリード支持部7が設け
られている。なお、ガイド8と収納されるIC11との
クリアランスは狭い方が好ましい。
FIG. 1 shows an IC carrying tray 1 according to the present invention.
As shown in FIGS. 1A and 1B, a plurality of IC storage portions 2 each having a guide 8 formed around the IC 11 are provided to match the outer circumference of the IC 11. ), Two positioning holes 6 are provided, and the positioning pin 5 provided on the contact pusher 3 descending from the upper portion is inserted into the positioning hole 6 to position the IC 11. It has become. In addition to the positioning pin 5, the contact pusher 3 has a contact pin 4 for inspection for conducting an electrical characteristic test.
Is provided, and a lead support portion 7 for supporting the external lead 10 when the contact pin 4 contacts the external lead 10 for inspection is provided on the bottom surface of the housing portion 2. It is preferable that the clearance between the guide 8 and the stored IC 11 is narrow.

【0015】次にこのIC搬送用トレー1を用いて電気
的特性試験を実施する方法について説明する。IC11
は搬送用トレー1に収納されて検査部まで搬送されてく
るが、この時点では、IC11の位置は収納部2内で周
辺に設けられたガイド8によって大まかに位置決めされ
ているに過ぎない。検査部では、コンタクトプッシャ3
が上方から下降し、コンタクトプッシャ3に設けられた
位置決め用ピン5が収納部2に設けられた位置決め孔6
に挿入されることによって、IC11のアライメントを
確実に行いながら、検査用のコンタクトピン4をIC1
1の外部リード10に接触させる。
Next, a method for carrying out an electrical characteristic test using the IC transport tray 1 will be described. IC11
Are stored in the transport tray 1 and transported to the inspection unit. At this point, the position of the IC 11 is merely roughly determined by the guides 8 provided in the periphery of the storage unit 2. In the inspection section, contact pusher 3
Is lowered from above, and the positioning pin 5 provided in the contact pusher 3 is provided with the positioning hole 6 provided in the storage section 2.
By inserting the contact pin 4 for inspection into the IC1 while ensuring the alignment of the IC11.
1 to the external lead 10.

【0016】この場合、収納部2にリード支持部7が設
けられていることが重要である。従来例では、コンタク
トピンを外部リードの下方から接触させることにより試
験を行うが、本発明では上方からコンタクトピン4を下
降させて外部リード10に接触させて試験を行っている
ため、外部リード10に一定の圧力が加えられる。した
がって、リード支持部7は外部リード10の変形や破損
を防止すると共に、コンタクトピン4の外部リード10
に対するコンタクト圧を一定確実なものにして正確な検
査結果が得られることを目的として設けられているので
ある。
In this case, it is important that the accommodating portion 2 is provided with the lead supporting portion 7. In the conventional example, the test is performed by contacting the contact pin from below the external lead, but in the present invention, the test is performed by lowering the contact pin 4 from above and contacting the external lead 10. A constant pressure is applied to. Therefore, the lead supporting portion 7 prevents the external lead 10 from being deformed or damaged, and the external lead 10 of the contact pin 4 is also prevented.
It is provided for the purpose of obtaining a correct inspection result by making the contact pressure with respect to a certain certainty.

【0017】なお、上記実施例では位置決め孔6および
位置決め用ピン5はそれぞれ2つ設けられているが、そ
の数は2つに限定されることはなく、ICの正確な位置
決めを行うために最適な数だけ設ければよい。
In the above embodiment, two positioning holes 6 and two positioning pins 5 are provided, but the number is not limited to two, and is optimal for accurate IC positioning. It is sufficient to provide as many as possible.

【0018】[0018]

【発明の効果】以上説明したように、本発明によるIC
搬送用トレーはIC収納部にIC位置決め孔とリード支
持部とを設け、位置決め用ピンと検査用コンタクトピン
を設けたコンタクトプッシャを上方から下降させて電気
特性試験を実施することによって、ICを搬送用トレー
に収納したままで電気的特性試験を行うことができるの
で、従来のトレーのように検査のためにICをトレーか
ら取り出したり検査後再びトレーに収納したりする作業
が不要となり、かかる作業に伴うICの外部リードの破
損や変形を防止することができると共に、製造工程を大
幅に短縮することができ、作業能率の効率化、省力化、
製造工程の短縮に伴う省スペース化を図ることができ
る。
As described above, the IC according to the present invention
The transfer tray is provided with an IC positioning hole and a lead support part in the IC storage part, and the contact pusher provided with the positioning pin and the contact pin for inspection is lowered from above to carry out an electrical characteristic test to transfer the IC. Since the electrical characteristic test can be performed while it is stored in the tray, it is not necessary to take out the IC from the tray for inspection or store it again in the tray after the inspection, unlike the conventional tray. It is possible to prevent the external leads of the IC from being damaged or deformed, and it is possible to significantly shorten the manufacturing process, to improve the work efficiency, save labor,
Space saving can be achieved due to the shortening of the manufacturing process.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明によるIC搬送用トレーおよびそれを用
いた電気的特性試験の実施方法を示した図であり、
(a)はトレーの平面図、(b)は(a)のA−A′断
面図、(c)は(b)の円で囲った部分にICを収納し
た状態でICに電気的特性試験を実施しようとしている
状態を示す図である。
FIG. 1 is a diagram showing an IC transport tray according to the present invention and a method for carrying out an electrical characteristic test using the tray.
(A) is a plan view of the tray, (b) is a sectional view taken along the line AA 'of (a), and (c) is an electrical characteristic test on the IC in a state where the IC is housed in the circled portion of (b). It is a figure which shows the state which is going to implement.

【図2】従来のIC搬送用トレーおよび従来の電気的特
性試験の実施方法を示した図であり、(a)はトレーの
平面図、(b)は(a)のA−A′断面図、(c)は
(b)の円で囲った部分にICを収納した状態を表す
図、(d)はICに電気的特性試験を行っている状態を
示す図である。
2A and 2B are diagrams showing a conventional IC transport tray and a conventional method for carrying out an electrical characteristic test, in which FIG. 2A is a plan view of the tray, and FIG. 2B is a sectional view taken along line AA ′ of FIG. , (C) are diagrams showing a state in which an IC is housed in a portion surrounded by a circle in (b), and (d) is a diagram showing a state in which an electric characteristic test is performed on the IC.

【図3】本願出願人の先願に係るIC搬送用トレーを示
す図であり、(a)はトレーの平面図、(b)は(a)
のA−A′断面図である。
3A and 3B are diagrams showing an IC carrying tray according to the applicant's prior application, FIG. 3A is a plan view of the tray, and FIG.
FIG. 9 is a sectional view taken along line AA ′ of

【符号の説明】[Explanation of symbols]

1 IC搬送用トレー 2 IC収納部 3 コンタクトプッシャ 4 コンタクトピン 5 位置決め用ピン 6 位置決め孔 7 リード支持台 8 ガイド 9 検査台 10 外部リード 11 IC 1 IC transport tray 2 IC storage unit 3 Contact pusher 4 Contact pin 5 Positioning pin 6 Positioning hole 7 Lead support base 8 Guide 9 Inspection base 10 External lead 11 IC

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/66 B 7630−4M 21/68 U ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Office reference number FI technical display location H01L 21/66 B 7630-4M 21/68 U

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 複数のIC収納部を有し、各IC収納部
にICの位置決め用ピンを挿入する位置決め孔とICの
外部リード支持部とを設けた電気的特性試験実施可能な
IC搬送用トレー。
1. An IC carrier for carrying out an electrical characteristic test, comprising: a plurality of IC housings, each IC housing having a positioning hole into which an IC positioning pin is inserted; and an IC external lead support. tray.
【請求項2】 ICの位置決め用ピンを挿入する位置決
め孔とICの外部リード支持部とを設けた複数のIC収
納部を有するIC搬送用トレーの上方から、位置決め用
ピンと外部リードコンタクト用ピンを設けたコンタクト
プッシャを下降させ、前記位置決め用ピンと位置決め孔
との嵌合によりICを位置決めし、前記コンタクト用ピ
ンを上方から前記外部リードに接触させることを特徴と
する、ICの電気的特性試験の方法。
2. A positioning pin and an external lead contact pin are inserted from above an IC carrying tray having a plurality of IC storage parts provided with positioning holes for inserting IC positioning pins and IC external lead support parts. The contact pusher provided is lowered, the IC is positioned by fitting the positioning pin and the positioning hole, and the contact pin is brought into contact with the external lead from above. Method.
JP30868493A 1993-11-15 1993-11-15 IC transport tray capable of performing electrical property test and method of electrical property test using the same Expired - Fee Related JP2953930B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30868493A JP2953930B2 (en) 1993-11-15 1993-11-15 IC transport tray capable of performing electrical property test and method of electrical property test using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30868493A JP2953930B2 (en) 1993-11-15 1993-11-15 IC transport tray capable of performing electrical property test and method of electrical property test using the same

Publications (2)

Publication Number Publication Date
JPH07140190A true JPH07140190A (en) 1995-06-02
JP2953930B2 JP2953930B2 (en) 1999-09-27

Family

ID=17984046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30868493A Expired - Fee Related JP2953930B2 (en) 1993-11-15 1993-11-15 IC transport tray capable of performing electrical property test and method of electrical property test using the same

Country Status (1)

Country Link
JP (1) JP2953930B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100652417B1 (en) * 2005-07-18 2006-12-01 삼성전자주식회사 Tester capable of a electrical testing a semiconductor package in-tray state and testing method thereof
JP2007198755A (en) * 2006-01-23 2007-08-09 Fujitsu Ltd Semiconductor device, tray for housing the same, and ic tester
WO2012086653A1 (en) * 2010-12-22 2012-06-28 日本発條株式会社 Testing system and package retainer

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100652417B1 (en) * 2005-07-18 2006-12-01 삼성전자주식회사 Tester capable of a electrical testing a semiconductor package in-tray state and testing method thereof
JP2007198755A (en) * 2006-01-23 2007-08-09 Fujitsu Ltd Semiconductor device, tray for housing the same, and ic tester
JP4579164B2 (en) * 2006-01-23 2010-11-10 富士通セミコンダクター株式会社 Semiconductor device storage tray and IC tester
WO2012086653A1 (en) * 2010-12-22 2012-06-28 日本発條株式会社 Testing system and package retainer
JP6039425B2 (en) * 2010-12-22 2016-12-07 日本発條株式会社 Inspection system

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