JP2003167021A - Manufacturing method and shell for semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor device, capable of accurately putting chips in a shell, preventing an offset phenomenon upon closing a cover of the shell, and radiating heat generated upon testing, and a shell for use in the method. <P>SOLUTION: In this manufacturing method for the semiconductor device for manufacturing KGD chips such as a memory and a microcomputer logic and shipping the same, in a process of packing chips into the shell, when the shell is loaded with chips cut from a wafer and individually separated from each other, the chips are held by a holding means and put in the shell under high-accuracy position recognition by a position recognizing means on the device side (step S21), with the chips put in the shell and held to be fixed by the holding means, a body cover of the shell is closed (step S22), further a heat radiation cover formed by a heat radiative member as a part of the cover is closed, and the radiative member of the radiating cover is brought into contact with the chips put in the shell (step S23). <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a manufacturing technique of a semiconductor device, and particularly, in an electrical characteristic test of a semiconductor device, a low cost and high quality KGD (Known Good).
Die) A method of manufacturing a semiconductor device capable of forming a chip, and a technique effectively applied to a shell used for the same.

[0002]

2. Description of the Related Art As a technique studied by the present inventor, the following technique can be considered for the electrical characteristic test of a semiconductor device.

For example, as a method for performing a burn-in test and a selection test for chips, there are a chip level method performed in the state of individually separated chips and a wafer level method performed in the state of a wafer before separation. . The chip level method includes a mechanical connection method and a temporary attachment method. In the former mechanical connection method, a dedicated sheet with bumps corresponding to the chip electrodes is placed in the shell, placed in a socket, and pressure is applied from the back of the chip to separate the chip electrodes and dedicated sheet. It connects the bumps. The latter temporary attachment method is a method in which a wire is temporarily attached to an electrode of a chip, this is put in a socket for a test, and after this test, the wire is removed from the chip.

As a technique relating to the electrical characteristic test of such a semiconductor device, for example, "Roadmap regarding MCM / KGD technique" issued by the Japan Electronic Machinery Manufacturers Association.
The technique etc. which are described in P23-P32 are mentioned.

[0005]

DISCLOSURE OF THE INVENTION By the way, as a result of the inventor's examination of the technique of the mechanical connection system as described above, the following has become clear. In the following, an example of a shell using the mechanical connection system, which is the premise of the present invention, studied by the present inventor will be described with reference to FIG. 11.

As shown in FIG. 11, the shell 100 includes a base 101 into which the chip 1 is placed and a base 101.
The cover 102 is openable and closable. A through hole 103 for accommodating the chip 1 is formed in the base 101, and a tape circuit board 104 and a reinforcing material 105 for reinforcing the tape circuit board 104 are provided on the back surface. The cover 102 has an inner pusher 106
Is provided, and the chip 1 can be pressed against the tape circuit board 104 when the cover 102 is closed.

In the shell as described above, chip chipping occurs due to lack of accuracy when the chip is put into the shell, insufficient accuracy when the chip is put into the shell,
Also, problems such as indentation displacement and no indentation due to tip misalignment due to pusher arc operation when the shell cover is closed, heat generation during chip testing, and the like may occur.

[0008] Therefore, the present inventor, when inserting the chip into the shell, has a position recognition function on the device side so that the chip is accurately inserted. The transfer collet allows the chip to be inserted until the shell cover is closed. It was conceived to fix the chip and prevent the biasing phenomenon by closing the cover with the chip fixed, and to dissipate the heat generated during the test by using a heat dissipation member in a part of the shell.

Therefore, an object of the present invention is to be able to accurately insert a chip into a shell, to prevent a biasing phenomenon when the cover of the shell is closed, and to prevent it from occurring during a test. Another object of the present invention is to provide a method of manufacturing a semiconductor device capable of radiating the generated heat and a shell used for the method.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0011]

Among the inventions disclosed in the present application, a brief description will be given to the outline of typical ones.
It is as follows.

That is, in the method of manufacturing a semiconductor device according to the present invention, the chip is held by the holding means and put into the shell under the high-accuracy position recognition by the position recognition means on the device side, and then put into the shell. With the chip held and fixed by the holding means, close the shell cover, insert the chip, mount the shell with the closed cover on the socket for electrical characteristic test, and perform the electrical characteristic test of the chip. As a result of the electrical characteristic test, each chip has a process of shipping a good chip as a product.

Further, in the method of manufacturing a semiconductor device, the step of closing the cover of the shell includes a step of bringing a part of the heat radiating member of the cover into contact with the chip put in the shell.

Further, in the method of manufacturing a semiconductor device, the electrical characteristic test is applied to a burn-in test and / or a selection test.

Further, the shell according to the present invention is mounted in a socket in which a chip is put in, a cover is closed and an electrical characteristic test is carried out, and when the chip is put in, highly accurate position recognition by a position recognition means on the device side is carried out. There is provided an opening of a holding means for holding the chip under the condition that the inserted chip is held and fixed when the cover is closed.

Further, in the shell, a heat-dissipating member that fits in the opening and is brought into contact with a chip put in the shell is used in a part of the cover.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a flow chart showing a method for manufacturing a semiconductor device according to an embodiment of the present invention, FIG. 2 is an explanatory view showing a shell filling process of chips in the present embodiment, and FIGS. 3 and 4 show a shell cover. Sectional views showing the open / closed state, and FIGS. 5 to 10 are explanatory views showing the position recognition function in the shell filling process of the chip.

First, a manufacturing flow of an example of a method of manufacturing a semiconductor device according to the present embodiment will be described with reference to FIG. The method for manufacturing a semiconductor device according to the present embodiment is applied, for example, when manufacturing and shipping a KGD chip such as a memory or a microcomputer logic, and is executed by the following steps.

(1) Chip preparation process (step S1)
In step 1, a wafer on which a desired integrated circuit is formed is cut into chips to prepare individually separated chips. Here, for example, chips such as a memory and a microcomputer logic are prepared as the chips that are cut from the wafer and individually separated. The wafer is cut into chips after the desired integrated circuits have been formed by repeating the wafer processing steps such as oxidation / diffusion / impurity introduction, wiring pattern formation, insulation layer formation, and wiring layer formation in the previous step. And then separated individually.

(2) In the chip packing step (step S2), the chips cut from the wafer and individually separated are mounted on the shell. The shell is not particularly limited, but for example, a shell having compatibility with the package and terminal arrangement and signal allocation when the chip is sealed can be used.

At this time, as will be described later in detail, the chip is held by a holding means such as a collet and put into the shell under high-accuracy position recognition by a position recognition means such as a position recognition camera on the apparatus side. (Step S21) Then, with the chip inserted into the shell held and fixed by the holding means, the shell main body cover is closed (step S2).
2) Further, the heat dissipation cover which is a part of the heat dissipation member of the cover is closed, and the heat dissipation member of the heat dissipation cover is brought into contact with the chip put into the shell (step S23).

(3) In the shell burn-in board packing step (step S3), the shell on which the chip is mounted is mounted in the socket on the burn-in board. The burn-in board is not particularly limited, but for example, a burn-in board that performs an electrical characteristic test of a package when a chip is sealed can be used.

(4) Burn-in test process (step S
In 4), the burn-in test of the chip mounted in this shell is performed with the shell mounted in the socket on the burn-in board. In this burn-in test, for example, a temperature and voltage stress exceeding the rating is applied to screen chips that may be defective in the future.

(5) In the shell burn-in board removing step (step S5), the chip-mounted shell is removed from the socket on the burn-in board.

(6) In the screening test step (step S6), with the chip mounted in the shell, the screening test of the chip mounted in the shell is performed by the testing device. In this screening test, for example, for a memory chip, a memory test is performed using a predetermined test pattern by write and read operations, and a functional test for confirming whether or not it operates according to a predetermined function, and an input test. An open / short test between output pads, a leak current test, a DC test such as power supply current measurement, and an AC test for testing the AC timing of memory control are performed. In addition,
For logic chips, a functional test is performed by using a predetermined test pattern to check whether the logic function operates according to a predetermined function, open / short inspection between input / output pads, and leakage current. An inspection, a DC test such as measurement of a power supply current, an AC test for testing an AC timing of logic control, and the like are performed.

(7) In the step of removing the shell of the chip (step S7), the chip is removed from the shell.

(8) Chip shipping process (step S8)
In the above, as a result of the electrical characteristic test by the burn-in test and the selection test, a good chip is shipped as a KGD chip. As a result, KGD chips can be used as memory chip products,
It can be shipped as a microcomputer logic chip product.

The KGD chip can be assembled as a package or a module, for example. In the process of assembling this package and module,
For example, assembling with only one memory chip or microcomputer / logic chip built in, or assembling with multiple memory chips such as two, or assembling memory chip and microcomputer / logic chip together. You can For example, there are MCP and MCM.

In this assembly process, as an example, die bonding for mounting a memory chip and a microcomputer logic chip on a substrate, wire bonding for connecting electrodes of this chip and pads on the substrate by wires, chip and By performing resin molding to mold the resin to protect the wire part, and lead molding to mold and surface-treat the external leads,
The assembly process of the package structure and the module structure is completed. In the assembly process, flip chip bonding, which connects the ball-shaped electrode of the chip and the pad on the substrate, can be used.

After being assembled into the package structure or the module structure in this way, it can be shipped as a package product or a module product. Therefore,
Besides shipping as chip products, it is also possible to ship as packaged products or module products.

Next, referring to FIG. 2 and FIG. 3 and FIG. 4, an explanation will be given of an example of a chip filling step in the semiconductor device manufacturing method of the present embodiment.
In FIG. 2, (a) shows a state where the chip is put into the shell,
(B) shows a state in which the main body cover of the shell is closed, and (c) shows a state in which the heat dissipation cover is closed. FIG. 3 shows a cross section of the center of the shell, and FIG. 4 shows a cross section of the periphery of the shell.
Each of (a) shows a state where the cover is opened, and (b) shows a state where the cover is closed.

At the time of the burn-in test, a shell 2 for mounting the chip 1 and a test jig for mounting the shell 2 on which the chip 1 is mounted, such as a burn-in board on which a socket (not shown) is mounted, are used.

The shell 2 is composed of a base 3 into which the chip 1 is inserted, a cover 4 which can be opened and closed on the base 3, and the like. A through hole 5 for accommodating the chip 1 is formed in the base 3. On the back surface of the base 3, a tape circuit board 6 having a multilayer wiring layer structure and a reinforcing material 7 for reinforcing the tape circuit board 6 are provided. Tape circuit board 6
Although not shown, each has a contact portion that contacts each electrode of the chip 1 and each terminal that is electrically connected to each contact portion through a wiring. Each terminal of the tape circuit board 6 projects from the side surface of the base 3 and is arranged so as to be exposed on the front surface and the back surface of the tape circuit board 6.

The cover 4 includes a main body cover 8 and a heat radiation cover 9
And are provided at both ends of the base 3 so as to be openable and closable. The main body cover 8 is provided with an opening 10 for a collet that holds and fixes the inserted chip 1 when the main body cover 8 is closed, and the heat dissipation cover 9 is fitted into the opening 10. It has a structure that fits.
Further, the body cover 8 is provided with a pusher 11 on the inner side, and the chip 1 can be pressed against the tape circuit board 6 in a state where the body cover 8 is closed. Further, when the body cover 8 is closed, the latch 12 provided on the body cover 8 fits into the fitting portion 13 of the base 3. The heat dissipation cover 9
A heat radiating member such as stainless steel is used in order to radiate the heat generated in the chip 1 during the test by coming into contact with the chip 1 with the heat radiation cover 9 closed.

The burn-in board and the socket on the burn-in board are not particularly limited, but have the same structure as the burn-in board and the socket for carrying out a burn-in test of the package when the chip 1 is sealed, for example, It is possible to use existing test jigs and test equipment that were used after assembling 1 into the package structure as it is. Although not shown, the socket is formed with a recess into which the shell 2 on which the chip 1 is mounted is inserted, and pins that come into contact with the terminals of the tape circuit board 6 of the shell 2 are formed around the inner peripheral bottom surface of the recess. Is provided,
Each pin is connected to each wiring on the burn-in board.

In the shell filling process of the chip 1 in the burn-in test, first, as shown in FIG. 2A, the chip 1 is subjected to highly accurate position recognition by a position recognition camera which is a position recognition means on the device side. Then, it is held by the transfer collet 14, which is a holding means, and is put into the through hole 5 of the base 3 of the shell 2 so that the electrode of the chip 1 is on the lower side. At this time, the shell 2 has a cross-sectional shape as shown in FIGS. 3 (a) and 4 (a).

Then, as shown in FIG. 2B, the main body cover 8 of the shell 2 is held with the chip 1 inserted into the through hole 5 of the base 3 of the shell 2 held and fixed by the transfer collet 14. After closing, the latch 12 of the main body cover 8 is fitted into the fitting portion 13 of the base 3. Furthermore, FIG.
As shown in (c), the heat dissipation cover 9 of the shell 2 is closed, and the heat dissipation cover 9 is brought into contact with the chip 1 put in the shell 2. At this time, the shell 2 has a cross-sectional shape as shown in FIGS. 3 (b) and 4 (b).

Next, an example of the position recognition function in the shell filling process of the chip 1 will be described in detail with reference to FIGS.

(1) The chip 1 is picked up from the wafer 15 by the reverse collet 16 and picked up. After the pick up, the reverse collet 16 is reversed by 180 ° and the transfer collet 14 picks up the chip 1 (FIG. 5).

(2) While holding the chip 1 by the transfer collet 14, move to a stop position directly above the shell 2,
It is stopped at this stop position (FIG. 5).

(3) The position recognition camera 17 is moved to a position where it is inserted between the shell 2 and the chip 1 to recognize the shell 2 part and the chip 1 part with high accuracy (FIG. 6). For example, the position recognition camera 17 has a camera head 18 with a vertical rotation mechanism, and rotates the camera head 18 to capture the subject of the upper and lower shells 2 and the chip 1.

(4) After recognition by the position recognition camera 17, the position recognition camera 17 is retracted to the original position (FIG. 7).

(5) According to the recognition result of the position recognition camera 17, the transfer collet 14 holds the chip 1,
The tip 1 is landed in the shell 2 with high precision (FIG. 7).

(6) After landing the chip 1 in the shell 2, the body cover 8 of the shell 2 is closed and the chip 1 is fixed inside the shell 2 (FIG. 8).

(7) After fixing the chip 1, the transfer collet 14 is moved to the retracted position and stopped at this standby position (FIG. 9).

(8) After retracting the transfer collet 14, the heat dissipation cover 9 of the shell 2 is closed and the heat dissipation cover 9 is brought into contact with the chip 1 (FIG. 10).

As described above, when the chip 1 is mounted on the shell 2, it can be mounted with high accuracy based on the recognition result by the position recognition camera 17.

Therefore, according to this embodiment, the position recognition camera 17 is provided on the apparatus side, the opening 10 is provided on the body cover 8 of the cover 4 of the shell 2, and the cover 4 is provided.
The following effects can be obtained by using the heat radiation cover 9 made of a heat radiation member for a part of the above.

(1) By providing the position recognition camera 17 on the device side, when the chip 1 is inserted into the shell 2, the chip 1 can be accurately inserted into the shell 2.

(2) The opening 1 is formed in the body cover 8 of the shell 2.
By setting 0, the chip 1 is transferred by the transfer collet 14.
It is possible to fix the chip 1 until the main body cover 8 of the shell 2 is closed after closing the main body, and prevent the displacement of the chip 1 and the biasing phenomenon when the main body cover 8 is closed.

(3) By using the heat radiation cover 9 made of a heat radiation member for a part of the cover 4 of the shell 2, the heat generated during the test can be radiated.

(4) At present, the shell 2 has through-holes for inserting the chips 1 according to the chip size, and one product is uniform, but in the present embodiment, the above-mentioned (1),
By providing the function of (2), it is possible to make the through hole 5 of the base 3 into which the chip 1 is inserted large.
As a result, the outer shape of one shell can be shared by various types and sizes of chips 1. However, the sheet contact pattern of the tape circuit board 6 needs to be replaced.

(5) By providing the functions of (1) to (3) above, a high-quality KGD chip can be manufactured at low cost. By assembling this KGD chip into a package structure and a module structure, it can be shipped not only as a chip product but also as a package product or a module product.

Although the invention made by the present inventor has been specifically described based on the embodiment, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. It goes without saying that it is possible.

For example, in the above-described embodiment, the case where the pusher is fixedly provided inside the main body cover has been described as an example, but the pusher portion may be movable, and in this case. Can prevent the chip from being displaced when the body cover is closed.

Further, the present invention is particularly effective for producing a high quality KGD chip at a low cost.
In addition to D chips, it is also possible to apply to various kinds of products that require KGD chips and a large number of mixed products (MCM products, a large number of stacked products, etc.).

[0057]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.
It is as follows.

(1) The chip can be accurately inserted into the shell by holding the chip by the holding means and inserting it into the shell under the highly accurate position recognition by the position recognizing means on the device side. Becomes

(2) By closing the shell cover in a state in which the chips put into the shell are held and fixed by the holding means, the displacement of the chips and the biasing phenomenon when the shell cover is closed are prevented. It becomes possible.

(3) The heat generated during the test can be dissipated by bringing a part of the heat dissipating member of the cover into contact with the chip put into the shell.

(4) Due to the above (1) and (2), it is possible to make the chip insertion port of the shell large, so that it is possible to share a variety of chips of various types with a single shell outer shape. Become.

(5) Due to the above (1) to (4), it is possible to manufacture a high-quality KGD chip at low cost, and by assembling this KGD chip, in addition to chip products, package products and modules. It can be commercialized as a product.

[Brief description of drawings]

FIG. 1 is a flowchart showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

2 (a), (b) and (c) are explanatory views showing a shell filling process of chips in an embodiment of the present invention.

3 (a) and 3 (b) are cross-sectional views showing an open / closed state of the cover of the shell (center portion) in the embodiment of the present invention.

4 (a) and 4 (b) are cross-sectional views showing an open / closed state of the cover of the shell (peripheral portion) in the embodiment of the present invention.

FIG. 5 is an explanatory diagram showing a position recognition function in a shell filling process of chips in the embodiment of the present invention.

FIG. 6 illustrates an embodiment of the present invention, which follows FIG.
It is explanatory drawing which shows the position recognition function in the shell filling process of a chip.

FIG. 7 illustrates an embodiment of the present invention, which follows FIG.
It is explanatory drawing which shows the position recognition function in the shell filling process of a chip.

FIG. 8 illustrates an embodiment of the present invention, following FIG.
It is explanatory drawing which shows the position recognition function in the shell filling process of a chip.

FIG. 9 illustrates an embodiment of the present invention, following FIG.
It is explanatory drawing which shows the position recognition function in the shell filling process of a chip.

FIG. 10 is an explanatory diagram showing the position recognition function in the shell filling process of the chip following FIG. 9 in the embodiment of the present invention.

FIG. 11 is a perspective view showing a shell in the method of manufacturing a semiconductor device according to the present invention.

[Explanation of symbols]

1 chip 2,100 shell 3,101 base 4,102 cover 5,103 through hole 6,104 Tape circuit board 7,105 Reinforcement material 8 body cover 9 heat dissipation cover 10 openings 11 pushers 12 latches 13 Fitting part 14 Transfer Collet 15 wafers 16 Inverted collet 17 Position recognition camera 18 camera head

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Toru Shibata             64 Naganuma, Tenno character, Tenno-cho, Minami-Akita-gun, Akita Prefecture             Ta Denshi Co., Ltd. F-term (reference) 2G003 AA10 AC01 AD03 AF05 AG01                       AH07                 4M106 AA02 BA01 CA61 DD30

Claims (5)

[Claims] 1. A step of holding a chip by a holding means and inserting it into a shell under high-accuracy position recognition by a position recognition means on the device side; and a step of holding the chip inserted in the shell by the holding means. A step of closing the cover of the shell in a state of being held and fixed, and mounting the shell in which the chip is inserted and the cover is closed in a socket for performing an electrical property test, and testing the electrical property of the chip. And a step of shipping a non-defective chip as a product as a result of the electrical characteristic test, the method for manufacturing a semiconductor device. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the step of closing the cover of the shell further comprises the step of bringing a part of the heat-dissipating member of the cover into contact with the chip put in the shell. A method of manufacturing a semiconductor device, comprising: 3. The method of manufacturing a semiconductor device according to claim 1, wherein the electrical characteristic test is a burn-in test and / or a screening test. 4. A chip is loaded, the cover is closed, and the chip is mounted in a socket for performing an electrical characteristic test. When the chip is loaded, the position recognition means on the device side recognizes the position with high accuracy. A shell, characterized in that it is provided with an opening of a holding means for holding a chip and holding and fixing the inserted chip when the cover is closed. 5. The shell according to claim 4, wherein a heat-dissipating member that fits into the opening and is brought into contact with the chip placed in the shell is used in a part of the cover. And the shell.