JP2778673B2 - Driving method of solid-state imaging device - Google Patents

Description

The present invention relates to a method of driving a frame transfer type CCD solid-state imaging device, and more particularly to a method for reducing dark current.

(B) Conventional technology A P-type or N-type is used for a Si (silicon) substrate for forming a CCD solid-state imaging device, and the element structure differs depending on the type of the substrate. When a P-type substrate is used, an N-type diffusion region is provided on one surface of the substrate, and this diffusion region is used as a storage channel for information charges. This diffusion area is LOCO
An overflow drain is defined by a channel isolation region such as S, and receives an excess information charge leaking from the diffusion region in the channel isolation region. On the other hand, when an N-type substrate is used, after forming a P-type diffusion region on one surface of the substrate, a so-called P-Well region, an N-type diffusion region serving as a storage transfer channel is formed in the P-Well region. When an N-type substrate is used as described above, a vertical overflow drain structure in which excess information charges in the diffusion region are discharged to the N-type substrate side is provided. This is effective for miniaturization, that is, for increasing the density of pixels, and future development is expected. However, CCDs using P-type substrates have higher sensitivity in the infrared region and are easier to manufacture than those using N-type substrates, so they are widely used in infrared cameras and high-sensitivity cameras. Have been.

FIG. 5 is a sectional view of an image pickup unit of a frame transfer type CCD.

An N-type diffusion region (2) is formed on one surface of the P-type Si substrate (1) to form a buried channel structure. The diffusion region (2) is partitioned by a channel isolation region such as LOCOS, and is formed along the information charge transfer direction.
On the diffusion region (2), a plurality of transfer electrodes (3) and (4) are formed on the SiO ₂ film (5) at right angles to the extending direction of the diffusion region (2).
Are arranged through. The transfer electrode (3) (4), form a two-layer structure in which partially overlap, the four-phase transfer clocks phi ₁ to [phi] ₄ are respectively applied.

When interlacing the CCD, the four-phase transfer clocks φ _{1 to} φ ₄ are applied in synchronization with the vertical scanning signal VD as shown in FIG. First, in the even field EVEN, transfer clocks phi _1, phi ₄ is H level, for example + 5V, the transfer clock phi _2, phi ₃ is L level, for example, is fixed to -7V, transfer clock phi ₂ as shown in FIG. 7 , transfer electrodes phi ₃ is applied (3) (4) with the pixel separation depends on a potential barrier formed under done, transfer clocks phi _1, transfer electrodes phi ₄ is applied (3) ( 4) Information charges e are accumulated in the potential well formed below.
Subsequently, in the odd field ODD, each transfer clock φ ₁
To [phi] ₄ is reversed, the transfer clock phi _1, phi ₄ is L level, the transfer clock phi _2, phi ₃ is fixed to the H level, the transfer clock phi _2, the transfer electrode (3) which phi ₃ is applied (4 ) Information charges e are accumulated in the lower potential well. In the above case, the information charge generated in the region where the potential barrier is formed flows into the potential well as shown by the arrow in the figure, and the information charges for two pixels are mixed. The information charges e accumulated in each field are transferred and output in a predetermined direction within a blanking period of the vertical scanning signal VD set at the end of each field. Therefore, the information charges stored in the pixels of the even lines are read in the even field EVEN, and the information charges stored in the pixels of the odd line are read in the odd field ODD.

FIG. 8 shows the state of the potential in the depth direction when a predetermined potential is applied to the transfer electrodes (3) and (4). The potential of the transfer electrode (3) (4), i.e., the transfer clock phi ₁ to [phi] ₄ is L
In the case of the level, as shown by l in the figure, the surface becomes deeper from the surface of the Si substrate (1) toward the inside of the diffusion region (2), becomes deepest at a position slightly away from the surface, and then reaches the back surface of the Si substrate (1). Thus, a potential that is shallower is formed. This potential is converged to a predetermined depth P ₀ at depth of the Si substrate (1), and the Si substrate (1) not in shallower than the depth P ₀ inside. Therefore, even if the potential of the transfer electrodes (3) and (4) is lower than the potential (pinning potential) at which the potential depth on the surface of the Si substrate (1) becomes P ₀ , the potential depth within the Si substrate (1) is reduced. The potential does not change, and the potential changes in the SiO ₂ film (5) on the Si substrate (1).

(C) Problems to be Solved by the Invention In the above-described CCD, an unsaturated bond is generated at the interface (Si-SiO ₂ interface) between the Si substrate (1) and the SiO ₂ film (5), and the interface state is increased. Since the interface state causes the generation of electric charge, a dark current is generated from the vicinity of the Si—SiO ₂ interface. The amount of the dark current generated varies depending on the location, and if such a dark current is mixed with the information charge, unevenness of brightness and darkness is generated on the reproduction screen. In particular, as the temperature of the CCD increases, the dark current increases, and the unevenness of light and darkness on the reproduction screen appears more remarkably.

When the potential in the SiO ₂ film (5) is shallower than P ₀ , as shown by 1 in FIG. 8, an inversion layer is formed near the surface of the Si substrate (1). The charge flowing into the diffusion region (2) from the Si—SiO ₂ interface is recombined by the holes accumulated in the inversion layer, and does not reach the region where information charges are accumulated. Therefore, Si-SiO ₂
The dark current generated from the interface state of the interface does not mix with the information charge.

However, a high potential is applied to the transfer electrodes (3) and (4) so that the potential in the diffusion region (2) becomes sufficiently deep as shown by h in FIG. Therefore, no inversion layer is formed on the surface of the Si substrate (1), and the dark current generated at the Si—SiO ₂ interface flows directly into the diffusion region (2) and accumulates in the diffusion region (2). Mixed with the information charge.

Therefore, an object of the present invention is to prevent a dark current generated at an Si-SiO ₂ interface from flowing into a region where information charges are stored.

(D) Means for Solving the Problems The present invention has been made to solve the above-mentioned problems, and the feature of the present invention is that a reverse conductivity type diffusion is provided on one main surface of a one conductivity type semiconductor substrate. A region is provided, a plurality of transfer electrodes are arranged on the diffusion region, and a driving method of a solid-state imaging device that stores information charges generated by photoelectric conversion in a channel region formed under the transfer electrode. ,
During the information charge accumulation period, a potential lower than a potential at which an inversion layer that accumulates holes is formed in the vicinity of the surface of the diffusion region is applied to the transfer electrode, and provided at regular intervals in the diffusion region. The object is to separate pixels by the low-density region and to accumulate the information charges between the low-density regions.

(E) Function According to the present invention, an inversion layer is also formed on the surface of the semiconductor substrate in a region where information charges are accumulated, and charges generated from the interface state at the Si—SiO ₂ interface are accumulated in the inversion layer. The electrons recombine with holes and do not flow into a region where information charges are accumulated.

(F) Embodiment One embodiment of the present invention will be described with reference to the drawings.

1A and 1B are diagrams showing a driving method according to the present invention, in which FIG.
FIG. 7C is a diagram showing the state of the potential in the cross section along the line A ′, and FIG. 7C is a diagram showing the state of the potential in the cross section along the line BB ′ in FIG.
In these figures, the CCD itself is the same as in FIG.
The same parts are denoted by the same reference numerals.

During the period for storing information charges, each transfer electrode (3)
The potential of (4) is fixed below the pinning potential, for example, -12 V, and below the lower transfer electrode (3) (cross section taken along line AA ').
A potential as shown in FIGS. 1B and 1C is formed below the transfer electrode 4 on the upper layer side (cross section taken along the line BB '). Here, a low-concentration region (10) having a low impurity concentration is formed below the upper transfer electrode (4), and pixels are separated in the low-concentration region (10). That is, the depth of the potential formed in the diffusion region (2) depends on the voltage applied to the transfer electrodes (3) and (4) and also depends on the difference in the impurity concentration of the diffusion region (2). Since a difference is generated as shown in B, a potential lower than voltages Va and Vb that can form an inversion layer under each of the transfer electrodes (3) and (4) is applied to the transfer electrodes (3) and (4). Depth difference d
Is the height of the potential barrier forming pixel separation. Therefore, information charges are accumulated under the lower transfer electrode (3) surrounded by a potential barrier formed below the upper transfer electrode (4).

FIG. 3 is a timing chart of transfer clocks φ _{1 to} φ ₄ when the CCD is interlaced, and FIG. 4 is a diagram showing a potential state under each transfer electrode.

Each of the transfer clocks φ _{1 to} φ ₄ is given in synchronization with the vertical scanning signal VD, and the period for accumulating the information charges is fixed to the L level, for example, −12 V regardless of the even field EVEN and the odd field ODD. . Therefore, during the storage period of the information charge, the potential in the diffusion region (2) coincides between the even field EVEN and the odd field ODD as shown in FIG. In such a potential state, the information charges e accumulated under the lower transfer electrode (3) are transferred to the transfer clocks φ ₁ , φ ₁ in the even field EVEN next.
_{4 is set} to H level, for example, 0V, so that the transfer clock φ ₃
Transfer clocks φ ₁ and φ ₄ from below the transfer electrode (3) corresponding to
Are transferred under the transfer electrodes (3) and (4) corresponding to On the other hand, in the odd-numbered field ODD, the transfer charges φ ₂ and φ ₃ are then set to the H level so that the information charges under the transfer electrode (3) corresponding to the transfer clock φ ₁ are transferred to the transfer clocks φ ₂ and φ _3. It is transferred under the electrodes (3) and (4). The information charges e collected under the transfer electrodes (3) and (4) are transferred and output in a predetermined direction within a blanking period of the vertical scanning signal VD.

Therefore, the information charges e accumulated for each pixel during the accumulation period of the information charges are mixed for every two adjacent pixels after the end of the accumulation period, and sequentially driven by the pulse driving of the transfer electrodes (3) and (4). Transferred and output. According to such a CCD driving method, an inversion layer is formed at the Si-SiO ₂ interface during the storage period of the information charge, and the charge of the dark current component is recombined with the holes accumulated in the inversion layer. In addition, the dark current is suppressed from being mixed into the information charges. That is, each transfer electrode (3) (4) when the potential of sufficiently low, the transfer electrode (3) of the SiO ₂ film (5) (4) SiO ₂ film corresponding to the charge is accumulated in the side (5 )), Holes are stored on the Si substrate (1) side, and dark current charges generated at the Si—SiO ₂ interface recombine with holes stored on the Si substrate (1) side of the SiO ₂ film (5). In addition, the dark current charge does not enter the inside of the Si substrate (1) (diffusion region (2)).

(G) Effects of the Invention According to the present invention, dark current charges generated at the Si—SiO ₂ interface recombine with holes in the inversion layer, so that dark currents reach the inside of the substrate where information charges are accumulated and transferred. Charges cannot penetrate, and dark current can be prevented from being mixed into information charges. Therefore, the unevenness of brightness on the reproduction screen, which is particularly conspicuous at high temperatures, is eliminated, and a high image quality can be stably provided.

In addition, since the S / N ratio can be improved in imaging a low-luminance object by suppressing the dark current component, the dynamic range of the CCD can be expanded.

[Brief description of the drawings]

FIG. 1 is a sectional view and a potential diagram showing a driving method of the present invention, FIG. 2 is a diagram showing a relationship between a potential of a transfer electrode and a potential, FIG. 3 is a waveform diagram of each transfer clock at the time of interlace driving. 4 is a diagram showing the state of the internal potential of FIG. 1, FIG. 5 is a cross-sectional view of a conventional solid-state image sensor,
6 is a waveform diagram of each transfer clock at the time of interlace driving, FIG. 7 is a diagram showing a state of the internal potential in FIG. 5, and FIG. 8 is a potential diagram in a depth direction of FIG. (1) ... Si substrate, (2) ... Diffusion area, (3) (4)
...... transfer electrodes, (5) .... SiO ₂ film, (10) ... low-concentration region.

Claims (2)

(57) [Claims] A semiconductor substrate of one conductivity type is provided with a diffusion region of the opposite conductivity type on one main surface, a plurality of transfer electrodes are arranged on the diffusion region, and a channel region formed below the transfer electrode. In the method of driving a solid-state imaging device for storing information charges generated by photoelectric conversion, a potential at which an inversion layer for storing holes near the surface of the diffusion region can be formed during the storage period of the information charges. Applying a low potential to the transfer electrode, separating pixels by a low-density region provided at a constant interval in the diffusion region, and accumulating the information charge between the low-density regions. Of driving a solid-state imaging device. 2. The driving method for a solid-state imaging device according to claim 1, wherein information charges accumulated in said accumulation period are read out and transferred in a predetermined direction after mixing for every two pixels.