JP2772800B2 - DC-DC converter - Google Patents

DC-DC converter

Info

Publication number
JP2772800B2
JP2772800B2 JP63133770A JP13377088A JP2772800B2 JP 2772800 B2 JP2772800 B2 JP 2772800B2 JP 63133770 A JP63133770 A JP 63133770A JP 13377088 A JP13377088 A JP 13377088A JP 2772800 B2 JP2772800 B2 JP 2772800B2
Authority
JP
Japan
Prior art keywords
switch element
main switch
transformer
circuit
converter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP63133770A
Other languages
Japanese (ja)
Other versions
JPH01308167A (en
Inventor
芳彦 菊地
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP63133770A priority Critical patent/JP2772800B2/en
Publication of JPH01308167A publication Critical patent/JPH01308167A/en
Application granted granted Critical
Publication of JP2772800B2 publication Critical patent/JP2772800B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明はDC−DCコンバータ、特にその制御回路構成に
関するものである。
The present invention relates to a DC-DC converter, and particularly to a control circuit configuration thereof.

従来、この種の共振型DC−DCコンバータにおいては主
スイッチ素子、例えばトランジスタのオフ時期を共振回
路の共振周波数に見合った適当な値とし、オン期間を制
御することで出力電圧、又は出力電流を調整する回路構
成であった。しかしながら、オン期間の制御のための正
確なターンオン時期の設定は、制御の精度面などから、
困難性がある。従って、主スイッチ素子の各サイクル毎
のオン時期にずれが発生し、オン期間が一定であっても
変圧器の一次電流が変化する場合がある。このため、主
スイッチ素子のオン期間と出力電力は一義的に決まら
ず、出力制御が不安定となる要因となる。又、一次電流
が不安定になることにより、耐圧の高い主スイッチ素子
が要求される。
Conventionally, in this type of resonant DC-DC converter, the output voltage or the output current is controlled by controlling the ON period of the main switch element, for example, the off-time of the transistor to an appropriate value corresponding to the resonance frequency of the resonance circuit. The circuit configuration was adjusted. However, the precise setting of the turn-on timing for the control of the on-period is based on the accuracy of the control, etc.
There is difficulty. Therefore, a shift occurs in the ON timing of each cycle of the main switch element, and the primary current of the transformer may change even when the ON period is constant. For this reason, the ON period of the main switch element and the output power are not uniquely determined, which causes the output control to be unstable. Further, since the primary current becomes unstable, a main switch element having a high withstand voltage is required.

更に図面により、説明する。 This will be further described with reference to the drawings.

第1図は共振型DC−DCコンバータの回路図であり、Tr
1は主スイッチ素子、T1は変圧器、C1は共振用コンデン
サ、D1はダンパーダイオード、D2は整流用ダイオード、
C2は平滑用コンデンサであり、V1は入力電圧、Vxは変圧
器一次電圧、Vsは変圧器二次電圧、Voは出力電圧、Ix
変圧器一次電流、Isは変圧器二次電流、Ioは出力電流を
示している。又、第2図は第1図の波形図であり、
(a)はIx、(b)はVx+Vi、(c)はVs、(d)はIs
の夫々の波形を示す。主スイッチ素子Tr1はt0〜t1間で
オン状態であり、Ixは上昇する。t1でTr1はオフ状態と
なるが、t1〜t2の期間は変圧器T1の内部インダクタンス
と共振用コンデンサC1により構成される共振回路によっ
て、(a)のt1〜t2間にIxが流れる。又、主スイッチ素
子Tr1の電圧は(b)に示すように正弦波に近いVx+Vi
の波形となる。t2において、Tr1の電圧がOVになるとダ
ンパーダイオードD1が導通し、IxはD1に流れる。次い
で、t3において、Tr1をオン状態にして、IxをD1からTr1
に移らせ、t4で再び、Tr1をオフ状態とする。
FIG. 1 is a circuit diagram of a resonance type DC-DC converter.
1 is the main switch element, T 1 is a transformer, C 1 is a capacitor for resonance, D 1 is a damper diode, D 2 is a rectifier diode,
C 2 is a smoothing capacitor, V 1 is the input voltage, V x is the transformer primary voltage, V s is the transformer secondary voltage, V o is the output voltage, I x is transformer primary current, I s transformers The device secondary current, Io , indicates the output current. FIG. 2 is a waveform diagram of FIG.
(A) is I x , (b) is V x + V i , (c) is V s , (d) is I s
3 shows respective waveforms. Main switching element Tr 1 is turned on between t 0 ~t 1, I x increases. Tr 1 in t 1 is turned off, the resonant circuit composed by an internal inductance and the resonance capacitor C 1 of the t 1 period ~t 2 transformers T 1, t 1 ~t 2 of (a) I x flows in between. Also, V x + V i close to a sine wave as shown the voltage of the main switching element Tr 1 in (b)
Waveform. In t 2, a damper diode D 1 becomes conductive when the voltage of the Tr 1 becomes OV, I x flows to D 1. Then, at t 3, and the Tr 1 in the ON state, Tr 1 to I x from D 1
It was move to, again t 4, the off-state Tr 1.

このようなサイクルを繰返し、(c)において、変圧
器二次電圧Vsが出力電圧Voより大なる期間で、(d)の
ように出力側にIsの電流を供給する。しかしながら、前
記せるようにt3で正確にTr1をオン状態するように駆動
回路を制御することはむつかしく、t2〜t3間でオン状態
にすることとなる。t2〜t3間はダンパーダイオードD1
導通期間であり、オン期間が一定であってもどの時点で
オン状態となるかによって変圧器の一次電流Ixの値が異
なる。
Repeating such cycle, (c), the supplies in large consisting period from the transformer secondary voltage V s is the output voltage V o, a current of I s to the output side as shown in (d). However, controlling the drive circuit to the ON state exactly Tr 1 in t 3 such that the order is Mutsukashiku, and thus to be turned on between t 2 ~t 3. During t 2 ~t 3 is a conduction period of the damper diode D 1, the value of the primary current I x of the transformer depending on whether the ON period in the ON state at any time be constant is different.

このようなIxの不安定性はIxと関数関係にある出力電
力制御を不安定性をまねき、前記せる欠点を生ずる。
Instability of such I x leads to a labile output power control in I x functionally related, resulting in disadvantages to the.

本発明は前記せる従来の共振型DC−DCコンバータの欠
点を解消し、簡単な回路構成で、正確な出力制御を可能
とし、あわせて、主スイッチ素子の耐圧低減を図ること
を目的とする。
An object of the present invention is to solve the above-mentioned drawbacks of the conventional resonance type DC-DC converter, to enable accurate output control with a simple circuit configuration, and to reduce the withstand voltage of the main switch element.

第3図は本発明の実施例を示す回路図であり、第1図
と同一符号は同一部分を示し、Aは出力検出誤差増幅
器、CT1は変圧器の一次電流検出器、Bは電流−電圧変
換回路、CはBとAの比較回路、Dはワンショットマル
チ、EはTr1の駆動回路である。このような回路構成に
することにより、共振回路の共振周波数に見合った時間
後、即ち、第2図のt2〜t3間のどの時点でTr1をオン状
態としたとしても、変圧器T1の一次電流IxをCT1で検出
し、交換回路Bによる信号が、誤差増幅器Aの信号によ
り大になったとき、ワンショットマルチDをトリガする
パルスをCの比較回路から、駆動回路Eに送出し、Tr1
をオフ状態に制御することことにより、Ixの制御が正確
となる。
Figure 3 is a circuit diagram showing an embodiment of the present invention, FIG. 1 designate the same parts, A is output detection error amplifier, CT 1 is a primary current detector transformer, B a current - A voltage conversion circuit, C is a comparison circuit of B and A, D is a one-shot multi-circuit, and E is a Tr 1 drive circuit. With such a circuit configuration, after time commensurate with the resonant frequency of the resonant circuit, i.e., even if the Tr 1 turned on at any point between t 2 ~t 3 of FIG. 2, the transformer T 1 of the primary current I x is detected by CT1, signals by exchange circuit B is, when it becomes large by the signal of the error amplifier a, a pulse that triggers the one-shot multi-D from the comparison circuit and C, the drive circuit E Send, Tr 1
By controlling the off state, the accurate control of the I x.

従って、このような本発明の回路構成により、従来の
オン状態時期の制御を出力検出誤差増幅器の信号で正確
に行い、出力調整を実現する回路構成に比し、誤差増幅
器Aの信号で変圧器一次電流Ixを制御して、出力調整が
できるので、制御の不安定やTr1の印加電圧の異常上昇
を抑制することが、簡単、かつ容易に実現できる。
Therefore, according to such a circuit configuration of the present invention, the control of the ON state timing is accurately performed by the signal of the output detection error amplifier, and the transformer of the error amplifier A is compared with the circuit configuration to realize the output adjustment. by controlling the primary current I x, since it is output adjustment, suppressing the abnormal rise of the instability and Tr 1 of voltage applied to the control is simple, and can be easily realized.

第3図の本発明の実施例による回路図について、部分
的な変更、付加、除去等であっても本発明の要旨の範囲
で本願に包含されるものである。
The circuit diagram according to the embodiment of the present invention shown in FIG. 3 is included in the present application within the scope of the present invention, even if it is partially modified, added, or removed.

例えば、CT1は巻線型、シャント型に限られず、出力
検出誤差増幅器Aの接続位置についても、変圧器に別巻
線を設けて、接続するなど、種々の変形をなしうる。
又、共振回路の構成においても、変圧器T1の内部インダ
クタンスの他に直列インダクタンスを付加してもよい。
For example, the CT1 is not limited to the wound type or the shunt type, and the connection position of the output detection error amplifier A can be variously modified, such as providing another winding in the transformer and connecting.
Further, in the configuration of the resonant circuit, in addition to be added to the series inductance of the internal inductance of the transformer T 1.

以上のごとく、本発明により、簡単な回路構成で、正
確な出力制御ができ、更に主スイッチ素子の耐圧低減を
なし得る共振型DC−DCコンバータを提供でき、各産業用
の直流電源等に利用して効果大なるものである。
As described above, according to the present invention, it is possible to provide a resonance type DC-DC converter capable of performing accurate output control with a simple circuit configuration and further reducing the withstand voltage of the main switch element, and being used as a DC power supply for various industries. The effect is great.

【図面の簡単な説明】[Brief description of the drawings]

第1図は共振型DC−DCコンバータの回路図、第2図は波
形図、第3図は本発明の実施例を示す回路図であり、Tr
1は主スイッチ素子、T1は変圧器、C1は共振用コンデン
サ、D1はダンパーダイオード、D2は整流用ダイオード、
C2は平滑コンデンサ、Viは入力電圧、Vxは変圧器一次電
圧、Vsは変圧器二次電圧、Voは出力電圧、Ixは変圧器一
次電流、Isは変圧器二次電流、Ioは出力電流、Aは出力
検出誤差増幅器、Bは電流−電圧変換回路、Cは比較回
路、Dはワンショットマルチ、Eは駆動回路である。
FIG. 1 is a circuit diagram of a resonance type DC-DC converter, FIG. 2 is a waveform diagram, and FIG. 3 is a circuit diagram showing an embodiment of the present invention.
1 is the main switch element, T 1 is a transformer, C 1 is a capacitor for resonance, D 1 is a damper diode, D 2 is a rectifier diode,
C 2 smoothing capacitor, V i is the input voltage, V x is the transformer primary voltage, V s is the transformer secondary voltage, V o is the output voltage, I x is transformer primary current, I s is the transformer secondary A current, Io is an output current, A is an output detection error amplifier, B is a current-voltage conversion circuit, C is a comparison circuit, D is a one-shot multi, and E is a drive circuit.

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】直流電源と変圧器の一次巻線及び主スイッ
チ素子を直列に接続し、さらに、共振回路を構成する共
振用コンデンサを前記主スイッチ素子と並列に接続し、
前記主スイッチ素子がON時に前記変圧器にエネルギーを
蓄え、前記主スイッチ素子がOFF時に前記変圧器から前
記エネルギーを出力して負荷に供給する、他励振フライ
バック電圧共振形のDC−DCコンバータにおいて、 前記変圧器の一次電流を検出する回路の検出電流信号
と、出力電圧と基準電圧との誤差信号とを、比較回路に
よって比較制御し、前記比較回路の出力信号に基づい
て、前記主スイッチ素子をOFFにすることにより、前記
主スイッチ素子のターンオフ時の電流値を一定にする事
を特徴とするDC−DCコンバータ。
1. A DC power supply, a primary winding of a transformer and a main switch element are connected in series, and a resonance capacitor forming a resonance circuit is connected in parallel with the main switch element.
In a separately excited flyback voltage resonance type DC-DC converter, the main switch element stores energy in the transformer when ON, and outputs the energy from the transformer when the main switch element is OFF and supplies the energy to a load. A detection current signal of a circuit for detecting a primary current of the transformer and an error signal between an output voltage and a reference voltage are compared and controlled by a comparison circuit, and based on the output signal of the comparison circuit, the main switch element A DC-DC converter characterized in that a current value at the time of turning off the main switch element is kept constant by turning off the switch.
【請求項2】請求項1記載のDC−DCコンバータにおい
て、 前記比較回路は、前記検出電流信号のレベルが前記誤差
信号のレベルより高くなった時に出力信号を送出し、前
記主スイッチ素子をOFFする事を特徴とするDC−DCコン
バータ。
2. The DC-DC converter according to claim 1, wherein the comparison circuit sends an output signal when a level of the detection current signal becomes higher than a level of the error signal, and turns off the main switch element. DC-DC converter characterized by doing.
JP63133770A 1988-05-31 1988-05-31 DC-DC converter Expired - Fee Related JP2772800B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63133770A JP2772800B2 (en) 1988-05-31 1988-05-31 DC-DC converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63133770A JP2772800B2 (en) 1988-05-31 1988-05-31 DC-DC converter

Publications (2)

Publication Number Publication Date
JPH01308167A JPH01308167A (en) 1989-12-12
JP2772800B2 true JP2772800B2 (en) 1998-07-09

Family

ID=15112561

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63133770A Expired - Fee Related JP2772800B2 (en) 1988-05-31 1988-05-31 DC-DC converter

Country Status (1)

Country Link
JP (1) JP2772800B2 (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5914978B2 (en) * 1979-01-20 1984-04-06 横河電機株式会社 switching regulator
JPS56125386A (en) * 1980-03-07 1981-10-01 Hamari Yakuhin Kogyo Kk Pyrido (2,3-d)pyrimidine derivative and its preparation
DE3278896D1 (en) * 1981-06-30 1988-09-15 Ibm Method for connecting a semiconductor chip to a substrate and such connection
JPS587833U (en) * 1981-07-06 1983-01-19 市川 征二 ventilation helmet
JPS63117662A (en) * 1986-11-05 1988-05-21 Tdk Corp High voltage generator circuit

Also Published As

Publication number Publication date
JPH01308167A (en) 1989-12-12

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