JP2765364B2 - Photoelectric conversion device - Google Patents

Photoelectric conversion device

Info

Publication number
JP2765364B2
JP2765364B2 JP4128403A JP12840392A JP2765364B2 JP 2765364 B2 JP2765364 B2 JP 2765364B2 JP 4128403 A JP4128403 A JP 4128403A JP 12840392 A JP12840392 A JP 12840392A JP 2765364 B2 JP2765364 B2 JP 2765364B2
Authority
JP
Japan
Prior art keywords
photoelectric conversion
integrated circuit
conversion element
conversion device
prismatic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP4128403A
Other languages
Japanese (ja)
Other versions
JPH0661510A (en
Inventor
信孝 渡部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP4128403A priority Critical patent/JP2765364B2/en
Publication of JPH0661510A publication Critical patent/JPH0661510A/en
Application granted granted Critical
Publication of JP2765364B2 publication Critical patent/JP2765364B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance

Landscapes

  • Light Receiving Elements (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は光通信や光情報処理等に
持いられる光受信装置の光電気変換装置に関し、特に、
高受信感度を要求される基幹伝送システム、あるいは、
Gb/sを越える超高速光通信システムに適用される光
電気変換装置の構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photoelectric conversion device of an optical receiving device used for optical communication, optical information processing and the like.
Backbone transmission system that requires high reception sensitivity, or
The present invention relates to a structure of a photoelectric conversion device applied to an ultra-high-speed optical communication system exceeding Gb / s.

【0002】[0002]

【従来の技術】従来の光電気変換装置について図面を参
照して説明する。
2. Description of the Related Art A conventional photoelectric conversion device will be described with reference to the drawings.

【0003】図2は従来の光電気変換装置を示し、
(a)は正面図、(b)は従来の光電気変換装置におけ
る光電気変換素子キャリアの正面図、(c)は図(b)
内のA−B線断面図である。
FIG. 2 shows a conventional photoelectric conversion device.
(A) is a front view, (b) is a front view of a photoelectric conversion element carrier in a conventional photoelectric conversion device, and (c) is a drawing (b).
FIG. 3 is a sectional view taken along line AB in FIG.

【0004】図2において、従来の光電気変換装置14
は、(b),(c)に示すように角柱状のセラミック部
材4に配線用のパターン8,14を形成し、光電気変換
素子2を搭載した光電気変換素子キャリア11が(a)
に示す如く、光電気変換された信号を増幅する集積回路
3と共に、混成集積回路(以下HICと記す)12上に
形成された配線パターン13上に搭載されて構成されて
いる。
FIG. 2 shows a conventional photoelectric conversion device 14.
As shown in (b) and (c), wiring patterns 8 and 14 are formed on a prismatic ceramic member 4, and the photoelectric conversion element carrier 11 on which the photoelectric conversion element 2 is mounted is formed as shown in FIG.
As shown in the figure, the integrated circuit 3 is mounted on a wiring pattern 13 formed on a hybrid integrated circuit (hereinafter, referred to as HIC) 12 together with an integrated circuit 3 for amplifying the photoelectrically converted signal.

【0005】外部から入力された光信号は、光ファイ
バ、及び、レンズを介してHIC12上に搭載された光
電気変換素子キャリア11内の光電気変換素子2に入力
され、集積回路3で増幅されて出力される。
An optical signal input from the outside is input to the photoelectric conversion element 2 in the photoelectric conversion element carrier 11 mounted on the HIC 12 via an optical fiber and a lens, and is amplified by the integrated circuit 3. Output.

【0006】[0006]

【発明が解決しようとする課題】この従来の光電気変換
装置は、図2に示すよういに、光電気変換素子2が角柱
状セラミック4の側面に搭載された光電気変換キャリア
11をHIC12に搭載し、集積回路3との間を、HI
C12上に形成した配線パターン13を介して接続する
構造となっている。
In this conventional photoelectric conversion device, as shown in FIG. 2, a photoelectric conversion carrier 11 having a photoelectric conversion element 2 mounted on a side surface of a prismatic ceramic 4 is mounted on a HIC 12. HI and between the integrated circuit 3 and
The connection is made via a wiring pattern 13 formed on C12.

【0007】HIC12上に搭載される集積回路3とし
ては、トランスインピーダンス形回路が広く用いられて
いる。トランスインピーダンス形の増幅回路は、低雑音
で広帯域の特製を実現し易い反面、帰還回路の特製が、
駆動源のインピーダンスの影響を受け易いという問題が
ある。特に、1Gb/を越える超高速動作を必要とする
領域では、光電気変換素子2と集積回路3の接続方法
は、平坦な周波数特性を実現する上で重要なポイントと
なる。
As the integrated circuit 3 mounted on the HIC 12, a transimpedance type circuit is widely used. Transimpedance type amplifier circuits are easy to realize low noise and wide band specially made, but the feedback circuit specially made,
There is a problem that it is easily affected by the impedance of the driving source. In particular, in a region where an ultra-high speed operation exceeding 1 Gb / is required, the connection method between the photoelectric conversion element 2 and the integrated circuit 3 is an important point for realizing a flat frequency characteristic.

【0008】一般に、光電気変換素子2は、内部インピ
ーダンスが高く、定電流源に近い動作をする。ところ
が、従来の光電気変換装置では、光電気変換素子2と集
積回路3間をHIC12上に形成した配線パターン13
で接続する形態になっているため、配線パターン13に
寄生する寄生インダクタンス、寄生容量の影響によっ
て、駆動源インピーダンスがある周波数特性を持つこと
になり、特に、広帯域の増幅を用いる場合は、寄生イン
ダクタンス、寄生容量で決まる特定の周波数において、
周波数特性に数dBのピーキングを発生し、駆動源イン
ピーダンスの影響により平坦な周波数特性を得るのが難
しいという問題があった。
Generally, the photoelectric conversion element 2 has a high internal impedance and operates close to a constant current source. However, in the conventional photoelectric conversion device, a wiring pattern 13 formed on the HIC 12 between the photoelectric conversion element 2 and the integrated circuit 3 is used.
, The drive source impedance has a certain frequency characteristic due to the influence of the parasitic inductance and the parasitic capacitance that are parasitic on the wiring pattern 13. In particular, when wideband amplification is used, the parasitic inductance , At a specific frequency determined by the parasitic capacitance,
There is a problem that peaking of several dB occurs in the frequency characteristics, and it is difficult to obtain flat frequency characteristics due to the influence of the driving source impedance.

【0009】また、高受信感度を必要とする領域に適用
する従来の光電気変換装置については、一般に高インピ
ーダンス形の増幅回路が用いられるが、この場合は、入
力換算雑音、周波数帯域が、光電気変換素子2と集積回
路3の接続部に寄生する寄生容量により支配され、配線
パターンに寄生する奇生容量の影響が顕著に現れ、所要
の受信感度特性が得られないという問題があった。
A conventional high-impedance amplifying circuit is generally used for a conventional photoelectric conversion device applied to a region requiring high reception sensitivity. There is a problem that the influence of the parasitic capacitance which is dominated by the parasitic capacitance at the connection between the electric conversion element 2 and the integrated circuit 3 and which is parasitic on the wiring pattern appears remarkably, and a required receiving sensitivity characteristic cannot be obtained.

【0010】[0010]

【課題を解決するための手段】本発明の光電気変換装置
は、角柱状の金属部材の両側面に、少なくとも二面に渡
って形成された複数の配線パターンを有する角柱状セラ
ミック部材を有し、前記金属部材と前記セラミック部材
の底面に平板状の金属板を有し、前期金属部材の一面に
搭載された集積回路あるいは電界効果トランジスタを有
し、前記セラミック部材の一面に搭載された光電気変換
素子を有し、又、前記金属部材と前記セラミック部材、
及び、前記金属板はそれぞれろう付けにより固定されて
いる。
The photoelectric conversion device of the present invention has a prismatic ceramic member having a plurality of wiring patterns formed on at least two sides on both sides of a prismatic metal member. A metal plate having a flat metal plate on a bottom surface of the metal member and the ceramic member, an integrated circuit or a field effect transistor mounted on one surface of the metal member, and a photoelectric device mounted on one surface of the ceramic member. Having a conversion element, and the metal member and the ceramic member,
The metal plates are fixed by brazing.

【0011】[0011]

【実施例】次に、本発明について図面を参照して説明す
る。
Next, the present invention will be described with reference to the drawings.

【0012】図1は本発明の一実施例を示し、(a)は
正面図、(b)は図(a)のA−B線断面図である。
1A and 1B show an embodiment of the present invention, wherein FIG. 1A is a front view, and FIG. 1B is a sectional view taken along the line AB in FIG.

【0013】図1において、本実施例の光電気変換装置
1は、角柱状金属部材7の両側に角柱状セラミック部材
4,5をろう付けにより固定し、底面に金属板6を固定
してキャリア本体が構成されている。角柱状セラミック
部材4,5は、二面に渡って形成された配線パターン
8,9,10を有する構成になっている。
In FIG. 1, a photoelectric conversion device 1 of this embodiment has a prismatic ceramic member 4 and 5 fixed to both sides of a prismatic metal member 7 by brazing, and a metal plate 6 fixed to the bottom surface of the carrier. The main body is configured. Each of the prismatic ceramic members 4 and 5 has a wiring pattern 8, 9 and 10 formed over two surfaces.

【0014】本実施例では、角柱状セラミック部材4,
5としてアルミナセラミックを用いている。また、金属
部材7と金属板6としてアルミナセラミックと熱膨張係
数を合わせるために、アルミナセラミックと同等の熱膨
張係数を有するコバール(鉄、ニッケル、コバルトの合
金)を用いている。
In this embodiment, the prismatic ceramic members 4
5 is made of alumina ceramic. In order to match the thermal expansion coefficient with alumina ceramic as the metal member 7 and the metal plate 6, Kovar (an alloy of iron, nickel, and cobalt) having the same thermal expansion coefficient as alumina ceramic is used.

【0015】角柱状セラミック部材4に形成された配線
パターン8の一部には、光電気変換素子2(本実施例で
は、アバランシェフォトダイオードを用いた)を搭載
し、金属部材7の一部には、光電気変換素子2で光電流
に変換された信号を増幅する集積回路3を搭載してい
る。光電気変換素子2のチップは、角柱状セラミック部
材4上に形成された配線パターン8上にろう材(例えば
Au/Sn)により固着搭載される。
The photoelectric conversion element 2 (in this embodiment, an avalanche photodiode is used) is mounted on a part of the wiring pattern 8 formed on the prismatic ceramic member 4. Has an integrated circuit 3 for amplifying a signal converted into a photocurrent by the photoelectric conversion element 2. The chip of the photoelectric conversion element 2 is fixedly mounted on a wiring pattern 8 formed on the prismatic ceramic member 4 with a brazing material (for example, Au / Sn).

【0016】一方、集積回路3のチップは、ろう材(例
えばAu/Si)により金属部材7上に固着搭載され
る。本実施例では、集積回路3としてシリコンバイポー
ラプロセスにより作成されたトランスインピーダンス型
回路を用いている。
On the other hand, the chip of the integrated circuit 3 is fixedly mounted on the metal member 7 with a brazing material (for example, Au / Si). In this embodiment, a transimpedance circuit formed by a silicon bipolar process is used as the integrated circuit 3.

【0017】底面にろう付け固定した金属板6は、角柱
状セラミック部材4,5のサイズよりも大きなサイズに
なっており、組立後の寸法は、角柱状セラミック部材
4,5の両側に1.5mmから2mm程度の突き出しを
有する寸法になっている。本実例では、光電気変換素子
2のカソード電極側が配線パターン8上に固着される構
成となっている。一方、アノード電極側は、光電気変換
素子2の表面の電極パッドからボンディングワイヤ(本
実施例では、直径30ミクロンメータの金線を使用)
で、集積回路3の入力パッドに接続される。集積回路3
の出力端子は、所定の特性インピーダンス(本実施例で
は、50Ωとした)の出力配線パターン9にボンディン
グワイヤで接続される。
The metal plate 6 brazed and fixed to the bottom surface has a size larger than the size of the prismatic ceramic members 4 and 5. It is dimensioned to have a protrusion of about 5 mm to 2 mm. In this example, the cathode electrode side of the photoelectric conversion element 2 is fixed on the wiring pattern 8. On the other hand, on the anode electrode side, a bonding wire is used from the electrode pad on the surface of the photoelectric conversion element 2 (in this embodiment, a gold wire having a diameter of 30 μm is used).
And is connected to the input pad of the integrated circuit 3. Integrated circuit 3
Are connected to an output wiring pattern 9 having a predetermined characteristic impedance (50Ω in this embodiment) by a bonding wire.

【0018】本実施例では、特性インピーダンスを50
Ωとするために、信号パターンの両側に接地パターンを
有するコプレーナ形の線路とした。コプレーナ線路の接
地用配線パターンは、金属部材7に接続され接地用パタ
ーンとなる構成になっている。集積回路3の電源は、同
じく角柱状セラミック部材5に形成された配線パターン
10を介して給電される構成となっている。
In this embodiment, the characteristic impedance is set to 50
In order to obtain Ω, a coplanar line having ground patterns on both sides of the signal pattern was used. The ground wiring pattern of the coplanar line is connected to the metal member 7 so as to be a ground pattern. The power of the integrated circuit 3 is supplied via a wiring pattern 10 similarly formed on the prismatic ceramic member 5.

【0019】外部から入力された光信号は、光ファイ
バ、レンズを介して光電気変換素子2にされ、光電気変
換素子2で変換された光電流は、集積回路3で増幅され
て出力される。本実施例では、光電気変換素子2と集積
回路3間をボンディングワイヤで直接接続するため、間
隔を1.5mm以下程度になるように設定した。このた
め、従来例で問題となっていた光電気変換素子2と集積
回路3間の接続パターンに寄生する寄生インダクタンス
大幅に低減することが可能である。
An optical signal input from the outside is made to the photoelectric conversion element 2 via an optical fiber and a lens, and the photoelectric current converted by the photoelectric conversion element 2 is amplified by the integrated circuit 3 and output. . In this embodiment, since the photoelectric conversion element 2 and the integrated circuit 3 are directly connected by the bonding wire, the interval is set to be about 1.5 mm or less. For this reason, it is possible to greatly reduce the parasitic inductance that is a problem in the conventional example and that is parasitic on the connection pattern between the photoelectric conversion element 2 and the integrated circuit 3.

【0020】また、本実施例では、接続部の奇生容量の
影響はなく、光電気変換素子2と集積回路3の入力パッ
ド部の容量のみになり、寄生容量についても大幅な改善
が可能である。更に、本実施例では、集積回路3を金属
部材7上に搭載する構成としたため、集積回路3の電気
的な接地特性を安定にすることが可能になっている。
Further, in this embodiment, there is no influence of the parasitic capacitance of the connection part, only the capacitance of the photoelectric conversion element 2 and the input pad part of the integrated circuit 3, and the parasitic capacitance can be greatly improved. is there. Further, in this embodiment, since the integrated circuit 3 is mounted on the metal member 7, the electrical grounding characteristics of the integrated circuit 3 can be stabilized.

【0021】[0021]

【発明の効果】以上説明したように本発明は、角柱状の
金属部材の両側面に、二面に渡って形成された複数の配
線パターンを有する角柱状セラミック部材をろう付け
し、金属部材と角柱状セラミック部材の底面に平板上の
金属板をろう付けし、金属部材の一面に集積回路あるい
は、電界効果トランジスタを搭載し、角柱状セラミック
部材の一面に光電気変換素子を搭載して構成することに
より、光電気変換素子と集積回路の接続部に寄生する寄
生インダクタンスと奇生容量を大幅に低減でき、平坦な
周波数特性を有する光電気変換装置を提供することがで
きる効果がある。また、集積回路の接地特性を大幅に改
善でき、広帯域増幅回路の実装時の性能を安定化させる
ことができる効果がある。
As described above, according to the present invention, a prismatic ceramic member having a plurality of wiring patterns formed over two surfaces is brazed to both side surfaces of the prismatic metal member. A metal plate on a flat plate is brazed to the bottom of the prismatic ceramic member, an integrated circuit or a field effect transistor is mounted on one surface of the metal member, and a photoelectric conversion element is mounted on one surface of the prismatic ceramic member. Thereby, the parasitic inductance and the parasitic capacitance parasitic on the connection between the photoelectric conversion element and the integrated circuit can be significantly reduced, and the photoelectric conversion device having a flat frequency characteristic can be provided. In addition, the ground characteristics of the integrated circuit can be significantly improved, and the performance of mounting the broadband amplifier circuit can be stabilized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例を示し、(a)は正面図、
(b)は図(a)のA−B線断面図である。
FIG. 1 shows an embodiment of the present invention, wherein (a) is a front view,
FIG. 2B is a cross-sectional view taken along a line AB in FIG.

【図2】従来の光電気変換装置を示し、(a)は正面
図、(b)は従来の光電気変換装置における光電気変換
素子キャリアの正面図、(c)は図(b)内のA−B線
断面図である。
FIGS. 2A and 2B show a conventional photoelectric converter, FIG. 2A is a front view, FIG. 2B is a front view of a photoelectric converter carrier in the conventional photoelectric converter, and FIG. It is AB sectional drawing.

【符号の説明】[Explanation of symbols]

1 光電気変換装置 2 光電気変換素子 3 集積回路 4,5 角柱状セラミック部材 6 金属板 7 金属部材 8,9,10 配線パターン 11 光電気変換素子キャリア 12 混成集積回路 13 配線パターン 14 光電気変換装置 DESCRIPTION OF SYMBOLS 1 Optoelectric conversion device 2 Optoelectric conversion element 3 Integrated circuit 4,5 Prismatic ceramic member 6 Metal plate 7 Metal member 8,9,10 Wiring pattern 11 Optoelectric conversion element carrier 12 Hybrid integrated circuit 13 Wiring pattern 14 Optoelectric conversion apparatus

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 角柱状の金属部材の両側面に、少なくと
も二面に渡って形成された複数の配線パターンを有する
角柱状セラミック部材を有し、前記金属部材と前記セラ
ミック部材の底面に平板状の金属板を有し、前記金属部
材の一面に搭載された集積回路あるいは電界効果トラン
ジスタを有し、前記セラミック部材の一面に搭載された
光電気変換素子を有することを特徴とする光電気変換装
置。
1. A prismatic ceramic member having a plurality of wiring patterns formed on at least two sides on both side surfaces of a prismatic metal member, and a flat plate-shaped member is formed on a bottom surface of the metal member and the ceramic member. A metal plate, an integrated circuit or a field effect transistor mounted on one surface of the metal member, and a photoelectric conversion element mounted on one surface of the ceramic member. .
【請求項2】 前記金属部材と前記セラミック部材、及
び、前記金属板はそれぞれろう付けにより固定されるこ
とを特徴とする請求項1記載の光電気変換装置。
2. The photoelectric conversion device according to claim 1, wherein the metal member, the ceramic member, and the metal plate are fixed by brazing, respectively.
JP4128403A 1992-05-21 1992-05-21 Photoelectric conversion device Expired - Lifetime JP2765364B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4128403A JP2765364B2 (en) 1992-05-21 1992-05-21 Photoelectric conversion device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4128403A JP2765364B2 (en) 1992-05-21 1992-05-21 Photoelectric conversion device

Publications (2)

Publication Number Publication Date
JPH0661510A JPH0661510A (en) 1994-03-04
JP2765364B2 true JP2765364B2 (en) 1998-06-11

Family

ID=14983930

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4128403A Expired - Lifetime JP2765364B2 (en) 1992-05-21 1992-05-21 Photoelectric conversion device

Country Status (1)

Country Link
JP (1) JP2765364B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004088046A (en) 2002-06-25 2004-03-18 Sumitomo Electric Ind Ltd Optical receiver and method of manufacturing the same

Also Published As

Publication number Publication date
JPH0661510A (en) 1994-03-04

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