JP2742855B2 - Semiconductor thin film manufacturing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor thin film, and more particularly to a method for manufacturing a semiconductor thin film having a heteroepitaxial film.

[0002]

2. Description of the Related Art Semiconductor thin films of this kind are used in electronic devices,
It is used for optical devices and electron-light mixing devices. In general, when a semiconductor thin film is formed by crystal-growing a substance different from the semiconductor substrate (base) on the semiconductor substrate, that is, when growing a heteroepitaxial film, the crystal constituting the substrate is grown on the substrate. Lattice mismatch occurs between the material and the crystal constituting the material. Such lattice mismatch is called a misfit, and the misfit causes a defect at the crystal interface, that is, a misfit dislocation. With respect to the generation mechanism, properties, interaction, and the like of the misfit dislocations, various combinations of substances have been studied.

On the other hand, the above-mentioned misfit dislocation causes
It is known that new dislocations propagate into the grown film,
The dislocation propagating into the grown film is called a threading dislocation.

Hereinafter, a process of forming the threading dislocation will be described with reference to FIG. FIG. 3A shows the initial stage of the growth, FIG. 3B shows the middle of the growth, and FIG. 3C shows the end of the growth. As shown in FIGS. 3A, 3B, and 3C, a growth film 2 grows on the semiconductor substrate 1, and threading dislocations 3 occur in the growth film 2. FIG. 3 (a),
As is clear from (b) and (c), it can be seen that the threading dislocation 3 propagates into the growth film 2 as it elapses, such as at the beginning of growth, during growth, and at the end of growth.

[0005] The threading dislocations 3 adversely affect the characteristics of various types of devices formed in the grown film 2. Therefore, various methods have been proposed to prevent the formation of threading dislocations 3. For example, Journal of the Japan Society of Applied Physics (Applied Physics, 1992, Vol. 61, No. 2,
(Pages 26 to 133) describe a method for reducing threading dislocations generated in the process of heteroepitaxial growth of a GaAs film on a Si substrate.

In various types of heteroepitaxial growth, in particular, the growth of a GaAs film on the above-mentioned Si substrate is extremely important in application, and high quality of the grown film is essential for the application. However, as mentioned in the article of the Journal of the Japan Society of Applied Physics, GaAs
At present, the crystal quality of the s film is still insufficient, and it is particularly desired to reduce the dislocation density.

For this reason, as one of the attempts to suppress the movement of the threading dislocation 3 propagating in the growth film 2 toward the surface of the growth film 2 as shown in FIG. Is known as an insertion film 4 into the growth film 2.

For example, in growing a GaAs film on Si,
In _x Ga _1-x whose lattice constant is slightly different from GaAs
It is effective to alternately insert the As films into the growth film 2 to prevent the dislocation from rising. Such insertion is called insertion of a strained superlattice... Strained layer super lattice (SLS). In this method, as shown in FIGS. 4A and 4B, propagation of dislocations to the surface of the growth film 2 is prevented by two effects, a sweeping effect and a blocking effect.

[0009]

However, the above S
Even with the insertion of LS, the density of threading dislocations reaching the surface of the GaAs film does not become 10 ⁶ / cm ² or less at present. It is considered that this is because the two effects of the sweeping effect and the blocking effect shown in FIGS. 4A and 4B do not sufficiently suppress the motion of the threading dislocation.

Here, the sweeping effect and the blocking effect shown in FIGS. 4A and 4B will be discussed in detail. The sweeping effect is mainly due to a misfit stress due to a difference in lattice constant between the insertion film 4 and the growth film 2. That is, if the rigidity and thickness of the insertion film 4 are G and h, the misfit is f, and the Burgers vector of the threading dislocation is b, the misfit stress ε is approximately (Gfbh).

On the other hand, the blocking effect is mainly attributable to the insertion film 4.
The self energy E of the dislocation 3
_d is approximately proportional to the rigidity G. That, _{E d} is approximately expressed by Gb ^2. Accordingly, the dislocation 3 is blocked by the insertion film 4 as shown in FIG.

That is, in order to enhance both the effects of sweeping and blocking, a substance having a large misfit f and a high rigidity G should be selected as the insertion film 4.

However, when the SLS is inserted in the above-described GaAs / Si combination, since these two parameters are small, especially the rigidity G of the insertion film is small.
The above two effects cannot be sufficiently obtained. Although the hardness of GaAs is 750 kg / mm ² , the hardness of In _x Ga _1-x As falls between these two values because the hardness of InAs is 374 kg / mm ² .

Instead of such SLS insertion, a method has been proposed in which a Si thin film having a high rigidity G is inserted into a GaAs film to suppress the propagation of dislocations to the film surface (see "J. Electrochem"). Soc. "139,
865 (1992)). Here, the hardness of Si is 1100
kg / mm ² .

However, even with this method,
The density of dislocations reaching the surface of the GaAs film is 10 ⁶ / c
m ² or less. It is considered that this is because the two effects described above do not sufficiently act on the suppression of the dislocation movement.

On the other hand, when the threading dislocations that reach the surface of the GsAs film through the insertion film 4 are analyzed in detail by an electron microscope, most of the dislocations that move on the (111) plane in the <211> direction are found. Turned out to be occupied. In addition to the threading dislocation, <11
Some move in the 0> direction. However, it was also found that this was blocked by the insertion film 4 and did not propagate upward.

If the dislocations in the <211> direction reaching the upper part can be moved again to escape from the epitaxially grown film to the outside, the dislocation density in the epitaxially grown film should be greatly reduced. In order to make this possible, the applicant of the present invention has filed a Japanese Patent Application No. 19/1992, entitled "Method of Manufacturing Semiconductor Thin Film" filed on June 18, 1992.
No. 59011. In this method, after the growth of the growth film 2 or the growth of the insertion film 4, the growth is interrupted, the sample is heated at a temperature higher than the growth temperature, the movement of the dislocation is promoted, and the dislocation is released from the epitaxial growth film 2 to the outside. Things. In fact, a decrease in the dislocation density was observed in the sample to which this heat treatment was applied.

However, since dislocations having a high density already exist before the heat treatment, many dislocations react with each other due to the interaction between the dislocations moving during the heat treatment process, and many dislocations are immobilized. Big and small.

Accordingly, it is an object of the present invention to provide a method of manufacturing a semiconductor thin film capable of uniformly reducing the density of threading dislocations.

[0020]

According to the present invention, a first semiconductor heteroepitaxially grown film having a first lattice constant and a first rigidity is formed on a main surface of a semiconductor substrate at a predetermined growth temperature. And a second rigidity greater than the first rigidity and having a second lattice constant with a large difference from the first lattice constant on the first semiconductor heteroepitaxially grown film. A second step of forming a single crystal thin film having the same, and forming a second semiconductor heteroepitaxially grown film having the first lattice constant and the first rigidity on the single crystal film at the predetermined growth temperature. Cutting the first semiconductor heteroepitaxially grown film, the single crystal film, and the second semiconductor heteroepitaxially grown film along a line perpendicular to the main surface; Conductor heteroepitaxial growth layer,
A fourth step of dividing the single crystal film and the second semiconductor heteroepitaxially grown film into a divided first semiconductor heteroepitaxially grown film, a divided single crystal film, and a divided second semiconductor heteroepitaxially grown film;
And heat treating the semiconductor substrate, the divided first semiconductor heteroepitaxially grown film, the divided single crystal film, and the divided second semiconductor heteroepitaxially grown film at a predetermined heat treatment temperature. Wherein the semiconductor substrate is made of Si, the semiconductor heteroepitaxially grown film is a GaAs film, and the single-crystal thin film is a Si layer.

[0021]

Further, according to the present invention, the fourth step includes forming the first semiconductor heteroepitaxially grown film, the single crystal film, and the second semiconductor heteroepitaxially grown film along a line perpendicular to the main surface. Etching the first semiconductor heteroepitaxially grown film, the single crystal film, and the second semiconductor heteroepitaxially grown film into the divided first semiconductor heteroepitaxially grown film, the divided single crystal film, and A method for manufacturing a semiconductor thin film is obtained, which is a step of dividing into the divided second semiconductor heteroepitaxially grown films.

Further, according to the present invention, there is provided a method of manufacturing a semiconductor thin film, wherein the heat treatment temperature is higher than the growth temperature.

Further, according to the present invention, there is provided a method for manufacturing a semiconductor thin film, wherein the thickness of the Si layer as the single crystal thin film is 1 nm or less.

Further, according to the present invention, the divided first
Each of the semiconductor heteroepitaxially grown film, the divided single-crystal film, and the divided second semiconductor heteroepitaxially grown film has a side within a range of 10 μm to 1 cm in a plane parallel to the main surface. A method for manufacturing a semiconductor thin film having a cross section is obtained.

Further, according to the present invention, the fifth step includes the step of
A method for producing a semiconductor thin film, characterized in that the heat treatment temperature is 100 to 900 ° C. and the heat treatment time is 10 seconds to 10 minutes.

[0027]

As described above, according to the present invention, after forming the first and second semiconductor heteroepitaxially grown films sandwiching the insertion film made of the single crystal film, the first and second semiconductor heteroepitaxial growth films are formed in a specific area. The heteroepitaxially grown film is divided and subjected to a heat treatment. By doing so, the reaction between the threading dislocations in the divided regions is reduced, and the distance required for the threading dislocations to escape to the outside of the semiconductor heteroepitaxially grown film is also reduced.
Dislocation density reduction can be achieved very effectively.

The single crystal film having a large rigidity and a misfit has a function of suppressing the movement of dislocations in the film, and the growth film is divided so that the dislocations disappear outside the film in the subsequent heat treatment process. It has the effect of shortening the distance. When these two actions are combined, a great effect can be obtained in reducing the dislocation density. It goes without saying that the effect is reduced only by independent functions.

[0029]

Next, the present invention will be specifically described based on examples.

Embodiment 1 Referring to FIGS. 1 and 2, the Si substrate 5 inclined at 2 ° in the <110> direction on the (001) plane is appropriately subjected to chemical cleaning, and is subjected to a molecular beam crystal growth (MBE) apparatus. After that, the substrate was heated at about 900 ° C. for 15 minutes to remove an oxide film on the substrate surface. Thereafter, at a temperature of 400 ° C., the buffer film 8 of AlAs is
Grown in atomic layers. Thereafter, the GaAs film 6 is heated to a temperature of 600.
At a growth rate of about 1 μm / hour at 1 ° C., a thickness of 1 μm was grown. Next, a Si thin film 7 was grown at a temperature of 250 ° C. to a thickness of 1 nm, and a GaAs film 6 was grown again at 1 μm. Thereafter, a Si thin film 7 was grown 1 μm in the same manner as described above, and a GaAs film 6 was grown 1 μm in the same manner as described above. This result is shown in FIG.

The semiconductor thin film (heteroepitaxially grown film) sample of FIG. 1A produced in this manner was taken out of the MBE chamber, and as shown in FIG.
And the Si thin film 7 are cut along a line perpendicular to the substrate surface by dry etching to form a GaAs film 6 and a Si thin film.
Of the divided GaAs film 6 and divided S
It is divided into i thin films 7. At this time, as shown in FIG. 2, each of the divided GaAs film 6 and Si thin film 7 has one side d and the other side d in a plane parallel to the substrate surface.
′ So as to have a rectangular cross section.

The GaAs film 6 and the Si thin film 7 can be cut by various other means other than the dry etching method. For example, cutting may be performed by cutting.

Thereafter, this sample was placed in a heat treatment apparatus for a short time, heat-treated at 900 ° C. for 10 seconds, and the number of dislocations coming out to the surface of the epitaxial growth film was observed by an etch pit method. As a result, it was confirmed that the dislocation density was 10 ⁴ / cm ² or less in any of the divided regions. Further, when the morphology of the threading dislocation was observed with an electron microscope, it was confirmed that this was the same as in FIGS. 4A and 4B.

Example 2 A heteroepitaxially grown film sample having been grown and divided in the same manner as in Example 1 above was taken out of the MBE chamber, and then placed in a normal electric furnace at a temperature of 800 ° C. for 30 minutes. The dislocation density on the surface of the heteroepitaxially grown film was evaluated by the etch pit method. As a result of the evaluation, it was confirmed that the density of threading dislocations was also 10 ⁴ / cm ² or less.

In the growth described in the first and second embodiments, the maximum thickness of the Si thin film 7 is appropriately 1 nm. If the thickness is more than that, dislocations are generated from the Si thin film 7, which is undesirable. . The growth temperature of the Si thin film 7 is preferably between room temperature and 500 ° C. when there is no As pressure. Further, it was found that the upper limit of the growth temperature of the Si thin film under As pressure was not problematic up to 700 ° C.

It is desirable that the insertion position of the Si thin film 7 be appropriately changed depending on the thickness of the grown film. For example, assuming that the total film thickness is t, 0.2 t and 0.
When inserted at the position of 6t, it was found that the effect was highest. It has also been found that the effect can be further enhanced by inserting a plurality of Si thin films 7 according to the purpose.

In the growth of the first and second embodiments, it is needless to say that any material other than Si that has a high rigidity and a high misfit is effective in reducing the dislocation density. .

In the growth of the first and second embodiments, the area to be divided is such that each of the sides d and d 'is 10 μm or more.
If it is within the range of 1 cm, the value can be selected according to the purpose.

Further, the heat treatment temperature and the heat treatment time can be selected arbitrarily according to the purpose. Especially,
The effect was remarkable in a heat treatment temperature of 800 to 900 ° C. for a heat treatment time of 10 seconds to 10 minutes. In addition, it was found that when a short-time heat treatment was applied, the effect was further improved by repeating the heat treatment a plurality of times. This heat treatment condition is desirably changed depending on the size of the divided area. For example, if one side is 100 μm or less, 60
It was found that heat treatment at 0 ° C. for 10 seconds was sufficiently effective in reducing dislocations.

The first and second embodiments show examples of the most general semiconductor heteroepitaxial growth. In other systems such as the growth of Ge on a Si substrate or the growth of InP on a Si substrate,
It goes without saying that the combined treatment of the Si insertion film, division and heat treatment is effective. In general, it has been found that it has a great effect on suppressing the propagation of dislocations in the heteroepitaxially grown film on the Si substrate to the film surface.

The dislocation suppressing effect by the combined use of the insertion film in the heteroepitaxial growth film and the heat treatment after the division is as follows.
In heteroepitaxial growth on all semiconductor substrates other than the i-substrate, for example, InP / GaAs, GaAs
s / InP, InAs / GaAs, GaAs / InAs
Needless to say, it is also effective in such systems.

[0042]

As described above, according to the present invention, a single crystal having a lattice constant having a large difference from the lattice constant of the grown film and having a rigidity greater than that of the grown film is introduced into the semiconductor heteroepitaxially grown film. By inserting, dividing, and heat-treating the thin film, the motion of the threading dislocation can be sufficiently suppressed, and the dislocation density on the surface of the semiconductor heteroepitaxially grown film can be suppressed to 10 ⁴ / cm ² or less. .

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a method of manufacturing a semiconductor thin film according to one embodiment of the present invention.

FIG. 2 is a plan view illustrating a method for manufacturing a semiconductor thin film according to an embodiment of the present invention.

FIG. 3 is a diagram schematically showing threading dislocations generated during growth of a heteroepitaxially grown film.

FIG. 4 is a diagram showing a sweeping effect and a blocking effect for preventing an increase in threading dislocation.

[Explanation of symbols]

 Reference Signs List 5 Si substrate 6 GaAs film 7 Si thin film 8 AlAs buffer film

Continuation of front page (56) References JP-A-6-77129 (JP, A)

Claims (6)

(57) [Claims] A first step of forming a first semiconductor heteroepitaxially grown film having a first lattice constant and a first rigidity on a main surface of a semiconductor substrate at a predetermined growth temperature; Forming a single crystal thin film having a second lattice constant having a large difference from the first lattice constant and a second rigidity greater than the first rigidity on the semiconductor heteroepitaxially grown film of A step of forming a second semiconductor heteroepitaxially grown film having the first lattice constant and the first rigidity on the single crystal film at the predetermined growth temperature; Cutting the semiconductor heteroepitaxially grown film, the single crystal film, and the second semiconductor heteroepitaxially grown film along a line perpendicular to the main surface to form the first semiconductor heteroepitaxially grown film Dividing the single crystal film and the second semiconductor heteroepitaxially grown film into a first semiconductor heteroepitaxially grown film, a divided single crystal film, and a second divided semiconductor heteroepitaxially grown film. Step 4, the semiconductor substrate, the divided first semiconductor heteroepitaxially grown film,
A fifth step of heat-treating the divided single crystal film and the divided second semiconductor heteroepitaxially grown film at a predetermined heat treatment temperature, wherein the semiconductor substrate is
i, wherein the semiconductor heteroepitaxially grown film is a GaAs film and the single crystal thin film is a Si layer. 2. The method of manufacturing a semiconductor thin film according to claim 1, wherein said fourth step includes forming said first semiconductor heteroepitaxially grown film, said single crystal film, and said second semiconductor heteroepitaxially grown film as said main part. The first semiconductor heteroepitaxially grown film, the single crystal film, and the second semiconductor heteroepitaxially grown film are etched along a line perpendicular to the surface to form the first divided semiconductor heteroepitaxially grown film.
Dividing the semiconductor heteroepitaxially grown film into the divided single crystal film and the divided second semiconductor heteroepitaxially grown film. 3. The method according to claim 1, wherein the heat treatment temperature is higher than the growth temperature. 4. The method of manufacturing a semiconductor thin film according to claim 1, wherein the thickness of the Si layer as the single crystal thin film is 1 nm or less. 5. The method for manufacturing a semiconductor thin film according to claim 1, wherein the divided first semiconductor heteroepitaxially grown film, the divided single crystal film, and the divided second semiconductor heteroepitaxially grown film are formed. Each has a side of 10 μm in a plane parallel to the main surface.
A method of manufacturing a semiconductor thin film, having a rectangular cross section in a range of 1 cm to 1 cm. 6. The method for manufacturing a semiconductor thin film according to claim 1, wherein the fifth step is performed at a heat treatment temperature of 600 to 900 ° C. and a heat treatment time of 10 seconds to 10 minutes. Production method.