JP2737053B2 - Gallium nitride based compound semiconductor light emitting device - Google Patents

Gallium nitride based compound semiconductor light emitting device

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Publication number
JP2737053B2
JP2737053B2 JP35898896A JP35898896A JP2737053B2 JP 2737053 B2 JP2737053 B2 JP 2737053B2 JP 35898896 A JP35898896 A JP 35898896A JP 35898896 A JP35898896 A JP 35898896A JP 2737053 B2 JP2737053 B2 JP 2737053B2
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Prior art keywords
layer
type semiconductor
semiconductor layer
type
substrate
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JPH09172200A (en
Inventor
伸夫 岡崎
勝英 真部
勇 赤崎
浩 天野
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Toyoda Gosei Co Ltd
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Toyoda Gosei Co Ltd
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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、可視単波長、特に、青
色領域から紫色領域まで、及び紫外光領域で発光可能な
半導体発光素子に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device capable of emitting light in a visible single wavelength, particularly in a blue to violet region and in an ultraviolet region.

【0002】本発明の半導体発光素子は、本発明者らに
より得られた((AlxGa1-x)yIn1-yN:0 ≦x ≦1,0 ≦y ≦
1)から成るp型半導体層と導電率の制御されたn型半導
体層とを用いた新しい構造の発光素子である。
The semiconductor light emitting device of the present invention is obtained by the present inventors by using ((Al x Ga 1 -x ) y In 1 -y N: 0 ≤ x ≤ 1,0 ≤ y ≤
This is a light emitting device having a new structure using a p-type semiconductor layer composed of 1) and an n-type semiconductor layer with controlled conductivity.

【0003】[0003]

【従来技術】現在、実用化されている最短波長の電流注
入型半導体発光素子は、リン化インジウムガリウムアル
ミニウム(InGaAlP)系結晶により作製されている。その
発振波長は可視長波長領域、即ち、赤色領域である0.6
〜0.7 μm帯に属する。
2. Description of the Related Art Currently, the shortest wavelength current injection type semiconductor light emitting device which is practically used is made of indium gallium aluminum phosphide (InGaAlP) based crystal. Its oscillation wavelength is in the visible long wavelength region, i.e., in the red region of 0.6.
It belongs to the band of 0.7 μm.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、更に、
短波長である青色、紫色領域或いは紫外光領域での発光
が可能な半導体発光素子を実現するのは、この材料では
物性上困難である。より広い禁制帯幅を持つ半導体材料
を用いる必要がある。(AlxGa1-x)yIn1-yN はその候補の
一つである。
However, further,
It is difficult to realize a semiconductor light emitting device capable of emitting light in a blue, violet, or ultraviolet region, which is a short wavelength, in terms of physical properties. It is necessary to use a semiconductor material having a wider band gap. (Al x Ga 1-x ) y In 1-y N is one of the candidates.

【0005】(AlxGa1-x)yIn1-yN )、特に、GaN は室温
(300K)で光励起により誘導放出することが確認されてい
る(H. Amano 等;Japanese Journal of Applied Physics
第29巻1990年 L205-L206頁)。このことから、上記半
導体を用いてレーザやLED等の発光素子が構成できる
可能性がある。
[0005] (Al x Ga 1-x ) y In 1-y N), in particular, GaN
(300K) has been confirmed to be stimulated emission by photoexcitation (H. Amano et al .; Japanese Journal of Applied Physics)
Vol. 29, 1990, pp. L205-L206). Therefore, there is a possibility that a light emitting element such as a laser or an LED can be formed using the semiconductor.

【0006】しかしながら、上記系統の化合物半導体は
p型単結晶薄膜の作製が困難であり、低抵抗のp型(Alx
Ga1-x)yIn1-yN 半導体を用いた発光効率の高い電流注入
による発光素子の実現が困難である。
However, it is difficult to produce a p-type single crystal thin film from the above-mentioned compound semiconductors, and a low-resistance p-type (Al x
It is difficult to realize a light emitting element by current injection with high luminous efficiency using a Ga 1-x ) y In 1-y N semiconductor.

【0007】本発明は、上記の課題を解決するために成
されたものであり、その目的とするところは、短波長で
ある青色、紫色領域或いは紫外光領域における発光効率
の高い発光素子を得ることである。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a light-emitting element having a high luminous efficiency in a short-wavelength blue, violet or ultraviolet region. That is.

【0008】[0008]

【課題を解決するための手段】請求項1の発明は、禁制
帯幅の比較的小さな半導体から成る発光層を挟むように
その両側に各々禁制帯幅の大きなn型半導体層及びp型
半導体層を接合した窒化ガリウム系化合物半導体発光素
子において、基板と基板上にn型半導体層の成長温度
よりも低い温度で形成された緩衝層と、緩衝層上に形成
され、シリコン(Si)をドープした窒化ガリウム系化合物
半導体から成るn型半導体層と、n型半導体層の上に形
成されたノンドープの窒化ガリウム系化合物半導体から
成る発光層と、発光層の上に形成され、マグネシウム(M
g)をドープし、低抵抗化処理した窒化ガリウム系化合物
半導体から成るp型半導体層とを有することを特徴とす
る。
According to a first aspect of the present invention, an n-type semiconductor layer and a p-type semiconductor layer each having a large forbidden band are provided on both sides of a light emitting layer made of a semiconductor having a relatively small forbidden band. In a gallium nitride-based compound semiconductor light emitting device having a substrate and a growth temperature of an n-type semiconductor layer on the substrate
Buffer layer formed at lower temperature and formed on buffer layer
Gallium nitride-based compound doped with silicon (Si)
An n-type semiconductor layer made of a semiconductor, and a
From undoped gallium nitride-based compound semiconductor
A light-emitting layer consisting of magnesium (M
g) doped gallium nitride-based compound
A p-type semiconductor layer made of a semiconductor .

【0009】又、請求項2の発明は、緩衝層を3族窒化
物半導体で構成したことを特徴とする。又、請求項3の
発明は、n型半導体層、p型半導体層、発光層を、それ
ぞれ、組成比の異なる((AlxGa1-x)yIn1-yN:0 ≦x ≦1,
0≦y ≦1)としたことを特徴とする。又、請求項4の
明はサファイア、Si、6H-SiC又はGaN から成る基板を有
することを特徴とする。さらに、請求項5の発明は、
型半導体層又はp型半導体層とそれぞれの電極との間に
高キャリア濃度の層を設けたことを特徴とする。
The invention according to claim 2 is characterized in that the buffer layer is made of a group III nitride semiconductor. According to a third aspect of the present invention, the n-type semiconductor layer, the p-type semiconductor layer, and the light emitting layer have different composition ratios ((Al x Ga 1 -x ) y In 1 -y N: 0). ≤x ≤1,
0 ≦ y ≦ 1). The invention according to claim 4 is characterized in that the device has a substrate made of sapphire, Si, 6H-SiC or GaN. Further, the invention according to claim 5 is characterized in that n
Type semiconductor layer or p-type semiconductor layer and each electrode
A high carrier concentration layer is provided.

【0010】[0010]

【作用及び効果】((AlxGa1-x)yIn1-yN:0≦x≦1,0 ≦y
≦1)半導体において、本発明者等により、低抵抗のp型
伝導性を示す層及び伝導率が所望の値に設定可能なn型
伝導性を示す層の製作が可能となった。これにより、上
記の窒化ガリウム系化合物半導体で構成された発光効率
の高いキャリア注入型の発光素子の製作と発光が可能と
なった。又、発光層をノンドープとしたので、バンド端
発光となり、発光スペクトルの半値幅が狭くなると共に
発光効率を向上させることができた。又、n型半導体層
の成長温度よりも低い温度で形成された緩衝層を基板上
に形成し、その緩衝層の上にn型半導体層を形成してい
るため、その上に順次形成される層の結晶性を向上させ
ることができた。その結果、Si添加のn型半導体層にお
いて低い導電率を制御性良く得ることができ、Mg添加の
p型半導体層の低抵抗率にすることができる。又、n型
半導体層にSiが添加されてn型半導体層の結晶性が低下
する結果、p型半導体層の結晶性が劣化するところ、発
光層をノンドープとしているので、p型半導体層の結晶
性を向上でき、よりp型低抵抗が得られる。 これらの結
果、発光層に対してn型半導体層から電子が効率良く注
入され、p型半導体層から正孔が効率良く注入される。
又、n型半導体層又はp型半導体層とそれぞれの電極と
の間に高キャリア濃度の層を設けることで、電極のオー
ミック特性を改善させることができる。
[Action and Effect] ((Al x Ga 1-x ) y In 1-y N: 0 ≦ x ≦ 1,0 ≦ y
≦ 1) In semiconductors, the present inventors have made it possible to produce a layer having low resistance and exhibiting p-type conductivity and a layer exhibiting n-type conductivity whose conductivity can be set to a desired value. As a result, it has become possible to manufacture and emit a light emitting element of a carrier injection type having a high luminous efficiency and made of the above gallium nitride-based compound semiconductor. In addition, since the light emitting layer was non-doped, the light emitted at the band edge was emitted, so that the half width of the light emission spectrum was narrowed and the light emission efficiency was improved. Also, an n-type semiconductor layer
Buffer layer formed at a temperature lower than the growth temperature
And an n-type semiconductor layer is formed on the buffer layer.
Therefore, the crystallinity of the layers sequentially formed thereon is improved.
I was able to. As a result, the Si-added n-type semiconductor layer
Low conductivity can be obtained with good controllability.
The resistivity of the p-type semiconductor layer can be reduced. Also, n-type
Addition of Si to semiconductor layer lowers crystallinity of n-type semiconductor layer
As a result, when the crystallinity of the p-type semiconductor layer is deteriorated,
Since the optical layer is non-doped, the crystal of the p-type semiconductor layer
Properties can be improved and a p-type low resistance can be obtained. These conclusions
As a result, electrons are efficiently injected from the n-type semiconductor layer to the light emitting layer.
And holes are efficiently injected from the p-type semiconductor layer.
Also, an n-type semiconductor layer or a p-type semiconductor layer and respective electrodes
By providing a layer with a high carrier concentration between
Mic characteristics can be improved.

【0011】本発明のようにp型化処理による(AlxGa
1-x)yIn1-yN のp型化効果と、n型の導電率を制御可能
とし、発光層をノンドープとすることにより、青色から
紫色及び紫外光領域の発光波長と高い発光強度を有する
スペクトル半値幅の狭い半導体発光素子が実現された。
According to the present invention, (Al x Ga
1-x ) y In 1-y N N - type conductivity and n-type conductivity can be controlled, and the emission layer is non-doped, so that the emission wavelength and high emission intensity in the blue to purple and ultraviolet regions A semiconductor light emitting device having a narrow spectral half width having the following characteristics is realized.

【0012】[0012]

【発明の概要】上記発明において、窒化アルミニウムガ
リウムインジウム(AlxGa1-x)yIn1-yN単結晶作製用基板
には、サファイア, 珪素(Si),6H 炭化珪素(6H-SiC)ない
し窒化ガリウム(GaN) を用いることができる。
SUMMARY OF THE INVENTION In the above invention, sapphire, silicon (Si), 6H silicon carbide (6H-SiC) is used as the substrate for preparing aluminum gallium indium nitride (Al x Ga 1 -x ) y In 1 -y N single crystal. Alternatively, gallium nitride (GaN) can be used.

【0013】サファイアを基板とする場合には少なくと
も低温(例えば約600 ℃) で堆積した、例えば、AlN 薄
膜を含む層を緩衝層とするのが望ましい。
When sapphire is used as the substrate, it is preferable that the buffer layer be a layer containing, for example, an AlN thin film deposited at least at a low temperature (eg, about 600 ° C.).

【0014】Siを基板とする場合には少なくとも3C-SiC
薄膜一層か或いは3C-SiC薄膜及びAlN 薄膜の二層を含む
層を緩衝層とするのが望ましい。
When Si is used as a substrate, at least 3C-SiC
It is desirable that the buffer layer be a thin film or a layer including two layers of a 3C-SiC thin film and an AlN thin film.

【0015】6H-SiCを基板とする場合には直接ないしGa
N を緩衝層とするのが望ましい。GaN を基板とする場合
には直接単結晶作製が行なわれる。Si,6H-SiC 及びGaN
を基板とする場合にはn型単結晶が用いられる。
When 6H-SiC is used as a substrate, it is not directly or Ga
It is desirable that N be a buffer layer. When GaN is used as a substrate, a single crystal is directly produced. Si, 6H-SiC and GaN
Is used as a substrate, an n-type single crystal is used.

【0016】まず、同一組成同士の結晶によるpn接合
構造を作製する場合につき述べる。サファイアを基板と
する場合、(AlxGa1-x)yIn1-yN を成長させる直前に、基
板温度を所望の値(例えば 600℃)に設定し、成長炉内
に少なくともアルミニウム(Al)を含む化合物及び窒素の
水酸化物を導入し、サファイア基板表面にAlN 薄膜緩衝
層を形成する。
First, the case of producing a pn junction structure using crystals of the same composition will be described. When sapphire is used as the substrate, the substrate temperature is set to a desired value (for example, 600 ° C.) immediately before (Al x Ga 1-x ) y In 1-y N is grown, and at least aluminum (Al) is introduced into the growth furnace. ) And a hydroxide of nitrogen are introduced to form an AlN thin film buffer layer on the sapphire substrate surface.

【0017】その後、Alを含む化合物の導入を止め、基
板温度の再設定を行う。そして、所望の混晶組成となる
ようにAlを含む化合物、ガリウム(Ga)を含む化合物及び
インジウム(In)を含む化合物を導入してn型(AlxGa1-x)
yIn1-yN 単結晶の成長を行う。
Thereafter, the introduction of the compound containing Al is stopped, and the substrate temperature is reset. Then, a compound containing Al, a compound containing gallium (Ga) and a compound containing indium (In) are introduced so as to have a desired mixed crystal composition, and n-type (Al x Ga 1-x ) is introduced.
y In 1-y N A single crystal is grown.

【0018】なお、この場合n型単結晶の抵抗率を下げ
るためにSi, 酸素(O),硫黄(S),セレン(Se), テルル(Te)
などドナー不純物となる元素を含む化合物を同時に導入
しても良い。
In this case, in order to lower the resistivity of the n-type single crystal, Si, oxygen (O), sulfur (S), selenium (Se), tellurium (Te) are used.
For example, a compound containing an element serving as a donor impurity may be introduced at the same time.

【0019】ドナー不純物をドーピングする場合、その
濃度に関してはn層に均一にドーピングしても良い。
又、n層のオーム性電極形成を容易にするためにn層成
長初期に高濃度にドーピングし、pn接合付近ではドー
ピングしないか或いは低濃度にドーピングしても良い。
In the case of doping with a donor impurity, the concentration may be uniform in the n-layer.
Further, in order to facilitate the formation of the n-layer ohmic electrode, the n-layer may be doped at a high concentration at the initial stage of growth and may not be doped near the pn junction or may be doped at a low concentration.

【0020】次に、一度、ウエハを成長炉から取り出
し、試料表面の一部を選択成長用マスクとなる物質、例
えば酸化珪素(SiO2 ) により覆い、再びウエハを成長炉
に戻す。又は、ウエハを取り出さずそのまま成長を続け
る。
Next, the wafer is once taken out of the growth furnace, a part of the sample surface is covered with a material serving as a mask for selective growth, for example, silicon oxide (SiO 2 ), and the wafer is returned to the growth furnace again. Alternatively, the growth is continued without taking out the wafer.

【0021】少なくとも所望の混晶組成となるようなAl
を含む化合物、Gaを含む化合物、Inを含む化合物及び窒
素の水素化物及びアクセプタ不純物となる元素、例えば
ベリリウム(Be), マグネシウム(Mg), 亜鉛(Zn), カドミ
ウム(cd), 炭素(C) を含む化合物を成長炉に導入してア
クセプタ不純物をドープした(AlxGa1-x)yIn1-yN 単結晶
(p層) の成長を行う。
At least Al having a desired mixed crystal composition
, Compounds containing Ga, compounds containing In and compounds that become hydrides and acceptor impurities of nitrogen, such as beryllium (Be), magnesium (Mg), zinc (Zn), cadmium (cd), and carbon (C). Is introduced into a growth furnace to grow an (Al x Ga 1 -x ) y In 1 -y N single crystal (p layer) doped with acceptor impurities.

【0022】アクセプタドープ層の成長膜厚は電子線照
射処理する場合の電子線侵入長を考慮して決定する。次
にウェハを成長炉から取り出し、アクセプタドープ(Alx
Ga1-x)yIn1-yN 層の電子線照射処理を行う。
The growth thickness of the acceptor-doped layer is determined in consideration of the penetration depth of the electron beam when performing the electron beam irradiation treatment. Next, the wafer is taken out of the growth furnace, and the acceptor dope (Al x
Ga 1-x ) y In 1-y N layer is irradiated with an electron beam.

【0023】電子線照射処理する領域は試料表面全体或
いは一部、例えば短冊状とする。試料表面全体に電子線
を照射する場合には、更に、アクセプタドープ層(p
層)の上に絶縁層を堆積し、その絶縁層の一部に短冊状
の窓を開け、その窓の上に金属を接触させ、p層に対す
るオーム性電極を形成する。短冊状に電子線照射処理す
る場合には、電子線の照射された領域の一部或いは全部
を覆うように金属を接触させ、p層に対するオーム性電
極を形成する。
The region to be irradiated with the electron beam is formed on the whole or a part of the sample surface, for example, in a strip shape. When the entire sample surface is irradiated with an electron beam, the acceptor-doped layer (p
An insulating layer is deposited on the layer, a strip-shaped window is opened in a part of the insulating layer, and a metal is contacted on the window to form an ohmic electrode for the p-layer. In the case where the electron beam irradiation treatment is performed in a strip shape, a metal is contacted so as to cover a part or the whole of the region irradiated with the electron beam, and an ohmic electrode for the p layer is formed.

【0024】最終的に、p層と金属の接触する部分の形
状は短冊である。もちろん、面発光とする場合には電極
の形状は素子の略上面に等しい矩形形状としても良い。
n層の電極は選択成長用マスクを取り外して、その後に
形成するか、或いはアクセプタドープ層(p層)の一部
を表面側からエッチングして下層のn層に対して窓を開
け、金属を接触させオーム性電極を形成する。
Finally, the shape of the portion where the metal contacts the p layer is a strip. Of course, in the case of surface emission, the shape of the electrode may be a rectangular shape which is substantially equal to the upper surface of the element.
The electrode for the n-layer is formed after removing the mask for selective growth and thereafter, or a part of the acceptor-doped layer (p-layer) is etched from the surface side to open a window for the lower n-layer, and a metal is formed. The contact is made to form an ohmic electrode.

【0025】n型のSi、6H-SiC或いはGaN を基板として
用いる場合もほぼ同様の手段により素子作製を行う。し
かし、選択成長技術は用いず、p層とn層に対する電極
は素子の上下の両側に形成する。即ち、n層電極は基板
裏面全体に金属を接触させオーム性電極を形成する。
When n-type Si, 6H-SiC or GaN is used as a substrate, the device is manufactured by substantially the same means. However, the selective growth technique is not used, and the electrodes for the p layer and the n layer are formed on both the upper and lower sides of the device. That is, the n-layer electrode contacts the metal on the entire back surface of the substrate to form an ohmic electrode.

【0026】以上が同一組成の結晶によるpn接合構造
の半導体発光素子を作製する場合の基本的方法である。
異種混晶組成の結晶の接合、いわゆるヘテロ接合を利用
した素子を作製する場合にも、pn接合を形成するとい
う点では上記同一混晶組成の結晶の接合を利用する場合
と同様である。
The above is the basic method for manufacturing a semiconductor light emitting device having a pn junction structure using crystals of the same composition.
Also in the case of manufacturing a device using a junction of crystals of different mixed crystal compositions, that is, a so-called hetero junction, the formation of a pn junction is the same as the case of using the above-described junction of crystals of the same mixed crystal composition.

【0027】単一のヘテロ接合を形成する場合、同一混
晶組成の結晶によるpn接合に加え、更にn層側に禁制
帯幅が大きいn型の結晶を接合して少数キャリアである
正孔の拡散阻止層とする。
When a single heterojunction is formed, in addition to a pn junction formed of crystals having the same mixed crystal composition, an n-type crystal having a large forbidden band width is further joined to the n-layer to form holes serving as minority carriers. A diffusion blocking layer.

【0028】(AlxGa1-x)yIn1-yN 系単結晶の禁制帯幅付
近の発光はn層で特に強いため、発光層はn型結晶を用
いることが望ましい。(AlxGa1-x)yIn1-yN 系単結晶のバ
ンド構造は(AlxGa1-x)yIn1-yAs系単結晶や(AlxGa1-x)yI
n1-yP 系単結晶と似ており、バンド不連続の割合は価電
子帯よりも伝導帯の方が大きいと考えられる。しかし、
(AlxGa1-x)yIn1-yN 系単結晶では正孔の有効質量が比較
的大きいためn型同士のヘテロ接合は正孔拡散阻止とし
て有効に作用する。
Since the light emission near the forbidden band width of the (Al x Ga 1 -x ) y In 1 -y N based single crystal is particularly strong in the n-layer, it is desirable to use an n-type crystal for the light-emitting layer. The band structure of the (Al x Ga 1-x ) y In 1-y N-based single crystal is (Al x Ga 1-x ) y In 1-y As-based single crystal or (Al x Ga 1-x ) y I
It is similar to the n 1-y P system single crystal, and it is considered that the ratio of band discontinuity is larger in the conduction band than in the valence band. But,
In an (Al x Ga 1 -x ) y In 1 -y N based single crystal, the effective mass of holes is relatively large, so that the n-type heterojunction effectively acts as a hole diffusion inhibitor.

【0029】二つのヘテロ接合を形成する場合、禁制帯
幅の比較的小さいn型の結晶の両側に各々禁制帯幅の大
きいn型及びp型の結晶を接合し禁制帯幅の小さいn型
の結晶を挟む構造とする。
When two heterojunctions are formed, n-type and p-type crystals having a large forbidden band are joined to both sides of an n-type crystal having a relatively small forbidden band, respectively. The structure sandwiches the crystal.

【0030】多数のヘテロ接合を形成する場合、n型の
比較的禁制帯幅の大きい薄膜結晶と比較的禁制帯幅の小
さい薄膜結晶を複数接合し、その両側にそれぞれ更に禁
制帯幅の大きいn型及びp型の結晶を接合し、多数のヘ
テロ接合を挟む。
When a large number of heterojunctions are formed, a plurality of thin film crystals of an n-type having a relatively large forbidden band width and a plurality of thin film crystals of a relatively small forbidden band width are joined to each other, and n is formed on both sides thereof. Type and p-type crystals are joined to sandwich a number of heterojunctions.

【0031】(AlxGa1-x)yIn1-yN 系単結晶の禁制帯幅付
近での光の屈折率は禁制帯幅が小さい程大きいため、他
の(AlxGa1-x)yIn1-yAs系単結晶や(AlxGa1-x)yIn1-yP 系
単結晶による半導体発光素子と同様、禁制帯幅の大きい
結晶で挟むヘテロ構造は光の閉じ込めにも効果がある。
又、発光層をノンドープとしたので、発光がバンド端発
光となり、発光効率が高く且つスペクトル半値幅の狭い
発光が可能となる。
Since the refractive index of light near the forbidden band width of the (Al x Ga 1-x ) y In 1-y N-based single crystal is larger as the forbidden band width is smaller, the other (Al x Ga 1-x) As in semiconductor light-emitting devices using y In 1-y As-based single crystals or (Al x Ga 1-x ) y In 1-y P-based single crystals, a heterostructure sandwiched between crystals with a large bandgap can confine light. Is also effective.
In addition, since the light emitting layer is non-doped, light emission becomes band edge light emission, and light emission with high luminous efficiency and a narrow spectrum half width can be achieved.

【0032】ヘテロ接合を利用する場合も、同一組成の
結晶によるpn接合の場合と同様に、オーム性電極組成
を容易にするため電極と接触する部分付近のキャリア濃
度は高濃度にしても良い。
In the case where a hetero junction is used, the carrier concentration in the vicinity of the portion in contact with the electrode may be made high to facilitate the composition of the ohmic electrode, as in the case of a pn junction made of crystals of the same composition.

【0033】n型結晶のキャリア濃度はドナー不純物の
ドーピング濃度により、またp型結晶のキャリア濃度は
アクセプタ不純物のドーピング濃度及び電子線照射処理
条件により制御する。又、特にオーム性電極形成を容易
にするため高キャリア濃度実現が容易な結晶を金属との
接触用に更に接合してもよい。
The carrier concentration of the n-type crystal is controlled by the doping concentration of the donor impurity, and the carrier concentration of the p-type crystal is controlled by the doping concentration of the acceptor impurity and the electron beam irradiation processing conditions. In addition, in order to facilitate the formation of an ohmic electrode, a crystal which can easily realize a high carrier concentration may be further bonded for contact with a metal.

【0034】[0034]

【実施例】以下、本発明を具体的な実施例に基づいて説
明する。((AlxGa1-x)yIn1-yN:0≦x≦1,0≦y≦1)半導体
発光素子用単結晶の作製には横型有機金属化合物気相成
長装置を用いた。以下基板としてサファイア,Si,6H-S
iC及びGaN を用いた場合各々について成長手順を示す。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to specific embodiments. ((Al x Ga 1-x ) y In 1-y N: 0 ≦ x ≦ 1, 0 ≦ y ≦ 1) A lateral organometallic compound vapor phase epitaxy apparatus was used for producing a single crystal for a semiconductor light emitting device. Sapphire, Si, 6H-S as substrate below
The growth procedure is shown for each of iC and GaN.

【0035】(1) サファイア基板の場合 図1は、サファイア基板を用いた半導体発光素子の構造
を示した断面図である。図1において、(0001)面を結晶
成長面とするサファイア基板1を有機洗浄の後、結晶成
長装置の結晶成長部に設置する。成長炉を真空排気の
後、水素を供給し1200℃程度まで昇温する。これにより
サファイア基板1の表面に付着していた炭化水素系ガス
がある程度取り除かれる。
(1) Sapphire Substrate FIG. 1 is a sectional view showing the structure of a semiconductor light emitting device using a sapphire substrate. In FIG. 1, a sapphire substrate 1 having a (0001) plane as a crystal growth surface is organically washed and then placed in a crystal growth section of a crystal growth apparatus. After evacuation of the growth furnace, hydrogen is supplied and the temperature is raised to about 1200 ° C. Thus, the hydrocarbon-based gas adhering to the surface of the sapphire substrate 1 is removed to some extent.

【0036】次に、サファイア基板1の温度を 600℃程
度まで降温し、トリメチルアルミニウム(TMA) 及びアン
モニア(NH3) を供給して、サファイア基板1上に50nm程
度の膜厚を持つAlN 層2を形成する。次に、TMA の供給
のみを止め、基板温度を1040℃まで上げ、TMA,トリメチ
ルガリウム(TMG) 及びシラン(SiH4 ) を供給しSiドープ
n型GaAlN 層3(n型半導体層)を成長する。
Next, the temperature of the sapphire substrate 1 is lowered to about 600 ° C., trimethylaluminum (TMA) and ammonia (NH 3 ) are supplied, and the AlN layer 2 having a thickness of about 50 nm is formed on the sapphire substrate 1. To form Next, only the supply of TMA is stopped, the substrate temperature is raised to 1040 ° C., and TMA, trimethylgallium (TMG) and silane (SiH 4 ) are supplied to grow the Si-doped n-type GaAlN layer 3 (n-type semiconductor layer). .

【0037】一旦、ウェハを成長炉から取り出し、GaAl
N 層3の表面の一部をSiO2でマスクした後、再び成長炉
に戻して真空排気して水素及びNH3 を供給し1040℃まで
昇温する。次に、TMG だけを供給して、SiO2でマスクさ
れていない部分に厚さ 0.5μmのGaN 層4を成長させ
る。これにより、ノンドープの発光層が得られる。次
に、TMA 及びビスシクロペンタディエニルマクネシウム
(Cp2Mg) を更に供給してドープGaAlN 層5(p型半導体
層)を 0.5μm成長する。
Once the wafer is removed from the growth furnace, GaAl
After masking a part of the surface of the N layer 3 with SiO 2, it is returned to the growth furnace again, evacuated, supplied with hydrogen and NH 3 , and heated to 1040 ° C. Next, by supplying only TMG, a GaN layer 4 having a thickness of 0.5 μm is grown in a portion not masked with SiO 2 . Thereby, a non-doped light emitting layer is obtained. Next, TMA and biscyclopentadienyl magnesium
(Cp 2 Mg) is further supplied to grow the doped GaAlN layer 5 (p-type semiconductor layer) to 0.5 μm.

【0038】次に、マスクとして使用したSiO2を弗酸系
エッチャントにより除去する。次に、ドープGaAlN 層5
(p型半導体層)上にSiO2層7を堆積した後、縦1mm、
横50μmの短冊状に窓7Aを開け、真空チャンバに移し
て、ドープGaAlN 層5(p型半導体層)に電子線照射処
理を行う。典型的な電子線照射処理条件を表に示す。
Next, the SiO 2 used as the mask is removed with a hydrofluoric acid-based etchant. Next, the doped GaAlN layer 5
After depositing the SiO 2 layer 7 on the (p-type semiconductor layer),
The window 7A is opened in a 50 μm-wide strip shape, moved to a vacuum chamber, and the doped GaAlN layer 5 (p-type semiconductor layer) is irradiated with an electron beam. Tables show typical electron beam irradiation processing conditions.

【表1】 [Table 1]

【0039】次に、ドープGaAlN 層5(p型半導体層)
の窓8の部分と、Siドープn型GaAlN 層3(n型半導体
層)に、それぞれ、金属電極を形成する。結晶成長は以
上である。
Next, the doped GaAlN layer 5 (p-type semiconductor layer)
Metal electrodes are respectively formed on the window 8 and the Si-doped n-type GaAlN layer 3 (n-type semiconductor layer). This is the end of the crystal growth.

【0040】(2)Si 基板の場合 Si基板上に作成した発光素子の構造を図2に示す。低抵
抗n型Siの(111) 面基板8を有機洗浄の後、弗酸系エッ
チャントにより表面の酸化物を取り除き結晶成長部に設
置する。成長炉を真空排気の後水素を導入し基板を1000
℃まで昇温して、基板8の表面を洗浄化し、更に、プロ
パン(C3H8) 又はアセチレン(C2H2 ) を供給する。これ
により表面に3C-SiC薄膜9が形成される。
(2) In the case of Si substrate FIG. 2 shows the structure of the light emitting device formed on the Si substrate. After the low-resistance n-type Si (111) surface substrate 8 is organically cleaned, the surface oxide is removed by a hydrofluoric acid-based etchant and the substrate 8 is placed on the crystal growth portion. After evacuation of the growth furnace, hydrogen was introduced and the substrate 1000
The temperature of the substrate 8 was increased to a temperature of ℃ to clean the surface of the substrate 8, and then propane (C 3 H 8 ) or acetylene (C 2 H 2 ) was supplied. Thereby, a 3C-SiC thin film 9 is formed on the surface.

【0041】この後、成長炉内を一旦真空排気して余分
なガスを取り除く。次に成長炉に水素を供給し基板温度
を 600℃にし、TMA 及びNH3 を供給してAlN 薄膜10を
3C-SiC薄膜9上に形成する。次に、TMA の供給のみを止
め基板温度を1040℃にして、TMG,TMA 及びSiH4を供給し
てシリコンドープのn型GaAlN 層11(n型半導体層)
を成長する。
Thereafter, the inside of the growth furnace is once evacuated to remove excess gas. Next, hydrogen is supplied to the growth furnace to set the substrate temperature to 600 ° C., and TMA and NH 3 are supplied to remove the AlN thin film 10.
It is formed on the 3C-SiC thin film 9. Next, only the supply of TMA is stopped, the substrate temperature is set to 1040 ° C., and TMG, TMA and SiH 4 are supplied to supply the silicon-doped n-type GaAlN layer 11 (n-type semiconductor layer).
Grow.

【0042】次に、TMA 及びSiH4のみの供給を止めGaN
層12を 0.5μm成長した。これにより、ノンドープの
発光層を形成した。次に、TMA 及びCP2Mg を加えMgドー
プGaAlN 層13(p型半導体層)を 0.5μm成長する。
次に、MgドープGaAlN 層13(p型半導体層)上にSiO2
層15を堆積した後、縦1mm、横50μmの短冊状に窓1
5Aを開け、真空チャンバに移して、MgドープGaAlN 層
13(p型半導体層)に電子線を照射する。電子線の照
射条件は前実施例と同様である。その後、SiO2層15側
からMgドープGaAlN 層13(p型半導体層)に対する電
極14Aを形成し、他方、基板8の裏面にn型GaAlN 層
11(n型半導体層)に対する電極14Bを形成した。
Next, the supply of only TMA and SiH 4 was stopped and GaN
Layer 12 was grown 0.5 μm. Thus, a non-doped light emitting layer was formed. Next, TMA and CP 2 Mg are added, and a Mg-doped GaAlN layer 13 (p-type semiconductor layer) is grown to a thickness of 0.5 μm.
Next, SiO 2 is deposited on the Mg-doped GaAlN layer 13 (p-type semiconductor layer).
After the layer 15 is deposited, the window 1 is formed into a strip 1 mm long and 50 μm wide.
5A is opened, transferred to a vacuum chamber, and the Mg-doped GaAlN layer 13 (p-type semiconductor layer) is irradiated with an electron beam. The irradiation conditions of the electron beam are the same as in the previous embodiment. Thereafter, an electrode 14A for the Mg-doped GaAlN layer 13 (p-type semiconductor layer) was formed from the SiO 2 layer 15 side, and an electrode 14B for the n-type GaAlN layer 11 (n-type semiconductor layer) was formed on the back surface of the substrate 8. .

【0043】(3)6H-SiC 基板の場合 6H-SiC基板上に作成した発光素子を図3に示す。低抵抗
n型6H-SiCの(0001)面基板16を有機洗浄の後、王水系
エッチャントによりエッチングの後、結晶成長部に設置
する。成長炉を真空排気の後、水素を供給し、1200℃ま
で昇温する。次に、成長炉に水素を供給し基板温度を10
40℃にして、TMG,SiH4及びNH3 を供給してn型GaN 緩衝
層17を 0.5〜 1μm程度成長する。次に、TMA を加
え、n型GaN 緩衝層17の上にn型GaAlN 層18(n型
半導体層)を成長する。
(3) In the case of 6H-SiC substrate FIG. 3 shows a light emitting device formed on a 6H-SiC substrate. The (0001) plane substrate 16 of the low-resistance n-type 6H-SiC is organically cleaned, etched with an aqua regia etchant, and then placed in a crystal growth part. After evacuation of the growth furnace, hydrogen is supplied and the temperature is increased to 1200 ° C. Next, hydrogen was supplied to the growth furnace and the substrate temperature was set at 10
At 40 ° C., TMG, SiH 4 and NH 3 are supplied to grow the n-type GaN buffer layer 17 to about 0.5 to 1 μm. Next, TMA is added to grow an n-type GaAlN layer 18 (n-type semiconductor layer) on the n-type GaN buffer layer 17.

【0044】次に、n型GaAlN 層18の上に、前記のSi
基板を用いた発光素子と同一構造に、同一ガスを用い
て、同一成長条件で、GaN 層19を 0.5μmの厚さに形
成する。これにより、ノンドープの発光層を得る。次
に、前例と同様に、MgドープGaAlN 層20(p型半導体
層)を 0.5μmの厚さに形成した。次に、MgドープGaAl
N 層20上にSiO2層22を堆積した後、縦1mm、横50μ
mの短冊状に窓22Aを開け、真空チャンバに移して、
MgドープGaAlN 層20(p層)に電子線を照射した。電
子線の照射条件は前実施例と同様である。
Next, on the n-type GaAlN layer 18, the Si
A GaN layer 19 is formed to a thickness of 0.5 μm in the same structure as the light emitting device using the substrate, using the same gas, and under the same growth conditions. Thereby, a non-doped light emitting layer is obtained. Next, as in the previous example, a Mg-doped GaAlN layer 20 (p-type semiconductor layer) was formed to a thickness of 0.5 μm. Next, Mg-doped GaAl
After depositing the SiO 2 layer 22 on the N layer 20, it is 1 mm long and 50 μm wide.
m, open the window 22A in a strip shape, transfer to a vacuum chamber,
The Mg-doped GaAlN layer 20 (p layer) was irradiated with an electron beam. The irradiation conditions of the electron beam are the same as in the previous embodiment.

【0045】その後、SiO2層22側からMgドープGaAlN
層20(p型半導体層)に対する電極21Aを形成し、
他方、基板16の裏面にn型GaAlN 層18(n型半導体
層)に対する電極21Bを形成した。
Thereafter, from the SiO 2 layer 22 side, Mg-doped GaAlN
Forming an electrode 21A for the layer 20 (p-type semiconductor layer);
On the other hand, an electrode 21B for the n-type GaAlN layer 18 (n-type semiconductor layer) was formed on the back surface of the substrate 16.

【0046】(4)GaN基板の場合 GaN 基板上に作成した発光素子を図4に示す。低抵抗n
型GaN の(0001)面基板23を有機洗浄の後、リン酸+硫
酸系エッチャントによりエッチングの後、この基板23
を結晶成長部に設置する。次に、成長炉を真空排気の
後、水素及びNH3 を供給し、基板温度を1040℃にして、
5分間放置する。次に、TMG 及びSiH4を更に加えてn型
GaN 緩衝層24を0.5 〜1 μmの厚さに形成した。
(4) GaN Substrate FIG. 4 shows a light emitting device formed on a GaN substrate. Low resistance n
After cleaning the (0001) plane substrate 23 of type GaN organically, etching with a phosphoric acid + sulfuric acid type etchant,
Is set in the crystal growth part. Next, after evacuation of the growth furnace, hydrogen and NH 3 were supplied, and the substrate temperature was set to 1040 ° C.
Leave for 5 minutes. Next, TMG and SiH 4 are further added to add n-type
The GaN buffer layer 24 was formed to a thickness of 0.5 to 1 μm.

【0047】次に、TMA を加え、n 型GaAlN 層(n型半
導体層)25を成長させた。次に、n型GaAlN 層25の
上に、前記のSi基板を用いた発光素子と同一構造に、同
一ガスを用いて、同一成長条件で、それぞれ、ノンドー
プのGaN 層(発光層)26を 0.5μm、MgドープGaAlN
層27(p型半導体層)を 0.5μmの厚さに形成した。
次に、MgドープGaAlN 層27上にSiO2層29を堆積した
後、縦1mm、横50μmの短冊状に窓29Aを開け、真空
チャンバに移して、MgドープGaAlN 層27(p型半導体
層)に電子線を照射した。電子線の照射条件は前実施例
と同様である。
Next, TMA was added to grow an n-type GaAlN layer (n-type semiconductor layer) 25. Next, a non-doped GaN layer (light-emitting layer) 26 is formed on the n-type GaAlN layer 25 in the same structure, using the same gas, and under the same growth conditions as the light-emitting element using the Si substrate. μm, Mg-doped GaAlN
The layer 27 (p-type semiconductor layer) was formed to a thickness of 0.5 μm.
Next, after depositing the SiO 2 layer 29 on the Mg-doped GaAlN layer 27, a window 29A is opened in a rectangular shape of 1 mm in length and 50 μm in width, moved to a vacuum chamber, and the Mg-doped GaAlN layer 27 (p-type semiconductor layer) Was irradiated with an electron beam. The irradiation conditions of the electron beam are the same as in the previous embodiment.

【0048】その後、SiO2層29側からMgドープGaAlN
層27(p型半導体層)に対する電極28Aを形成し、
他方、基板23の裏面にn型GaAlN 層25(n型半導体
層)に対する電極28Bを形成した。
Thereafter, from the SiO 2 layer 29 side, Mg-doped GaAlN
Forming an electrode 28A for the layer 27 (p-type semiconductor layer);
On the other hand, an electrode 28B for the n-type GaAlN layer 25 (n-type semiconductor layer) was formed on the back surface of the substrate 23.

【0049】上記のいづれの構造の発光素子も、室温に
おいて高強度で発光した。
The light emitting devices having any of the above structures emitted light at high intensity at room temperature.

【図面の簡単な説明】[Brief description of the drawings]

【図1】サファイア基板上に作製した本発明の具体的な
一実施例に係る((AlxGa1-x)yIn1-yN:0≦x≦1,0≦y≦1)
系半導体発光素子の構成を示した断面図。
FIG. 1 shows a specific example of the present invention fabricated on a sapphire substrate ((Al x Ga 1 -x ) y In 1 -y N: 0 ≦ x ≦ 1, 0 ≦ y ≦ 1)
FIG. 2 is a cross-sectional view illustrating a configuration of a system semiconductor light emitting element.

【図2】Si基板上に作製した本発明の具体的な一実施例
に係る((AlxGa1-x)yIn1-yN:0≦x≦1,0≦y≦1)系半導体
発光素子の構成を示した断面図。
FIG. 2 shows a ((Al x Ga 1-x ) y In 1-y N: 0 ≦ x ≦ 1, 0 ≦ y ≦ 1) system according to a specific embodiment of the present invention fabricated on a Si substrate. FIG. 2 is a cross-sectional view illustrating a configuration of a semiconductor light emitting element.

【図3】6H-SiC基板上に作製した本発明の具体的な一実
施例に係る((AlxGa1-x)yIn1-yN:0≦x≦1,0≦y≦1)系半
導体発光素子の構成を示した断面図。
FIG. 3 shows ((Al x Ga 1-x ) y In 1-y N: 0 ≦ x ≦ 1, 0 ≦ y ≦ 1 according to one specific example of the present invention fabricated on a 6H-SiC substrate. FIG. 2 is a cross-sectional view illustrating a configuration of a) semiconductor light emitting element.

【図4】GaN 基板上に作製した本発明の具体的な一実施
例に係る((AlxGa1-x)yIn1-yN:0≦x≦1,0≦y≦1)系半導
体発光素子の構成を示した断面図。
FIG. 4 shows ((Al x Ga 1-x ) y In 1-y N: 0 ≦ x ≦ 1, 0 ≦ y ≦ 1) according to a specific example of the present invention fabricated on a GaN substrate. FIG. 2 is a cross-sectional view illustrating a configuration of a semiconductor light emitting element.

【符号の説明】[Explanation of symbols]

1…サファイアの(0001)面基板 2,9,17…AlN 緩衝層 3,11,18,25…n型AlGaN 層(n型半導体層) 4,12,19,26…GaN 層(発光層) 5,13,20,27…MgドープAlGaN 層(p型半導体
層) 7,15,22,29…SiO2層 6A,14A,21A,28A…電極(MgドープAlGaN
層(p型半導体層)に対する) 6B,14B,21B,28B…電極(n型AlGaN 層
(n型半導体層)に対する)
DESCRIPTION OF SYMBOLS 1 ... (0001) plane substrate of sapphire 2, 9, 17 ... AlN buffer layer 3, 11, 18, 25 ... n-type AlGaN layer (n-type semiconductor layer) 4, 12, 19, 26 ... GaN layer (light emitting layer) 5,13,20,27 ... Mg-doped AlGaN layer (p-type semiconductor layer) 7,15,22,29 ... SiO 2 layer 6A, 14A, 21A, 28A ... electrode (Mg-doped AlGaN
6B, 14B, 21B, 28B ... electrodes (for n-type AlGaN layer (for n-type semiconductor layer))

───────────────────────────────────────────────────── フロントページの続き (72)発明者 岡崎 伸夫 愛知県西春日井郡春日町大字落合字長畑 1番地 豊田合成株式会社内 (72)発明者 真部 勝英 愛知県西春日井郡春日町大字落合字長畑 1番地 豊田合成株式会社内 (72)発明者 赤崎 勇 愛知県名古屋市西区浄心1丁目1番38− 805 (72)発明者 天野 浩 愛知県名古屋市名東区神丘町二丁目21 虹ケ丘東団地25号棟505号室 (56)参考文献 特開 昭59−228776(JP,A) 特開 昭53−20882(JP,A) JAPANESE JOURNAL OF APPLIED PHYSICS VOL.28,NO.12,DECEMB ER,1989,PP.L2112−L2114 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Nobuo Okazaki No. 1, Nagahata Ochiai, Kasuga-cho, Nishi-Kasugai-gun, Aichi Prefecture Inside Toyoda Gosei Co., Ltd. Address Toyoda Gosei Co., Ltd. (72) Inventor Isamu Akasaki 1-38-805, Jyoshin, Nishi-ku, Nagoya-shi, Aichi Prefecture Room (56) References JP-A-59-228776 (JP, A) JP-A-53-20882 (JP, A) JAPANESE JOURNAL OF APPLIED PHYSICS VOL. 28, NO. 12, DECEMBER, 1989, PP. L2112-L2114

Claims (5)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 禁制帯幅の比較的小さな半導体から成る
発光層を挟むようにその両側に各々禁制帯幅の大きなn
型半導体層及びp型半導体層を接合した窒化ガリウム系
化合物半導体発光素子において、基板と前記基板上にn型半導体層の成長温度よりも低い温度で
形成された緩衝層と、 前記緩衝層上に形成され、シリコン(Si)をドープした窒
化ガリウム系化合物半導体から成るn型半導体層と、 前記n型半導体層の上に形成されたノンドープの窒化ガ
リウム系化合物半導体から成る発光層と、 前記発光層の上に形成され、マグネシウム(Mg)をドープ
し、低抵抗化処理した窒化ガリウム系化合物半導体から
成るp型半導体層と を有することを特徴とする 窒化ガリ
ウム系化合物半導体発光素子。
1. A semiconductor device having a relatively large forbidden band and a light emitting layer composed of a semiconductor having a relatively small forbidden band.
In type semiconductor layer and a p-type semiconductor layer gallium nitride compound semiconductor light-emitting device formed by joining a substrate and, at a temperature lower than the growth temperature of the n-type semiconductor layer on the substrate
A buffer layer formed, and a nitride layer formed on the buffer layer and doped with silicon (Si).
An n-type semiconductor layer made of a gallium arsenide-based compound semiconductor ; and a non-doped gallium nitride formed on the n-type semiconductor layer.
A light-emitting layer made of a lithium- based compound semiconductor , and formed on the light-emitting layer, doped with magnesium (Mg)
Gallium nitride-based compound semiconductor
A gallium nitride-based compound semiconductor light emitting device having a p-type semiconductor layer .
【請求項2】 前記緩衝層は3族窒化物半導体から成る
ことを特徴とする請求項1に記載の窒化ガリウム系化合
物半導体発光素子。
2. The gallium nitride-based compound semiconductor light emitting device according to claim 1 , wherein the buffer layer is made of a group III nitride semiconductor.
【請求項3】 前記n型半導体層、前記p型半導体層、
前記発光層は((AlxGa1-x)yIn1-yN:0 ≦x ≦1,0≦y
1)から成ることを特徴とする請求項1又は請求項2に
載の窒化ガリウム系化合物半導体発光素子。
3. The n-type semiconductor layer, the p-type semiconductor layer,
The light-emitting layer has a composition of ((Al x Ga 1-x ) y In 1-y N: 0 ≦ x ≦ 1,0 ≦ y
The gallium nitride-based compound semiconductor light-emitting device according to claim 1 or 2, wherein the light-emitting device comprises:
【請求項4】 サファイア、Si、6H-SiC又はGaN から成
る基板を有することを特徴とする請求項1乃至請求項3
のいずれか1項に記載の窒化ガリウム系化合物半導体発
光素子。
4. A sapphire, Si, claims 1 to 3 characterized by having a substrate made of 6H-SiC or GaN
The gallium nitride-based compound semiconductor light-emitting device according to any one of the above items.
【請求項5】 前記n型半導体層又は前記p型半導体層
とそれぞれの電極との間に高キャリア濃度の層を設けた
ことを特徴とする請求項1乃至請求項4のいずれか1項
に記載の窒化ガリウム系化合物半導体発光素子。
5. The n-type semiconductor layer or the p-type semiconductor layer
And a layer with a high carrier concentration between each electrode
The method according to any one of claims 1 to 4, wherein
3. The gallium nitride-based compound semiconductor light-emitting device according to item 1.
JP35898896A 1996-12-26 1996-12-26 Gallium nitride based compound semiconductor light emitting device Expired - Lifetime JP2737053B2 (en)

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Publication number Priority date Publication date Assignee Title
CA1095154A (en) * 1976-08-10 1981-02-03 James A. Van Vechten Heterostructure semiconductor devices
JPS59228776A (en) * 1983-06-10 1984-12-22 Nippon Telegr & Teleph Corp <Ntt> Semiconductor hetero-junction element

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
JAPANESE JOURNAL OF APPLIED PHYSICS VOL.28,NO.12,DECEMBER,1989,PP.L2112−L2114

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