JP2727614B2 - Method of manufacturing printed wiring board and method of manufacturing multilayer wiring board - Google Patents

Method of manufacturing printed wiring board and method of manufacturing multilayer wiring board

Info

Publication number
JP2727614B2
JP2727614B2 JP1005447A JP544789A JP2727614B2 JP 2727614 B2 JP2727614 B2 JP 2727614B2 JP 1005447 A JP1005447 A JP 1005447A JP 544789 A JP544789 A JP 544789A JP 2727614 B2 JP2727614 B2 JP 2727614B2
Authority
JP
Japan
Prior art keywords
hole
wiring board
plating
printed wiring
plating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1005447A
Other languages
Japanese (ja)
Other versions
JPH02185099A (en
Inventor
俊夫 田村
誠之 安田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP1005447A priority Critical patent/JP2727614B2/en
Publication of JPH02185099A publication Critical patent/JPH02185099A/en
Application granted granted Critical
Publication of JP2727614B2 publication Critical patent/JP2727614B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、特に多層配線基板に用いて好適な印刷配線
基板の製造方法に関するものであり、いわゆるブライン
ドスルーを有する印刷配線基板の製造方法に関する。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board particularly suitable for a multilayer wiring board, and more particularly to a method for manufacturing a printed wiring board having a so-called blind through. .

〔発明の概要〕 本発明は、両面銅張り基板に設けられたスルーホール
の一方の開口部をメッキ技術によって閉塞することで、
多層化を図る際にも樹脂のしみ出しがなく、高密度化を
実現し得る印刷配線基板を製造可能とするものである。
[Summary of the Invention] The present invention closes one opening of a through hole provided in a double-sided copper-clad board by plating technology,
The present invention makes it possible to manufacture a printed wiring board which does not exude resin even when multi-layering is performed and which can realize high density.

〔従来の技術〕[Conventional technology]

従来より、配線回路の飛躍的な高密度化を図るべく、
いわゆる多層配線基板が提案されているが、より一層の
高密度化を考慮したときに、層間を接続する貫通スルー
ホールの配線基板に占める面積が無視できなくなってき
ている。
Conventionally, in order to achieve a dramatic increase in the density of wiring circuits,
Although a so-called multilayer wiring board has been proposed, the area occupied by the through-holes connecting the layers in the wiring board cannot be ignored when further densification is considered.

例えば、3層以上の配線層が積層される多層配線基板
において、1層目と2層目との間を接続するためにも全
ての配線層を貫通するスルーホールを形成する必要があ
り、このスルーホールで接続する必要のない配線層でも
当該スルーホールを避けて配線回路のパターニングを行
わなければならない。したがって、各層で使用可能なパ
ターン領域が制限されることになる。
For example, in a multilayer wiring board in which three or more wiring layers are stacked, it is necessary to form through holes that penetrate all wiring layers in order to connect between the first layer and the second layer. Even in a wiring layer that does not need to be connected by a through hole, the wiring circuit must be patterned avoiding the through hole. Therefore, the pattern area that can be used in each layer is limited.

そこで、前述のパターン領域の制約を解消するための
技術として、第9図に示すように、パターン配線(10
1),(102),(103)が形成された絶縁基板(104),
(105),(106)を積層して多層配線構造を成形した
後、ドリルで必要な層間のみ,すなわち全ての基板を貫
通するのではなく途中まで貫通する孔(107)を穿設す
る方法が実施されている。
Therefore, as a technique for solving the above-described restriction on the pattern area, as shown in FIG.
1) The insulating substrate (104) on which (102) and (103) are formed,
After laminating (105) and (106) to form a multilayer wiring structure, there is a method of drilling holes (107) that penetrate only to the required layers by drilling, that is, penetrate partway instead of penetrating all substrates. It has been implemented.

しかしながら、このような方法ではドリルを高精度で
コントロールする必要があり、特に層間が狭くなった場
合、〔各基板(104),(105),(106)が薄板となっ
た場合〕に対応が非常に困難である。また、この方法で
は多層配線基板を1枚ずつしか加工できず、生産性の点
で極めて不利でもある。
However, in such a method, it is necessary to control the drill with high precision, and especially when the interlayer is narrow, [when each substrate (104), (105), (106) becomes a thin plate]. Very difficult. In addition, this method can process only one multilayer wiring substrate at a time, which is extremely disadvantageous in terms of productivity.

このような状況から、さらに従来、積層前に各印刷配
線基板に必要なスルーホールを形成し、このスルーホー
ルで各基板の両面に形成される配線回路間の導通をとっ
た後、積層して多層化を図るという技術も検討されてい
る。
From such a situation, conventionally, prior to lamination, necessary through-holes are formed in each printed wiring board, and conduction is established between wiring circuits formed on both sides of each board with the through-holes, and then laminated. Techniques for increasing the number of layers are also being studied.

ところが、スルーホールを形成した後に多層化を図る
と、積層時に樹脂が外部にしみ出すという問題が新たに
生じ、このしみ出した樹脂による導通不良が大きな障害
となる。
However, when multi-layering is performed after the formation of the through-holes, a new problem that the resin exudes to the outside at the time of laminating arises, and a conduction failure due to the exuded resin becomes a major obstacle.

したがって、各印刷配線基板のスルーホールに予めエ
ポキシ樹脂等を充填して積層時の樹脂のしみ出しを防止
しようとする試みもあるが、スルーホールが開放された
状態でエポキシ樹脂を片側から充填しようとすると、や
はり反対側に樹脂がしみ出し、エポキシ樹脂は除去が困
難であることからやはり導通不良が問題となる。そうか
といって、スルーホールの片側をドライフィルム等でマ
スクしてエポキシ樹脂を充填しようとすると、充填が完
全ではなく、またエポキシ樹脂の硬化の際の熱でドライ
フィルムの除去が困難なものとなる等の不都合が生ず
る。
Therefore, there is an attempt to fill the through holes of each printed wiring board with epoxy resin or the like in advance to prevent the resin from oozing during lamination, but to fill the epoxy resin from one side with the through holes opened. In this case, the resin also exudes to the opposite side, and it is difficult to remove the epoxy resin. On the other hand, if one side of the through hole is masked with a dry film or the like and filled with epoxy resin, the filling is not complete, and it is difficult to remove the dry film due to the heat at the time of curing the epoxy resin. Inconvenience such as becoming occurs.

〔発明が解決しようとする課題〕[Problems to be solved by the invention]

このように、積層する各印刷配線基板にスルーホール
を形成し、各基板内での導通をとった後に多層化する技
術は、多層配線基板の高密度化を図る上で有望視されて
いるものの、前記樹脂のしみ出しが大きな障害となっ
て、十分な信頼性を確保するに至っていないのが実情で
ある。
As described above, the technique of forming through holes in each printed wiring board to be laminated, and establishing continuity in each board, and then forming a multilayer is considered promising in increasing the density of the multilayer wiring board. However, the fact is that the exudation of the resin is a major obstacle, and sufficient reliability has not been ensured.

そこで本発明は、かかる従来の実情に鑑みて提案され
たものであって、スルーホールを確実に塞ぐことがで
き、積層したときに樹脂のしみ出しがなく信頼性の高い
多層配線基板とすることが可能な印刷配線基板の製造方
法を提供することを目的とする。
Therefore, the present invention has been proposed in view of such conventional circumstances, and is intended to provide a highly reliable multilayer wiring board that can reliably close through holes and does not exude resin when laminated. It is an object of the present invention to provide a method for manufacturing a printed wiring board which can perform the above.

〔課題を解決するための手段〕[Means for solving the problem]

本発明の印刷配線基板の製造方法は、両面銅張り基板
にスルーホールを形成し、該スルーホール内にスルーホ
ールメッキを施した後、基板の何れか一方の面に少なく
とも前記スルーホールを閉塞する金属よりなるマスクを
接合し、無電解メッキ及び/又は電解メッキを施すこと
によってスルーホール内に前記マスク側の開口部を塞ぐ
メッキ層を形成した後、上記マスクを剥離して、スルー
ホール内に当該スルーホールの一方の開口部を塞ぐよう
なメッキ層を形成することを特徴とするものである。ま
た、本発明の多層配線基板の製造方法は、両面銅張り基
板にスルーホールを形成し、該スルーホール内にスルー
ホールメッキを施した後、基板の何れか一方の面に少な
くとも前記スルーホールを閉塞する金属よりなるマスク
を接合し、無電解メッキ及び/又は電解メッキを施すこ
とによってスルーホール内に前記マスク側の開口部を塞
ぐメッキ層を形成した後、上記マスクを剥離して、スル
ーホール内に当該スルーホールの一方の開口部を塞ぐよ
うなメッキ層を形成して印刷配線基板を形成し、上記印
刷基板を、メッキ層に塞がれるスルーホールの開口部が
最外層となるように接着層を介して複数積層することを
特徴とするものである。
In the method for manufacturing a printed wiring board according to the present invention, a through-hole is formed in a double-sided copper-clad board, and after through-hole plating is performed in the through-hole, at least the through-hole is closed on any one surface of the board. After joining a mask made of metal and performing electroless plating and / or electrolytic plating to form a plating layer that closes the opening on the mask side in the through hole, the mask is peeled off, and the mask is peeled off. A plating layer is formed so as to close one opening of the through hole. Further, the method for manufacturing a multilayer wiring board of the present invention includes forming a through-hole in a double-sided copper-clad board, plating the through-hole in the through-hole, and forming at least the through-hole on any one surface of the board. After joining a mask made of a metal to be closed and applying electroless plating and / or electrolytic plating to form a plating layer for closing the opening on the mask side in the through hole, the mask is peeled off and the through hole is removed. A printed layer is formed by forming a plating layer so as to cover one opening of the through hole, and the printed board is formed such that the opening of the through hole closed by the plating layer is the outermost layer. A plurality of layers are laminated via an adhesive layer.

〔作用〕[Action]

本発明は、スルーホールを塞いでいわゆるブラインド
スルーとするためにメッキ技術を応用したもので、スル
ーホールを閉塞する金属よりなるマスクを接合した後に
無電解メッキ及び/又は電解メッキを施すことで、スル
ーホールの壁面並びにマスクの内面にメッキ層が形成さ
れ、マスクを除去したときにこのメッキ層がスルーホー
ルの片側の開口部を塞ぐことになる。
The present invention is an application of a plating technique in order to cover the through-hole and form a so-called blind through, by applying a non-electrolytic plating and / or electrolytic plating after joining a mask made of a metal closing the through-hole, A plating layer is formed on the wall surface of the through hole and on the inner surface of the mask. When the mask is removed, this plating layer closes the opening on one side of the through hole.

したがって、エポキシ樹脂等を充填してスルーホール
を塞ぐものと異なり、充填時の樹脂のしみ出しによる導
通不良が解消され、また確実にスルーホールが塞がれ
る。そして、多層配線基板とする場合の積層時の樹脂の
しみ出しも皆無となる。
Therefore, unlike the case of filling the through hole by filling with the epoxy resin or the like, the conduction failure due to the exudation of the resin at the time of filling is eliminated, and the through hole is reliably closed. Then, there is no exudation of the resin at the time of lamination when forming a multilayer wiring board.

〔実施例〕〔Example〕

以下、本発明を適用した具体的な実施例について図面
を参照しながら説明する。
Hereinafter, specific embodiments to which the present invention is applied will be described with reference to the drawings.

本実施例において、いわゆるブラインドスルーを有す
る印刷配線基板を製造するには、先ずスルーホールメッ
キが施された両面銅張り基板を作製する。
In this embodiment, to manufacture a printed wiring board having a so-called blind through, first, a double-sided copper-clad board with through-hole plating is manufactured.

すなわち、第1図に示すように、ベースとなる基材
(1)の両面に導体層である銅箔(2),(3)が貼り
合わされた両面銅張り基板を用意し、その所定の位置に
貫通孔〔スルーホール〕(4)を穿設した後、無電解メ
ッキ(いわゆる化学メッキ)を行って基板表面及び貫通
孔(4)の内壁面に全面に亘り第1のメッキ層〔例えば
銅メッキ層〕(5)の形成する。なお、この第1のメッ
キ層(5)を形成するにあたり、その厚さを増すため
に、前述の無電解メッキに加えて電解メッキを行っても
よい。
That is, as shown in FIG. 1, a double-sided copper-clad board in which copper foils (2) and (3) as conductor layers are bonded to both sides of a base material (1) as a base is prepared, After a through-hole (through hole) (4) is formed, electroless plating (so-called chemical plating) is performed to cover the entire surface of the substrate and the inner wall surface of the through-hole (4) with a first plating layer (for example, copper). Plating layer] (5) is formed. In forming the first plating layer (5), electrolytic plating may be performed in addition to the above-described electroless plating in order to increase the thickness.

次に、第2図に示すように、基板の一方の面に前記貫
通孔(4)を塞ぐ金属板(6)をマスクとして接合す
る。この金属板(6)には、銅メッキ層等よりなる第1
のメッキ層(5)と密着のあまり良くない金属板(例え
ばステンレス板),あるいは密着を悪くするような表面
処理を施した金属板を用いることが好ましく、またこの
後で電解メッキを施す関係から、導電性を有する金属材
料よりなることが好ましい。
Next, as shown in FIG. 2, the substrate is bonded to one surface of the substrate using a metal plate (6) for closing the through hole (4) as a mask. This metal plate (6) has a first plate made of a copper plating layer or the like.
It is preferable to use a metal plate (for example, a stainless steel plate) that does not have good adhesion to the plating layer (5), or a metal plate that has been subjected to a surface treatment that deteriorates the adhesion. It is preferable to be made of a conductive metal material.

そして、しかる後に電解メッキを施して、第3図に示
すような第2のメッキ層(7)を形成する。この第2の
メッキ層(7)は、前記第1のメッキ層(5)の表面を
覆う如く形成されるとともに、前記金属板(6)が導電
性を有することから、この金属板(6)の表面にも連続
して形成される。
Thereafter, electrolytic plating is performed to form a second plating layer (7) as shown in FIG. The second plating layer (7) is formed so as to cover the surface of the first plating layer (5), and since the metal plate (6) is conductive, the metal plate (6) It is also formed continuously on the surface.

したがって、第4図に示すように金属板(6)を取り
除いても、前記第2のメッキ層(7)の金属板(6)の
内面に形成された部分(7a)が貫通孔(4)を塞ぐ形で
残り、貫通孔(4)は片側が閉塞されたブラインドスル
ーとされる。
Therefore, even if the metal plate (6) is removed as shown in FIG. 4, the portion (7a) formed on the inner surface of the metal plate (6) of the second plating layer (7) remains in the through hole (4). , And the through hole (4) is a blind through with one side closed.

この段階で基板両面の導体層〔銅箔(2),(3)及
び第1のメッキ層(5),第2のメッキ層(7)〕に対
してエッチングを施し、両面に配線回路を形成してブラ
インドスルーを有する印刷配線基板を完成するわけであ
るが、ここでは多層化を考慮して貫通孔(4)が開放さ
れる側の基板面の導体層のみ選択的にエッチングして、
先ずは片側にのみ配線回路(8)を形成した印刷配線基
板(10)とする。
At this stage, the conductor layers (copper foils (2) and (3) and the first plating layer (5) and the second plating layer (7)) on both surfaces of the substrate are etched to form wiring circuits on both surfaces. In order to complete the printed wiring board having a blind through, the conductor layer on the side of the board where the through hole (4) is opened is selectively etched in consideration of multilayering.
First, a printed wiring board (10) having a wiring circuit (8) formed on only one side is provided.

次に、上述のようにして製造された印刷配線基板を用
いて多層配線基板とする工程について説明する。
Next, a process of forming a multilayer wiring board using the printed wiring board manufactured as described above will be described.

前述の印刷配線基板(10)を用いて多層配線基板を作
製するには、第5図に示すように、基材(11)の両面に
所定の配線回路(12),(13)を形成した印刷配線基板
(14)を中心とし、予め樹脂を含浸した半硬化(いわゆ
るBステージ)プリプレグ(15)を挾んで、前記印刷配
線基板(10),(11)を両側に積層する。なお、積層に
際しては、各印刷配線基板(10),(10)は配線回路
(8)が形成された面を内側にする。
In order to manufacture a multilayer wiring board using the above-described printed wiring board (10), predetermined wiring circuits (12) and (13) were formed on both sides of a base material (11) as shown in FIG. The printed wiring boards (10) and (11) are laminated on both sides of the printed wiring board (14) with a semi-cured (so-called B stage) prepreg (15) pre-impregnated with resin sandwiched therebetween. At the time of lamination, each printed wiring board (10), (10) has the surface on which the wiring circuit (8) is formed facing inside.

そして、必要に応じて貫通スルーホールを形成しメッ
キを施して層間(特に基板間)の接続を図り、第6図に
示すように、最外部の導体層〔各印刷配線基板(10),
(10)の貫通孔(4)が閉塞された側の基板面の導体
層〕に選択エッチングを施して配線回路(9)を形成
し、多層配線基板とする。本例では、両面印刷配線基板
が3層積層され、配線層の数で見た場合には6層の多層
配線基板が形成されることになる。
Then, if necessary, through-holes are formed and plated to achieve connection between the layers (especially between the substrates). As shown in FIG. 6, the outermost conductor layer [each printed wiring board (10),
(10) Conductive layer on the side of the substrate on which the through hole (4) is closed] is selectively etched to form a wiring circuit (9), thereby obtaining a multilayer wiring board. In this example, three double-sided printed wiring boards are stacked, and when viewed in terms of the number of wiring layers, a six-layer multilayer wiring board is formed.

得られた多層配線基板においては、プリプレグ(15)
の樹脂が各印刷配線基板(10)、(10)の貫通孔(4)
に入り込むものの、これら貫通孔(4)が第2のメッキ
層(7)によって塞がれることから、外部にしみ出すこ
とはない。また、各印刷配線基板(10),(10)におけ
る層間接続は、前記貫通孔(4)内に形成される第1の
メッキ層(5)及び第2のメッキ層(7)で図られ、全
ての基板を貫通する貫通スルーホールの数を減らすこと
ができ、高密度化を図る上で有利である。
In the obtained multilayer wiring board, prepreg (15)
Resin is the through hole (4) of each printed wiring board (10), (10)
Although they penetrate, they do not seep outside because the through holes (4) are closed by the second plating layer (7). Further, interlayer connection in each of the printed wiring boards (10) and (10) is achieved by a first plating layer (5) and a second plating layer (7) formed in the through hole (4), The number of through-holes penetrating all the substrates can be reduced, which is advantageous in achieving high density.

以上、本発明の具体的な実施例について述べてきた
が、本発明がこの実施例に限定されるものではなく、本
発明の要旨を逸脱しない範囲で種々の変形が可能であ
る。
Although the specific embodiments of the present invention have been described above, the present invention is not limited to these embodiments, and various modifications can be made without departing from the gist of the present invention.

さらには、第7図に示すように、マスクである金属板
(6)を可溶性の接着剤(20)で貼り合わせ、第8図に
示すように貫通孔(4)内に露出している部分の接着剤
(20a)を溶剤,あるいは水,酸,アルカリ等で除去
し、その後第2のメッキ層(7)を形成するようにして
もよい。
Further, as shown in FIG. 7, a metal plate (6) as a mask is bonded with a soluble adhesive (20), and a portion exposed in the through hole (4) as shown in FIG. The adhesive (20a) may be removed with a solvent, water, acid, alkali or the like, and then the second plating layer (7) may be formed.

これら何れの手法によっても、先の実施例と同様の効
果が期待でき、貫通孔(4)の一方の開口部を塞ぐメッ
キ層が形成される。
With any of these methods, the same effect as in the previous embodiment can be expected, and a plating layer that blocks one opening of the through hole (4) is formed.

〔発明の効果〕〔The invention's effect〕

以上の説明からも明らかなように、本発明においては
メッキによってスルーホールを閉塞しブラインドスルー
を形成しているので、樹脂の充填等による不都合が解消
され、確実にスルーホールが塞がれ、導通不良等の発生
のない信頼性の高い印刷配線基板を製造することが可能
である。
As is clear from the above description, in the present invention, the through hole is closed by plating to form a blind through, so that the inconvenience due to resin filling or the like is eliminated, the through hole is reliably closed, and the conduction is prevented. It is possible to manufacture a highly reliable printed wiring board free from defects and the like.

したがって、本発明においては、上記印刷配線基板を
メッキ層に塞がれるスルーホールの開口部が最外層とな
るように接着層を介して複数積層することで、外部への
樹脂のしみ出しのない、高密度且つ高信頼性の多層配線
基板の提供が可能となる。
Therefore, in the present invention, the printed wiring board is laminated with a plurality of layers via the adhesive layer so that the opening of the through hole closed by the plating layer becomes the outermost layer, so that the resin does not exude to the outside. Thus, it is possible to provide a high-density and high-reliability multilayer wiring board.

【図面の簡単な説明】[Brief description of the drawings]

第1図ないし第6図は本発明を適用した実施例における
製造工程を工程順に従って示す要部概略断面図であっ
て、第1図はスルーホールメッキ工程、第2図はマスク
接合工程、第3図は電解メッキ工程、第4図は金属板除
去及びエッチング工程をそれぞれ示す。また、第5図は
積層状態を分解して示す要部概略断面図、第6図は最外
層のエッチング工程を示す要部概略断面図である。 第7図及び第8図はマスク接合工程の他の例を示す要部
概略断面図で、第7図は接着剤による金属板の接合工
程、第8図は貫通孔内に露出する接着剤の除去工程をそ
れぞれ示す。 第9図は多層配線基板における層間接続の従来例を示す
要部概略断面図である。 1……基材 2,3……銅箔 4……貫通孔(スルーホール) 5……第1のメッキ層 6……金属板(マスク) 7……第2のメッキ層
1 to 6 are schematic cross-sectional views of a main part showing a manufacturing process in an embodiment to which the present invention is applied in the order of steps. FIG. 1 is a through-hole plating process, FIG. 3 shows an electrolytic plating step, and FIG. 4 shows a metal plate removing and etching step. FIG. 5 is a schematic cross-sectional view of an essential part showing a laminated state in a disassembled state, and FIG. 7 and 8 are schematic cross-sectional views of main parts showing another example of a mask bonding process. FIG. 7 is a bonding process of a metal plate using an adhesive, and FIG. 8 is a diagram of an adhesive exposed in a through hole. Each of the removing steps will be described. FIG. 9 is a schematic sectional view of a main part showing a conventional example of interlayer connection in a multilayer wiring board. DESCRIPTION OF SYMBOLS 1 ... Base material 2, 3 ... Copper foil 4 ... Through-hole (through-hole) 5 ... 1st plating layer 6 ... Metal plate (mask) 7 ... 2nd plating layer

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】「両面銅張り基板にスルーホールを形成
し、該スルーホール内にスルーホールメッキを施した
後、基板の何れか一方の面に少なくとも前記スルーホー
ルを閉塞する金属よりなるマスクを接合し、 無電解メッキ及び/又は電解メッキを施すことによって
スルーホール内に前記マスク側の開口部を塞ぐメッキ層
を形成した後、 上記マスクを剥離して、スルーホール内に当該スルーホ
ールの一方の開口部を塞ぐようなメッキ層を形成するこ
とを特徴とする印刷配線基板の製造方法。」
1. A method of forming a through-hole in a double-sided copper-clad substrate, plating the through-hole in the through-hole, and applying a mask made of a metal for closing at least the through-hole on one of the surfaces of the substrate. After joining and forming a plating layer that closes the opening on the mask side in the through hole by performing electroless plating and / or electrolytic plating, the mask is peeled off, and one of the through holes is placed in the through hole. A method for manufacturing a printed wiring board, comprising forming a plating layer that closes the opening of the printed wiring board. "
【請求項2】「両面銅張り基板にスルーホールを形成
し、該スルーホール内にスルーホールメッキを施した
後、基板の何れか一方の面に少なくとも前記スルーホー
ルを閉塞する金属よりなるマスクを接合し、 無電解メッキ及び/又は電解メッキを施すことによって
スルーホール内に前記マスク側の開口部を塞ぐメッキ層
を形成した後、 上記マスクを剥離して、スルーホール内に当該スルーホ
ールの一方の開口部を塞ぐようなメッキ層を形成して印
刷配線基板を形成し、 上記印刷基板を、メッキ層に塞がれるスルーホールの開
口部が最外層となるように接着層を介して複数積層する
ことを特徴とする多層配線基板の製造方法。」
2. After forming a through-hole in a double-sided copper-clad substrate, plating the through-hole in the through-hole, and masking at least one of the surfaces of the substrate with a mask made of a metal for closing the through-hole. After joining and forming a plating layer that closes the opening on the mask side in the through hole by performing electroless plating and / or electrolytic plating, the mask is peeled off, and one of the through holes is placed in the through hole. A printed wiring board is formed by forming a plating layer that covers the opening of the printed wiring board, and a plurality of the printed boards are laminated via an adhesive layer such that the opening of the through hole closed by the plating layer is the outermost layer. A method for manufacturing a multilayer wiring board. "
JP1005447A 1989-01-12 1989-01-12 Method of manufacturing printed wiring board and method of manufacturing multilayer wiring board Expired - Fee Related JP2727614B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1005447A JP2727614B2 (en) 1989-01-12 1989-01-12 Method of manufacturing printed wiring board and method of manufacturing multilayer wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1005447A JP2727614B2 (en) 1989-01-12 1989-01-12 Method of manufacturing printed wiring board and method of manufacturing multilayer wiring board

Publications (2)

Publication Number Publication Date
JPH02185099A JPH02185099A (en) 1990-07-19
JP2727614B2 true JP2727614B2 (en) 1998-03-11

Family

ID=11611464

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1005447A Expired - Fee Related JP2727614B2 (en) 1989-01-12 1989-01-12 Method of manufacturing printed wiring board and method of manufacturing multilayer wiring board

Country Status (1)

Country Link
JP (1) JP2727614B2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63280496A (en) * 1987-05-12 1988-11-17 Furukawa Electric Co Ltd:The Manufacture for multilayer circuit board
JPS6476796A (en) * 1987-09-17 1989-03-22 Nec Corp Manufacture of multilayer printed wiring board

Also Published As

Publication number Publication date
JPH02185099A (en) 1990-07-19

Similar Documents

Publication Publication Date Title
KR100905566B1 (en) Carrier member for transmitting circuits, coreless printed circuit board using the said carrier member, and methods of manufacturing the same
KR100346400B1 (en) Multi-layer pcb and the manufacturing method the same
JPH0575269A (en) Manufacture of multilayer printed-wiring board
KR100701353B1 (en) Multi-layer printed circuit board and manufacturing method thereof
JPH1013028A (en) Single-sides circuit board for multilayered printed wiring board and multilayered printed wiring board and its manufacture
KR101170764B1 (en) Method for manufacturing Multi-layer circuit board
KR20070034766A (en) Full Layer Inner Via Printed Circuit Board Using Peel Plating and Its Manufacturing Method
JP2727614B2 (en) Method of manufacturing printed wiring board and method of manufacturing multilayer wiring board
JPH0719970B2 (en) Method for manufacturing multilayer printed wiring board
KR100658972B1 (en) Pcb and method of manufacturing thereof
JP2741238B2 (en) Flexible printed wiring board and method of manufacturing the same
JP3179572B2 (en) Multilayer printed wiring board and method of manufacturing the same
JPH06232558A (en) Manufacture of multilayer printed wiring board
JPS63137499A (en) Manufacture of multilayer printed interconnection board
JP3895017B2 (en) Method for forming buried surface via holes in the manufacture of printed wiring boards
JP3549063B2 (en) Manufacturing method of printed wiring board
EP0213336A1 (en) Method for making a flush surface laminate for a multilayer circuit board
JPS62186595A (en) Multilayer printed wiring board and manufacture of the same
JPH0818228A (en) Manufacture of multi-layer printed board
JP2919953B2 (en) Method for manufacturing multilayer substrate
JP3817291B2 (en) Printed wiring board
JP2003188532A (en) Method of manufacturing printed wiring board and printed wiring board manufactured thereby
JPH0870183A (en) Manufacture of multilayer printed-wiring board
JPH06302959A (en) Manufacture of multilayer printed wiring board
JP2020107751A (en) Printed-circuit board, composite printed-circuit board, method for manufacturing printed-circuit board, and method for manufacturing composite printed-circuit board

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees