JP2720076B2 - Automatic calibration device for direct spread spectrum receiver - Google Patents

Automatic calibration device for direct spread spectrum receiver

Info

Publication number
JP2720076B2
JP2720076B2 JP18413389A JP18413389A JP2720076B2 JP 2720076 B2 JP2720076 B2 JP 2720076B2 JP 18413389 A JP18413389 A JP 18413389A JP 18413389 A JP18413389 A JP 18413389A JP 2720076 B2 JP2720076 B2 JP 2720076B2
Authority
JP
Japan
Prior art keywords
signal
correlator
receiver
added
spread spectrum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP18413389A
Other languages
Japanese (ja)
Other versions
JPH0348540A (en
Inventor
昭彦 遠藤
正夫 中野
浩 武田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP18413389A priority Critical patent/JP2720076B2/en
Priority to US07/604,988 priority patent/US5029181A/en
Publication of JPH0348540A publication Critical patent/JPH0348540A/en
Application granted granted Critical
Publication of JP2720076B2 publication Critical patent/JP2720076B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • H04B1/707Spread spectrum techniques using direct sequence modulation
    • H04B1/7073Synchronisation aspects
    • H04B1/7085Synchronisation aspects using a code tracking loop, e.g. a delay-locked loop

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Description

【発明の詳細な説明】 「産業上の利用分野」 本発明は情報信号を含んだ搬送波に拡散符号により変
調して広範な帯域にスペクトラム拡散された伝送信号を
受信機側において上記送信信号が用いた拡散符号と同一
の符号にて受信波の拡散符号に同期させて逆拡散変調を
かけて受信信号から原情報信号を得る直接スペクトラム
拡散受信機に利用して有用なものであり、特に受信側回
路が温度又は経年変化によるドラフトのために特性変動
するのを自動的に校正することのできる装置に関する。
DETAILED DESCRIPTION OF THE INVENTION "Industrial application field" The present invention relates to a transmission signal which is modulated on a carrier wave including an information signal by a spread code and spread spectrum in a wide band at the receiver side. It is useful for direct spread spectrum receivers that obtain the original information signal from the received signal by performing despread modulation in synchronization with the spread code of the received wave with the same code as the spread code that was used. The present invention relates to an apparatus capable of automatically calibrating a circuit to change its characteristics due to draft due to temperature or aging.

「従来の技術」 第2図は従来のスペクトラム拡散方式の受信回路であ
るが、この回路を構成する回路素子が周囲温度や経年の
ために特性が変動する所謂ドリフトによって増幅器のゲ
インや直流電位が変動すると、C点の電位が変動し、相
関検出信号SDにて相関検出が不能となったり、検出すべ
きでないときに検出信号を出すといった誤検出を生じ
る。更に正確に検出された場合であっても作動増幅器60
に入力される検波器51,52の出力にオフセット電圧、又
は利得差が現われて、そのために遅延ロックループのロ
ック点がずれてしまうといった欠点を包蔵している。
"Prior art" Fig. 2 shows a conventional spread-spectrum receiving circuit. The gain and DC potential of the amplifier are changed by so-called drifts in which the circuit elements constituting the circuit fluctuate due to ambient temperature and aging. If it changes, the potential at the point C changes, and the detection of correlation becomes impossible with the correlation detection signal SD, or an erroneous detection such as outputting a detection signal when it should not be detected occurs. Even if it is detected more accurately, the operational amplifier 60
The offset voltages or gain differences appear at the outputs of the detectors 51 and 52 input to the delay lock loop, and thus the lock point of the delay lock loop is shifted.

第3図は受信波に含まれる拡散符号信号と受信機内で
発生させる擬似雑音符号信号の位相差と相関出力の関係
を示すグラフであって、同図(A)はドリフトによる変
動のない理想的な場合の相関検出点a,b及び差動増幅器6
0の出力の関係にあることを表わしている。次に相関出
力b点でドリフトによる変動があると、位相にずれが生
じて同図(B)(C)のように夫々追跡点Fが位相遅れ
側でレベルの高低いずれかに狂いを生ずる。
FIG. 3 is a graph showing the relationship between the correlation output and the phase difference between the spread code signal included in the received wave and the pseudo-noise code signal generated in the receiver. FIG. Detection points a and b and differential amplifier 6
This indicates that there is a relationship of 0 output. Next, if there is a fluctuation due to the drift at the correlation output point b, the phase is shifted, and the tracking point F is deviated in either the level of the level on the phase lag side as shown in FIGS.

「発明が解決しようとする問題点」 本発明は前記の温度ドリフト、経年変化等の対策とし
て温度補償回路や特殊部品を使用することによって、回
路の複雑化やコスト上昇を回避することを目的として同
期検出及び同期保持回路を重視して、これを自動的に校
正せんとするにある。
"Problems to be Solved by the Invention" The present invention aims at avoiding the complexity and cost increase of the circuit by using a temperature compensation circuit and special parts as a measure against the above-mentioned temperature drift, aging and the like. The emphasis is placed on the synchronization detection and synchronization holding circuit, and this is to be automatically calibrated.

「問題点を解決するための手段」 しかして本発明は、従来の相関器の入力側に受信モー
ドと校正モードに切換えるスイッチ手段を設け、擬似雑
音発生器の出力信号を1/2,1,3チップ遅延させて受信信
号に乗算,検波,加算する遅延ロックループ中に設けた
CPUにより制御する自動校正装置とするものである。
"Means for solving the problem" Thus, the present invention provides a switch means for switching between the reception mode and the calibration mode on the input side of the conventional correlator, and reduces the output signal of the pseudo noise generator to 1/2, 1, Provided in a delay lock loop that multiplies, detects, and adds to the received signal with a 3-chip delay
It is an automatic calibration device controlled by the CPU.

以下に第1図により本発明の一実施例について説明す
る。
An embodiment of the present invention will be described below with reference to FIG.

「実施例」 第1図は本発明のスペクトラム拡散受信機に対して自
動校正手段を施した回路構成図であり、第2図と同一の
対応部には同一符号を付してある。
[Embodiment] FIG. 1 is a circuit diagram showing the spread spectrum receiver according to the present invention, in which an automatic calibration means is applied to the spread spectrum receiver. Corresponding parts in FIG. 2 are denoted by the same reference numerals.

先づアンテナANTにより受信された信号は、RF増幅器
1に入来し、受信モード接点Rxと校正モード接点Rc間を
CPU17の指令によって切換えられるスイッチ70を経て増
幅器21,22,23,乗算器31,32,33,相関フィルタ41,42,43,
検波器51,52,53、差動増幅器60並びに比較器61からなる
相関器2の入力に加えられる。
First, the signal received by the antenna ANT enters the RF amplifier 1 and passes between the reception mode contact Rx and the calibration mode contact Rc.
Amplifiers 21, 22, 23, multipliers 31, 32, 33, correlation filters 41, 42, 43, via a switch 70 switched by a command of the CPU 17
It is applied to the input of the correlator 2 comprising the detectors 51, 52, 53, the differential amplifier 60 and the comparator 61.

20はA/Dコンバータ、30,40は夫夫D/Aコンバータ、8
はVCO(電圧制御発振器)、9は擬似雑音発生器、10は
シフトレジスタであり、9よりの擬似雑音信号を0,1/2,
1,2チップ遅延させた信号を得ている。11,12は減衰器、
13は加算器、14は乗算器、15はBPF(帯域通過フィル
タ)、16は受信周波数と同一周波数を送出する発振器で
ある。
20 is an A / D converter, 30 and 40 are husband and wife D / A converters, 8
Is a VCO (Voltage Controlled Oscillator), 9 is a pseudo noise generator, 10 is a shift register, and outputs pseudo noise signals from 9 as 0, 1/2,
The signal is delayed by one or two chips. 11,12 are attenuators,
13 is an adder, 14 is a multiplier, 15 is a BPF (Band Pass Filter), and 16 is an oscillator for transmitting the same frequency as the reception frequency.

今、スイッチ70がCPUの指令により校正モードに選択
切換えされたとすると、発振器16はアンテナに入来する
受信周波数と同一の周波数を発振し乗算器14に加えられ
る。
Now, assuming that the switch 70 is selectively switched to the calibration mode by a command from the CPU, the oscillator 16 oscillates at the same frequency as the reception frequency coming into the antenna and is applied to the multiplier 14.

一方、擬似雑音信号発生器9からシフトレジスタ10に
対しPN信号が加えられ、1/2チップ及び3チップ遅延さ
せた信号を減衰器12により減衰させて加算器13に加え更
に乗算器14によって平衡変調即ちスペクトラム拡散変調
される。そこでBPF15により不要帯域を除去し校正接点R
cを経て相関器の入力に受信信号を模擬したものとして
加える。
On the other hand, a PN signal is added from the pseudo-noise signal generator 9 to the shift register 10, and the signal delayed by 1/2 chip and 3 chips is attenuated by the attenuator 12, added to the adder 13, and further balanced by the multiplier 14. Modulation, or spread spectrum modulation. Therefore, unnecessary band is removed by BPF15 and calibration contact R
The received signal is added to the input of the correlator as a simulation through c.

そして上記相関器に入力した模擬信号が増幅された
後、乗算器31,32,33に夫夫加わると、これら乗算器に前
記シフトレジスタの各段から1/2,1,3チップずれた信号
が加えられており、上記PN信号とN−1/2とが上記乗算
器に加えられることになって、同一拡散符号且つビッ
ト,フレームとも同期が得られているので、上記乗算器
において逆拡散され相関フィルタを経て検波器により検
波されて直流電圧がC点に得られる。
After the simulated signal input to the correlator is amplified, the signals are shifted by 1/2, 1, 3 chips from each stage of the shift register to the multipliers 31, 32, 33 when they are added to the multipliers 31, 32, 33, respectively. Is added, and the PN signal and N-1 / 2 are added to the multiplier, so that the same spreading code and the synchronization of both bits and frames are obtained. Then, the signal is detected by a detector via a correlation filter, and a DC voltage is obtained at a point C.

また擬似雑音信号のN−3の成分は乗算器において発
振器16の出力信号と乗算されるが、N−3とN−1/2と
では2.5チップ同期がずれているので逆拡散することは
ない。
The N-3 component of the pseudo-noise signal is multiplied by the output signal of the oscillator 16 in the multiplier, but since N-3 and N-1 / 2 are out of synchronization by 2.5 chips, there is no despreading. .

一般に異なる符号列及び同一符号列でも1チップ以
上、同期がずれていれば相関出力が零つまり無相関であ
るので、前記乗算器に上記シフトレジスタよりのN−1/
2の符号と、擬似雑音信号のN−3とは無相関であり、
N−3はN−1/2にとっては受信信号N−1/2に雑音成分
N−3を加算した信号になっている。
In general, even if a different code sequence and the same code sequence are out of synchronization by one chip or more, the correlation output is zero, that is, there is no correlation.
The code of 2 and the pseudo noise signal N-3 are uncorrelated,
N-3 is a signal obtained by adding the noise component N-3 to the received signal N-1 / 2 for N-1 / 2.

受信機の受波信号成分には熱雑音が加算されていて、
信号成分N−1/2と雑音成分N−3の信号レベルが減衰
器によって受信機の受信条件と合致するように設定する
ので、この模擬信号は将にアンテナにより受波する受信
信号を規模したものとなっている。
Thermal noise is added to the received signal component of the receiver,
Since the signal levels of the signal component N-1 / 2 and the noise component N-3 are set by the attenuator so as to match the receiving conditions of the receiver, this simulated signal generally scales the received signal received by the antenna. It has become something.

次に校正モードにおいては、前記の通り模擬信号は必
らず受信しうる条件にあるから、差動増幅器60の出力電
圧をA/Dコンバータ20を介してCPU内のメモリに記憶させ
ておき、相関器内の相関検出する比較器の出力が反転す
るようにその基準電圧入力側にD/Aコンバータ40を介し
てCPUが指令を出し、D/Aコンバータのバイナリ値を上記
のメモリに記憶する。
Next, in the calibration mode, since the simulation signal is in a condition that can be necessarily received as described above, the output voltage of the differential amplifier 60 is stored in the memory in the CPU via the A / D converter 20, The CPU issues a command to the reference voltage input side via the D / A converter 40 so that the output of the comparator that detects the correlation in the correlator is inverted, and stores the binary value of the D / A converter in the above memory. .

なおスイッチ70を受信モードに切換えたときに受信信
号がアンテナから入来して検波器53に直流出力電圧が現
われると、前記した校正作用によってD/Aコンバータ40
が適切に補正された信号電圧に調整されているため誤動
作は起らない。また相関検出後に同期保持するためにVC
O8の出力周波数を制御し、前記差動増幅器60の出力電圧
つまりA/Dコンバータ20のバイナリ値を校正モード時に
記憶している電圧値と同一電圧になるように、CPUがD/A
コンバータ30に対して指令することにより、遅延ロック
ループが制御される。
Note that when the switch 70 is switched to the reception mode, when a received signal comes in from the antenna and a DC output voltage appears on the detector 53, the D / A converter 40
Is adjusted to an appropriately corrected signal voltage, no malfunction occurs. VC is also used to maintain synchronization after correlation detection.
The CPU controls the D / A so that the output frequency of O8 is controlled and the output voltage of the differential amplifier 60, that is, the binary value of the A / D converter 20 becomes the same voltage as the voltage value stored in the calibration mode.
By instructing converter 30, the delay lock loop is controlled.

前記の校正作用を例えば電源投入の都度実施できるよ
うにすれば、回路部品特性の経年変化による影響を浮け
ることがなくなり、受信機内に設けた温度センサの設定
範囲を逸脱する可能性を予知して校正作用を発揮せしめ
るように、CPUにプログラムを組んでおくことによって
本発明を実施することができる。
For example, if the calibration operation can be performed every time the power is turned on, the influence of the aging of the circuit component characteristics does not float, and the possibility of deviating from the setting range of the temperature sensor provided in the receiver is predicted. The present invention can be implemented by setting a program in the CPU so that the calibration function can be exerted.

「効 果」 かくて本発明によれば、従来の相関器から同期保持信
号と、受信機の受波信号に擬似の雑音信号との同期検波
出力を入力とし、上記同期検波出力の補正と上記擬似雑
音信号発生のためとに指令を送出するCPUを利用し、RF
増幅器の後段に上記CPUの指令により通常の受信モード
と校正モードとに切換えられるスイッチ手段と、上記擬
似雑音信号発生器の出力に遅延をかけた拡散符号を有す
る受信周波数に擬似の周波数を減衰させる手段とを付加
するだけで、上記スイッチ手段に至る遅延ループを形成
することにより、受信波の有する拡散符号に対する同期
検波及び同期保持に確実且つ高精度の校正機能を発揮せ
しめることができる。
[Effect] Thus, according to the present invention, the synchronous detection output of the synchronous holding signal from the conventional correlator and the pseudo noise signal as the received signal of the receiver are input, and the above-described correction of the synchronous detection output is performed. Using a CPU that sends commands to generate pseudo noise signals,
A switch unit which can be switched between a normal reception mode and a calibration mode by a command of the CPU at the subsequent stage of the amplifier, and attenuates the pseudo frequency to a reception frequency having a spread code with a delay applied to the output of the pseudo noise signal generator. By forming a delay loop leading to the above-mentioned switch means only by adding the means, it is possible to exhibit a reliable and highly accurate calibration function for synchronous detection and maintenance of the spread code of the received wave.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の直接スペクトラム拡散受信機の自動校
正装置を表わす回路構成図、第2図は従来のスペクトラ
ム拡散符号化信号の受信機における相関器の回路構成
図、第3図は相関器内の差動増幅器の入力波の位相と出
力との関係を説明するためのグラフである。 1……RF増幅器、2……相関器、21,22,23……増幅器、
31,32,33……乗算器、41,42,43……相関フイルタ、51,5
2,53……検波器、60……差動増幅器、61……比較器、20
……A/Dコンバータ、30,40……D/Aコンバータ、8……V
CO、9……擬似雑音信号の発生器、10……シフトレジス
タ、11,12……減衰器、13……加算器、14……乗算器、1
5……BPF、16……発振器、17……CPU、70……スイッチ
手段。
FIG. 1 is a circuit diagram showing an automatic calibration apparatus for a direct spread spectrum receiver according to the present invention, FIG. 2 is a circuit diagram of a correlator in a conventional spread spectrum coded signal receiver, and FIG. 3 is a correlator. 4 is a graph for explaining the relationship between the phase of the input wave and the output of the differential amplifier in FIG. 1 ... RF amplifier, 2 ... Correlator, 21,22,23 ... Amplifier,
31,32,33 …… Multipliers, 41,42,43 …… Correlation filters, 51,5
2,53 ... Detector, 60 ... Differential amplifier, 61 ... Comparator, 20
…… A / D converter, 30,40 …… D / A converter, 8 …… V
CO, 9 a pseudo noise signal generator, 10 shift registers, 11, 12 attenuators, 13 adders, 14 multipliers, 1
5 ... BPF, 16 ... Oscillator, 17 ... CPU, 70 ... Switch means.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】情報信号に広帯域の拡散符号を乗算して送
信し、これを受信側が逆拡散することにより、狭帯域信
号に復元する直接スペクトラム拡散通信方式の受信機に
おいて、A/D変換した相関器の同期保持信号と、受信機
の受信信号及び擬似雑音信号の同期検出信号とが入力さ
れ、上記相関器に対して校正モード時にD/A変換器を介
して加える上記同期検出信号のスレッショルド電圧を補
正するための指令と、D/A変換器を介してVCOの出力周波
数の制御と、上記相関器への信号入力をアンテナからの
受信信号のRF増幅器出力段で受信モード及び上記校正モ
ードに切換えるスイッチ手段への指令とを発するCPUを
備え、上記擬似雑音信号の発生器の出力信号から1/2,1,
3チップ遅延させる複数段のシフトレジスタと、上記夫
夫遅延させた擬似雑音信号を上記相関器内の乗算器に加
えるとともに、上記1/2及び3チップの遅延した擬似雑
音信号が夫夫別個に加えられる減衰器と、各減衰器の出
力を加算後に受信周波数と同一の周波数を送出する発振
器の出力周波数とともに加えられる乗算器とより成り、
上記スイッチ手段の校正端子に至る制御ループにより同
期検波信号並びに同期保持信号を制御することを特徴と
した直接スペクトラム拡散受信機の自動校正装置。
An A / D conversion is performed in a receiver of a direct spread spectrum communication system in which an information signal is multiplied by a wide band spreading code and transmitted, and the receiving side despreads the signal to restore a narrow band signal. A synchronization holding signal of a correlator, a reception signal of a receiver, and a synchronization detection signal of a pseudo noise signal are input, and a threshold of the synchronization detection signal added to the correlator via a D / A converter in a calibration mode. The command for correcting the voltage, the control of the output frequency of the VCO via the D / A converter, the signal input to the correlator, the reception mode and the calibration mode in the RF amplifier output stage of the reception signal from the antenna. And a CPU for issuing a command to the switch means for switching to a pseudo-noise signal.
A plurality of stages of shift registers for delaying three chips and the pseudo noise signal delayed for each of the above are added to a multiplier in the correlator, and the pseudo noise signals delayed for 1/2 and 3 chips are separately provided. An attenuator that is added, and a multiplier that is added together with an output frequency of an oscillator that sends out the same frequency as the reception frequency after adding the output of each attenuator,
An automatic calibration apparatus for a direct spread spectrum receiver, wherein a synchronous detection signal and a synchronization holding signal are controlled by a control loop reaching a calibration terminal of the switch means.
JP18413389A 1989-07-17 1989-07-17 Automatic calibration device for direct spread spectrum receiver Expired - Fee Related JP2720076B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP18413389A JP2720076B2 (en) 1989-07-17 1989-07-17 Automatic calibration device for direct spread spectrum receiver
US07/604,988 US5029181A (en) 1989-07-17 1990-10-25 Automatic calibration device for direct spectrum spread receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18413389A JP2720076B2 (en) 1989-07-17 1989-07-17 Automatic calibration device for direct spread spectrum receiver

Publications (2)

Publication Number Publication Date
JPH0348540A JPH0348540A (en) 1991-03-01
JP2720076B2 true JP2720076B2 (en) 1998-02-25

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP18413389A Expired - Fee Related JP2720076B2 (en) 1989-07-17 1989-07-17 Automatic calibration device for direct spread spectrum receiver

Country Status (2)

Country Link
US (1) US5029181A (en)
JP (1) JP2720076B2 (en)

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FR2654563B1 (en) * 1989-11-15 1992-01-24 Cornec Jean Paul METHOD OF SEARCHING FOR SYNCHRONIZATION ON RECEPTION OF A MODULATED SPREAD SPECTRUM SIGNAL.
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US5029181A (en) 1991-07-02

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