JPH08237168A - Spread spectrum communication equipment - Google Patents

Abstract

PURPOSE: To make the circuit for the communication equipment small by comparing the deviation between a peak of an output of a correlator and an output of an oscillator in terms of timing and shifting a phase of the output of the oscillator according to the deviation thereby attaining high speed synchronization of the spread spectrum communication. CONSTITUTION: A timing comparator 14 compares a peak timing signal from a peak detector 12 with an output signal from an oscillator 13, measures a timing deviation of the both and outputs a phase shift signal to a phase shift circuit 15 depending on the deviation. Then the circuit 15 shifts the phase of the output signal of the oscillator 13 depending on the phase shift signal received from the comparator 14. The oscillator 13 outputs a clock signal with a frequency nearly equal to a tip speed of a spread code of a transmitter side to the comparator 14 together with the peak timing signal, the deviation in both the timing signals is measured and the phase shift signal depending on the deviation is outputted to the circuit 15.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a spread spectrum communication device and a communication system.

[0002]

2. Description of the Related Art A spread spectrum communication system uses a spread code sequence such as a pseudo noise code (PN code) from a normally transmitted digital signal to generate a signal having an extremely wider bandwidth than the original data. It is converted into an RF (radio frequency) signal and transmitted. On the receiving side, the same spreading code for demodulation as on the transmitting side is used to perform despreading (spread demodulation) that correlates with the received signal and convert the received signal into a narrowband signal having a bandwidth corresponding to the original data. . Then, normal data demodulation is performed to reproduce the original data.

At this time, in the demodulation spread code, the correlation output is lowered and the S / N is deteriorated unless the received signal, the clock frequency and the code phase are completely matched. Therefore, a synchronizing circuit for synchronizing the received signal and the demodulation spread code is necessary and important.

As such a synchronizing circuit, Japanese Patent Application No. 6-1 is used.
5331: Synchronize by correlating the received signal with the reference signal generated inside the receiving device, comparing the phase of the correlation peak with the timing signal indicating the generation timing of the reference signal, and performing phase control using a voltage controlled oscillator. The method of taking is disclosed.

According to this method, it is possible to realize the synchronization acquisition for rough synchronization and the synchronization follow-up for highly accurate synchronization in the same circuit, and to reduce the circuit scale.

[0006]

However, in the above-mentioned conventional example, the output of the voltage-controlled oscillator serves as a reproduction clock at the time of data reproduction, and therefore it is necessary to select one having a sufficiently small jitter with respect to the clock frequency. In that case, the loop gain is limited and the phase locked loop (PL
The L) pull-in speed is limited, and the data transmission speed is reduced.

Further, since a relatively large element such as a voltage controlled oscillator is used, it is not suitable for further miniaturization of the circuit scale.

[0008]

According to the present invention, in order to solve such a problem, a correlating means for correlating a received signal with a reference code, an oscillating means, and an output of the correlation detecting means. It is configured to have a phase shift means for shifting the phase of the output of the oscillating means in accordance with the shift between the peak timing signal and the timing signal output from the oscillating means.

With this configuration, since the phase is synchronized by shifting the phase of the oscillator output, a voltage controlled oscillator or the like is not required and the circuit can be miniaturized. Further, after the correlation peak is detected from the received signal, the phase synchronization is captured without being affected by the response speed of the PLL, etc., so that the synchronization can be captured at high speed and the substantial data transmission rate can be increased.

[0010]

1 is a basic block diagram of a receiver of a spread spectrum communication system according to the present invention. In FIG. 1, the received signal is subjected to processing such as amplification and filtering by the high frequency unit 21, and is output as it is as the input frequency or converted to the intermediate frequency or the baseband frequency. The output from the high frequency unit 21 is input to the synchronization unit 22,
Clock reproduction and code synchronization of the spread code are performed, the data is input to the demodulation unit 23, and data demodulation is performed. Demodulation unit 23
Generates a demodulation code according to the code synchronization signal and the reproduction clock input from the synchronization unit 22, and despreads the received signal.

FIG. 2 is a block diagram of the synchronization unit 22 of the receiver of the spread spectrum communication system embodying the present invention. Reference numeral 11 is a correlator that correlates the received signal with the reference code. As the correlator 11, a correlator having a reference symbol written therein (for example, a delay line with a surface acoustic wave tap) or an external input (for example, a surface acoustic wave convolver or a digital matched filter) can be used. is there.

Reference numeral 12 is a peak detector that detects a relatively large peak signal from the output signal of the correlator 11 and outputs a peak timing signal. Reference numeral 13 is a crystal oscillator or a temperature-compensated crystal oscillator that outputs a stable frequency. Is an oscillator,
This frequency is substantially equal to the clock frequency used for spread modulation on the transmitting side.

Reference numeral 14 compares the peak timing signal from the peak detector 12 with the output signal from the oscillator 13,
A timing comparator that measures the timing shift between the two and outputs a phase shift signal to the phase shift circuit 15 in accordance with the shift amount. Reference numeral 15 denotes an oscillator 13 that outputs a phase shift signal from the oscillator 13 according to the phase shift signal input from the timing comparator 14. It is a phase shift circuit that shifts the phase of an output signal.

The phase shift circuit 15 is constructed, for example, as shown in FIG. In FIG. 3, the output of the oscillator 13 is input to a circuit in which delay circuits having delay amounts of substantially equal intervals are cascaded,
A signal delayed by a desired time, that is, a phase-shifted signal is output from each delay circuit. One of the plurality of signals is selected according to the phase shift signal and is output as a reproduction clock. Here, the delay amount T of N delay circuits connected in cascade
Is set to 1 / (N + 1) times the cycle of the output signal from the oscillator 13, the reproduced clock can be selected at a phase interval of 360 / (N + 1) deg. As the value of N,
The larger the value, the higher the accuracy of the selected phase, and N is preferably 3 or more.

FIG. 4 is a schematic illustration of signals output from each block. The operation of this configuration will be described with reference to FIGS. In this configuration, the received signal that has been subjected to appropriate signal processing in the high frequency unit 21 is subjected to correlation calculation with the reference code in the correlator 11, and when the reference code and the received signal match, a relatively large peak. Output is obtained. This correlation output is input to the peak detector 12, and the peak detector 12 generates and outputs a peak timing signal indicating a peak position with respect to the peak output exceeding a threshold value which is set variably or fixedly.

A clock having a frequency substantially equal to the chip speed of the transmission side spreading code is output from the oscillator 13 and input to the timing comparator 14 together with the peak timing signal.
The timing shift between the two is measured, and a phase shift signal corresponding to the shift amount is output to the phase shift circuit 15. The relationship between the shift amount and the phase shift amount is determined in consideration of circuit delay and the like. The phase shift circuit 15 receives the phase shift signal, phase shifts the output signal from the oscillator 13, and outputs it as a reproduction clock.

The reproduced clock is input to the demodulator 23 together with the code synchronization signal, and data demodulation is performed. The code synchronization signal is generated from the peak timing signal.

FIG. 5 shows an embodiment in which an element / circuit for externally inputting a reference signal, such as a surface acoustic wave convolver, is used as the correlator. In this embodiment, the same members as those in the first embodiment are designated by the same reference numerals. In this embodiment, the recovered clock output from the phase shift circuit 15 is input to the reference code generator 16, and the reference code generator 1
The difference from the first embodiment is that the reference code output from 6 is input to the correlator 11.

When the reference code is written inside the correlator, the peak timing signal is used as the code synchronization signal, but when the reference code is input from outside the correlator, the counter 17 creates the code synchronization signal.

The reference code generator 16 outputs a code start signal at the code start point of the reference code. The counter 17 counts the reproduction clock from the input of the code start signal to the input of the peak timing signal. When the count value is K, the counter 17 outputs a code synchronization signal when counting K reproduced clocks after the peak timing signal is input. When the code synchronization signal is input, the reference code generator 16 and the demodulation unit 23 generate the reference code and the demodulation code from the code start point.

Also in this embodiment, the same effect as that of the first embodiment can be obtained. In addition, the clock input to the reference code generator 16 is not the reproduction clock but the oscillator 1
The same action and effect can be obtained with the signal output from 3.

[0022]

As described above, according to the present invention,
Since the clock is reproduced by phase-shifting the signal output from the oscillator, the time required for synchronization pull-in can be shortened, and the substantial transmission speed can be improved.
Further, the size can be reduced.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a spread spectrum communication receiver according to the present invention.

FIG. 2 is a block diagram showing a first embodiment of the present invention.

FIG. 3 is a block diagram showing an example of a phase shift circuit.

FIG. 4 is a schematic explanatory diagram of an output signal from each block.

FIG. 5 is a block diagram showing a second embodiment of the present invention.

[Explanation of symbols]

 11 Correlator 12 Peak Detector 13 Oscillator 14 Timing Comparator 15 Phase Shift Circuit

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Rie Suzuki 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc.

Claims (6)

[Claims] 1. Correlation means for correlating a received signal with a reference code, oscillating means, and oscillating according to a deviation between a peak timing signal output from the correlating means and a timing signal output from the oscillating means. A spread spectrum communication device comprising phase shift means for shifting the phase of the output of the means. 2. The spread spectrum communication device according to claim 1, wherein the phase shift means is a delay line. 3. The spread spectrum communication device according to claim 1, wherein the correlating means is a surface acoustic wave tapped delay line. 4. The spread spectrum communication device according to claim 1, wherein the correlating means is a surface acoustic wave convolver. 5. The spread spectrum communication device according to claim 1, wherein the oscillating means generates a signal having a frequency substantially equal to the clock of the received signal. 6. The spread spectrum communication device according to claim 1, further comprising counter means for generating a code synchronization signal in accordance with a phase difference between the code start of the reference code and the peak timing signal. .