JP2698452B2 - Resin-sealed semiconductor device and method of assembling the same - Google Patents

Resin-sealed semiconductor device and method of assembling the same

Info

Publication number
JP2698452B2
JP2698452B2 JP1246424A JP24642489A JP2698452B2 JP 2698452 B2 JP2698452 B2 JP 2698452B2 JP 1246424 A JP1246424 A JP 1246424A JP 24642489 A JP24642489 A JP 24642489A JP 2698452 B2 JP2698452 B2 JP 2698452B2
Authority
JP
Japan
Prior art keywords
bonding pad
lead
resin
semiconductor device
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1246424A
Other languages
Japanese (ja)
Other versions
JPH03109747A (en
Inventor
智行 島田
和彦 瀬良
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP1246424A priority Critical patent/JP2698452B2/en
Publication of JPH03109747A publication Critical patent/JPH03109747A/en
Application granted granted Critical
Publication of JP2698452B2 publication Critical patent/JP2698452B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Microelectronics & Electronic Packaging (AREA)
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  • Wire Bonding (AREA)

Description

【発明の詳細な説明】 （産業上の利用分野） 本発明は、半導体チップとリードフレームを電気的に
接続する樹脂封止型半導体装置及びその組立方法に関す
るものである。Description: TECHNICAL FIELD The present invention relates to a resin-sealed semiconductor device for electrically connecting a semiconductor chip and a lead frame, and a method for assembling the same.

（従来の技術） 従来、このような分野の技術としては、例えば以下に
示すようなものがあった。(Prior Art) Conventionally, there are, for example, the following techniques in such a field.

第４図はかかる従来の第１の先行技術を示す樹脂封止
型半導体装置の部分平面図、第５図はその半導体装置の
部分断面図である。FIG. 4 is a partial plan view of a resin-sealed semiconductor device showing the first prior art of the prior art, and FIG. 5 is a partial sectional view of the semiconductor device.

これらの図において、１はリードフレームのダイパッ
ド部、２はリードフレームのリード部、３はダイパッド
部１に接着されたICチップ等の半導体チップ、４は半導
体チップ３上のボンディングパッド部、５は半導体チッ
プ３上のボンディングパッド部４とリード部２とにワイ
ヤボンディングされた金線ワイヤである。In these figures, 1 is a die pad portion of a lead frame, 2 is a lead portion of a lead frame, 3 is a semiconductor chip such as an IC chip adhered to the die pad portion 1, 4 is a bonding pad portion on the semiconductor chip 3, and 5 is It is a gold wire wire-bonded to the bonding pad 4 and the lead 2 on the semiconductor chip 3.

ここで、上記半導体装置を組み立てるには、半導体チ
ップ３をダイパッド部１上に装着し、リードフレームの
リード部２と半導体チップ３上のボンディングパッド部
４との間を金線５でワイヤボンディングする。Here, in order to assemble the semiconductor device, the semiconductor chip 3 is mounted on the die pad portion 1 and wire bonding is performed between the lead portion 2 of the lead frame and the bonding pad portion 4 on the semiconductor chip 3 with a gold wire 5. .

また、従来の第２の先行技術として、第６図及び第７
図に示すように、絶縁基板11上のダイオードアレイ12に
千鳥状に配列された端子13を配置するとともに、絶縁基
板11上に設けられた導線14の先端部にも千鳥状に配列さ
れた接続端子15を設け、接続ワイヤ16,17により、ワイ
ヤボンディングを行い、高密度実装を行うようにしたも
のがある（例えば、実開昭62−180943号参照）。FIGS. 6 and 7 show conventional second prior art.
As shown in the figure, the terminals 13 arranged in a zigzag pattern are arranged on the diode array 12 on the insulating substrate 11, and the connection lines arranged in a zigzag pattern also at the tip of the conductive wire 14 provided on the insulating substrate 11. A terminal 15 is provided, and wire bonding is performed by connecting wires 16 and 17 to perform high-density mounting (for example, see Japanese Utility Model Application Laid-Open No. 62-180943).

（発明が解決しようとする課題） しかしながら、近年、半導体装置の多ピン化（ファイ
ンピッチ化）が要求されるようになり、半導体チップも
大型化される傾向にある。この場合、前記した第１の先
行技術においては、ホンディングパッドピッチの最小値
があるため、半導体チップの大型化は避けられない状態
である。(Problems to be Solved by the Invention) However, in recent years, it has been required to increase the number of pins (fine pitch) of a semiconductor device, and the size of a semiconductor chip tends to be increased. In this case, in the first prior art described above, there is a minimum value of the bonding pad pitch, so that it is inevitable that the semiconductor chip becomes larger.

また、第２の先行技術においては、接続ワイヤ長が長
いためにワイヤ垂れが起こったり、樹脂封止時に樹脂の
応力により変形したり、またワイヤ高が高くなり、薄型
化のためにワイヤ高を抑える工程が必要になる等の問題
があった。Further, in the second prior art, the wire is sagged due to a long connection wire length, deformed by resin stress during resin sealing, and the wire height is increased. There were problems such as a need for a step of suppressing them.

本発明は、上記問題点を除去し、リード部の接続が良
好で、しかも高密度実装を行い得る信頼性の優れた樹脂
封止型半導体装置及びその組立方法を提供することを目
的とする。SUMMARY OF THE INVENTION It is an object of the present invention to provide a resin-encapsulated semiconductor device which eliminates the above-mentioned problems, has good connection of the lead portions, and can be mounted at high density, and has excellent reliability.

（課題を解決するための手段） 本発明は、上記目的を達成するために、半導体チップ
とリード部間を電気的に接続し、樹脂封止する樹脂封止
型半導体装置において、前記半導体チップの周辺部に設
けられる第１のボンディングパッドと、この第１のボン
ディングパッドの内側に設けられる第２のボンディング
パッドと、この第２のボンディングパッドとリード部の
インナリード間に施されるTAB手段と、前記第１のボン
ディングパッドとリード部のインナリード間に前記TAB
手段のテープ上を経由して施されるワイヤボンディング
手段とを設けるようにしたものである。(Means for Solving the Problems) In order to achieve the above object, the present invention provides a resin-encapsulated semiconductor device in which a semiconductor chip and a lead portion are electrically connected and resin-encapsulated. A first bonding pad provided in a peripheral portion, a second bonding pad provided inside the first bonding pad, and TAB means provided between the second bonding pad and an inner lead of a lead portion. The TAB between the first bonding pad and the inner lead of the lead portion.
And a wire bonding means provided via a tape of the means.

また、半導体チップとリード部間を電気的に接続し、
樹脂封止する樹脂封止型半導体装置の組立方法におい
て、前記半導体チップの周辺部に第１のボンディングパ
ッドを形成する工程と、この第１のボンディングパッド
の内側に第２のボンディンパッドを形成する工程と、こ
の第２のボンディングパッドとリード部のインナリード
間にTABを行う工程と、前記第１のボンディングパッド
とリード部のインナリード間に前記TAB手段のテープ上
を経由してワイヤボンディングを行う工程とを有するよ
うにしたものである。Also, electrically connect the semiconductor chip and the lead,
In a method for assembling a resin-encapsulated semiconductor device for encapsulating resin, a step of forming a first bonding pad around the semiconductor chip, and forming a second bond pad inside the first bonding pad Performing TAB between the second bonding pad and the inner lead of the lead portion, and performing wire bonding between the first bonding pad and the inner lead of the lead portion via the tape of the TAB means. And a step of performing the following.

更に、上記工程（ｃ）と工程（ｄ）を入れ換えるよう
にしてもよい。Further, the steps (c) and (d) may be interchanged.

（作用） 本発明によれば、上記したように、半導体チップの内
側にボンディングパッド部を追加し、そのボンディング
パッド部とリード部とをTAB（Tape Automated Bondin
g）することにより、半導体装置の多ピン化（ファイン
ピッチ化）が可能になり、例えば金線ワイヤでのワイヤ
長が長くなることによるワイヤボンディング不良、モー
ルド成形時のワイヤ流れ等をなくすことができる。(Operation) According to the present invention, as described above, a bonding pad portion is added inside a semiconductor chip, and the bonding pad portion and the lead portion are connected to each other by TAB (Tape Automated Bonding).
g) makes it possible to increase the number of pins (fine pitch) of the semiconductor device. For example, it is possible to eliminate wire bonding defects due to a longer wire length of a gold wire, a wire flow during molding, and the like. it can.

（実施例） 以下、本発明の実施例について図面を参照しながら詳
細に説明する。(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

第１図は本発明の一実施例を示す樹脂封止型半導体装
置の部分平面図、第２図はその樹脂封止型半導体装置の
部分断面図である。FIG. 1 is a partial plan view of a resin-sealed semiconductor device showing one embodiment of the present invention, and FIG. 2 is a partial cross-sectional view of the resin-sealed semiconductor device.

第１図において、リードフレームのダイパッド21に半
導体チップ23をAgペースト等で接着し、搭載する。従来
設けられているものと同様の第１のボンディングパッド
24より内側に第２のボンディングパッド25を設け、その
第２のボンディングパッド25とリード部22との間を錫リ
ード27でTABを行う。ここで、28は錫リード27に接着さ
れているポリイミドテープである。更に、第１のボンデ
ィングパッド24とリード部22とを金線26でワイヤボンデ
ィングする。In FIG. 1, a semiconductor chip 23 is bonded to a die pad 21 of a lead frame with an Ag paste or the like and mounted. First bonding pad similar to that conventionally provided
A second bonding pad 25 is provided inside 24, and TAB is performed between the second bonding pad 25 and the lead portion 22 with a tin lead 27. Here, reference numeral 28 denotes a polyimide tape adhered to the tin lead 27. Further, the first bonding pad 24 and the lead portion 22 are wire-bonded with the gold wire 26.

次に、本発明の一実施例を示す第１の樹脂封止型半導
体装置の組立方法について第３図を参照しながら説明す
る。Next, a method of assembling a first resin-encapsulated semiconductor device according to an embodiment of the present invention will be described with reference to FIG.

まず、第３図（ａ）に示すように、リードフレームの
ダイパッド21に半導体チップ23をAgペースト等で接着
し、搭載すると共に、半導体チップ23の外部周辺にはリ
ード部22を形成する。そして、半導体チップ23の周辺部
に第１のボンディングパッド24を、その内側に第２のボ
ンディングパッド25をそれぞれ形成する。First, as shown in FIG. 3A, a semiconductor chip 23 is adhered to a die pad 21 of a lead frame with an Ag paste or the like, and mounted, and a lead portion 22 is formed around the outside of the semiconductor chip 23. Then, a first bonding pad 24 is formed around the semiconductor chip 23, and a second bonding pad 25 is formed inside the first bonding pad 24.

次に、第３図（ｂ）に示すように、第２のボンディン
グパッド25とリード部22との間でTABを行う。つまり、
ポリイミドテープ28が付いた錫リード27により、第２の
ボンディングパッド25とリード部22との間を電気的に接
続する。Next, as shown in FIG. 3B, TAB is performed between the second bonding pad 25 and the lead portion 22. That is,
The tin lead 27 with the polyimide tape 28 electrically connects the second bonding pad 25 to the lead 22.

次に、第３図（ｃ）に示すように、第１のボンディン
グパッド24とリード部22との間でワイヤボンディングを
行う。つまり、金線26により第１のボンディングパッド
24とリード部22との間を電気的に接続する。Next, as shown in FIG. 3 (c), wire bonding is performed between the first bonding pad 24 and the lead portion 22. That is, the first bonding pad is
24 and the lead 22 are electrically connected.

上記した第１の樹脂封止型半導体装置の組立方法によ
れば、ワイヤボンディングにおける金線26が垂れるのを
ポリイミドテープ28が受けることにより、ワイヤ垂れを
防止することができる利点がある。According to the first method of assembling the resin-encapsulated semiconductor device described above, the polyimide tape 28 receives the sagging of the gold wire 26 in the wire bonding, so that there is an advantage that the sagging of the wire can be prevented.

次に、本発明の一実施例を示す第２の樹脂封止型半導
体装置の組立方法について、第８図を参照しながら説明
する。Next, a method of assembling a second resin-sealed semiconductor device according to an embodiment of the present invention will be described with reference to FIG.

まず、第８図（ａ）に示すように、リードフレームの
ダイパッド部21に半導体チップ23をAgペースト等で接着
し、搭載すると共に、半導体チップ23の外部周辺にはリ
ード部22を形成する。そして、半導体チップ23の周辺部
に第１のボンディングパッド24を、その内側に、第２の
ボンディングパッド25をそれぞれ形成する。First, as shown in FIG. 8A, a semiconductor chip 23 is adhered to a die pad portion 21 of a lead frame with an Ag paste or the like and mounted, and a lead portion 22 is formed around the outside of the semiconductor chip 23. Then, a first bonding pad 24 is formed around the semiconductor chip 23, and a second bonding pad 25 is formed inside the first bonding pad 24.

次に、第８図（ｂ）に示すように、第１のボンディン
グパッド24とリード部22との間でワイヤボンディングを
行う。つまり、金線26により第１のボンディングパッド
24とリード部22との間を電気的に接続する。Next, as shown in FIG. 8 (b), wire bonding is performed between the first bonding pad 24 and the lead portion 22. That is, the first bonding pad is
24 and the lead 22 are electrically connected.

次に、第８図（ｃ）に示すように、第２のボンディン
グパッド25とリード部22との間でTABを行う。つまり、
ポリイミドテープ28が付いた錫リード27により、第２の
ボンディングパッド25とリード部22との間を電気的に接
続する。Next, as shown in FIG. 8C, TAB is performed between the second bonding pad 25 and the lead portion 22. That is,
The tin lead 27 with the polyimide tape 28 electrically connects the second bonding pad 25 to the lead 22.

上記した第２の樹脂封止型半導体装置の組立方法は、
ワイヤボンディングにおける金線26の高さを抑える工程
を、TAB時に同時に行うことができるという利点を有す
る。The method for assembling the second resin-encapsulated semiconductor device described above includes:
There is an advantage that the step of suppressing the height of the gold wire 26 in the wire bonding can be performed simultaneously with the TAB.

このように、従来の第１のボンディングパッド24より
内側に第２のボンディングパッド25を設け、TAB接続及
びワイヤボンディング（インナリードボンディング及び
アウタリードボンディング）を行うことにより、半導体
装置の多ピン化（ファインピッチ化）が可能になる。更
に、ワイヤ長が長くなっても、ワイヤボンディング不良
は起こらず、また、ポリイミドテープ28の存在により、
モールド成形時のワイヤ流れをなくすことができる。Thus, by providing the second bonding pad 25 inside the conventional first bonding pad 24 and performing TAB connection and wire bonding (inner lead bonding and outer lead bonding), the number of pins of the semiconductor device can be increased ( Fine pitch). Furthermore, even if the wire length is long, wire bonding failure does not occur, and the presence of the polyimide tape 28 allows
The wire flow during molding can be eliminated.

なお、錫リードは必ずしも錫である必要性はなく、他
の導電金属であってもよい。また、ダイパッド部は必ず
しも設ける必要性はない。Note that the tin lead does not necessarily need to be tin, and may be another conductive metal. It is not necessary to provide the die pad part.

更に、上記実施例においては、全てTAB接続を行うの
ではないので、リードが太くなることによってファイン
ピッチ化を阻害することもない。そして、TABリードの
場合、ファインピッチ化によるモールド成形時に樹脂が
TABリード間に入らなくなってしまうという従来の問題
を解決することができ、信頼性の高い樹脂封止型半導体
装置を提供することができる。Further, in the above embodiment, since not all TAB connections are made, there is no hindrance to fine pitching due to thick leads. And in the case of TAB leads, the resin is
It is possible to solve the conventional problem of not being able to enter between the TAB leads, and to provide a highly reliable resin-encapsulated semiconductor device.

また、従来のボンディングパッドのみを使用したい場
合は、金線のみでワイヤボンディングさせることもでき
る。If it is desired to use only conventional bonding pads, wire bonding can be performed using only gold wires.

なお、本発明は上記実施例に限定されるものではな
く、本発明の趣旨に基づいて種々の変形が可能であり、
これらを本発明の範囲から排除するものではない。It should be noted that the present invention is not limited to the above embodiment, and various modifications are possible based on the gist of the present invention.
They are not excluded from the scope of the present invention.

（発明の効果） 以上、詳細に説明したように、本発明によれば、半導
体チップの内側にボンディングパッド部を追加し、その
ボンディングパッド部とリード部とをTAB接続させるこ
とにより、半導体装置の多ピン化（ファインピッチ化）
が可能になり、例えば金線のワイヤ長が長くなることに
よる、ワイヤボンディング不良、或いはモールド成形時
のワイヤ流れをなくすことができ、品質の向上を図るこ
とができる。(Effects of the Invention) As described above in detail, according to the present invention, a bonding pad portion is added inside a semiconductor chip, and the bonding pad portion and the lead portion are TAB-connected to each other. High pin count (fine pitch)
For example, it is possible to eliminate wire bonding failure or wire flow during molding due to an increase in the wire length of a gold wire, and to improve quality.

また、上記した第１の樹脂封止型半導体装置の組立方
法によれば、ワイヤボンディングにおける金線が垂れる
のをポリイミドテープが受けることによりワイヤ垂れを
防止することができる。Further, according to the first method of assembling the resin-encapsulated semiconductor device described above, the sagging of the gold wire in the wire bonding can be prevented by the polyimide tape receiving the sagging of the wire.

更に、上記した第２の樹脂封止型半導体装置の組立方
法によるときは、ワイヤボンディングにおける金線の高
さを抑える工程をTAB時に同時に行うことができる。Furthermore, when the above-described second method of assembling the resin-encapsulated semiconductor device is used, the step of suppressing the height of the gold wire in the wire bonding can be performed simultaneously with the TAB.

【図面の簡単な説明】[Brief description of the drawings]

第１図は本発明の実施例を示す樹脂封止型半導体装置の
部分平面図、第２図はその半導体装置の部分断面図、第
３図は本発明の一実施例を示す樹脂封止型半導体装置の
組立工程図、第４図は従来の第１の先行技術を示す樹脂
封止型半導体装置の部分平面図、第５図はその半導体装
置の部分断面図、第６図は従来の第２の先行技術を示す
他の半導体装置の部分平面図、第７図はその半導体装置
の部分側面図、第８図は本発明の他の実施例を示す樹脂
封止型半導体装置の組立工程図である。 21……ダイパッド部、22……リード部、23……半導体チ
ップ、24……第１のボンディングパッド、25……第２の
ボンディングパッド、26……金線ワイヤ、27……錫リー
ド、28……ポリイミドテープ。FIG. 1 is a partial plan view of a resin-sealed type semiconductor device showing an embodiment of the present invention, FIG. 2 is a partial cross-sectional view of the semiconductor device, and FIG. 3 is a resin-sealed type showing one embodiment of the present invention. FIG. 4 is a partial plan view of a resin-encapsulated semiconductor device showing a first prior art of the prior art, FIG. 5 is a partial sectional view of the semiconductor device, and FIG. 2 is a partial plan view of another semiconductor device showing the prior art 2, FIG. 7 is a partial side view of the semiconductor device, and FIG. 8 is an assembly process diagram of a resin-sealed semiconductor device showing another embodiment of the present invention. It is. 21 ... Die pad part, 22 ... Lead part, 23 ... Semiconductor chip, 24 ... First bonding pad, 25 ... Second bonding pad, 26 ... Gold wire, 27 ... Tin lead, 28 ... Polyimide tape.

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】半導体チップとリード部間を電気的に接続
し、樹脂封止する樹脂封止型半導体装置において、 （ａ）前記半導体チップの周辺部に設けられる第１のボ
ンディングパッドと、 （ｂ）該第１のボンディングパッドの内側に設けられる
第２のボンディングパッドと、 （ｃ）該第２のボンディングパッドとリード部のインナ
リード間に施されるTAB手段と、 （ｄ）前記第１のボンディングパッドとリード部のイン
ナリード間に前記TAB手段のテープ上を経由して施され
るワイヤボンディング手段とを具備する樹脂封止型半導
体装置。1. A resin-encapsulated semiconductor device for electrically connecting a semiconductor chip and a lead portion and encapsulating with a resin, wherein: (a) a first bonding pad provided on a peripheral portion of the semiconductor chip; b) a second bonding pad provided inside the first bonding pad; (c) TAB means provided between the second bonding pad and an inner lead of a lead portion; and (d) the first bonding pad. And a wire bonding means provided between the bonding pad and the inner lead of the lead part via the tape of the TAB means. 【請求項２】半導体チップとリード部間を電気的に接続
し、樹脂封止する樹脂封止型半導体装置の組立方法にお
いて、 （ａ）前記半導体チップの周辺部に第１のボンディング
パッドを形成する工程と、 （ｂ）該第１のボンディングパッドの内側に第２のボン
ディンパッドを形成する工程と、 （ｃ）該第２のボンディングパッドとリード部のインナ
リード間にTABを行う工程と、 （ｄ）前記第１のボンディングパッドとリード部のイン
ナリード間に前記TAB手段のテープ上を経由してワイヤ
ボンディングを行う工程とを有する樹脂封止型半導体装
置の組立方法。2. A method of assembling a resin-encapsulated semiconductor device in which a semiconductor chip and a lead portion are electrically connected and resin-encapsulated, wherein: (a) forming a first bonding pad on a peripheral portion of the semiconductor chip; (B) forming a second bond pad inside the first bonding pad; and (c) performing TAB between the second bonding pad and the inner lead of the lead portion. (D) performing wire bonding between the first bonding pad and the inner lead of the lead via the tape of the TAB means.
JP1246424A 1989-09-25 1989-09-25 Resin-sealed semiconductor device and method of assembling the same Expired - Fee Related JP2698452B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1246424A JP2698452B2 (en) 1989-09-25 1989-09-25 Resin-sealed semiconductor device and method of assembling the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1246424A JP2698452B2 (en) 1989-09-25 1989-09-25 Resin-sealed semiconductor device and method of assembling the same

Publications (2)

Publication Number Publication Date
JPH03109747A JPH03109747A (en) 1991-05-09
JP2698452B2 true JP2698452B2 (en) 1998-01-19

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KR100476925B1 (en) 2002-06-26 2005-03-17 삼성전자주식회사 Semiconductor chip having pad arrangement for preventing bonding failure and signal skew of pad

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