JP2685253B2 - Method for forming an electrical interconnect in a silicon semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention includes (a) a step of forming a contact region on the surface of a semiconductor device.

(B) Forming contact islands having a titanium silicide layer covering the contact regions.

(C) A step of depositing silicon oxide on the separation layer.

(D) A step of forming a contact opening where the contact island is exposed in the separation layer.

(E) Filling the contact openings with a localized element of tungsten or molybdenum.

(F) forming a metal layer of the interconnect on the isolation layer and contacting the localized element of tungsten or molybdenum in the contact opening.

The present invention relates to a method of forming an electrical interconnect on a semiconductor device having a silicon substrate of.

Semiconductor devices, and in particular integrated circuits, are currently made using aluminum or alloys of aluminum as the material for contact connections and interconnect structures with the surface of silicon. However, the ever-changing technological trends make it obvious that the integrated functions are complicated and the operation speed is increased, and as a result, the components for these functions are becoming smaller and smaller.

Under such circumstances, aluminum has been used for contact connections on doped regions of semiconductors with at least very shallow depth and small lateral dimensions for certain methods of manufacturing circuits with very high integration densities. It turns out that is subject to great restrictions.

Therefore, a contact connection technology using a super refractory metal silicide such as titanium silicide as a material for a contact connection portion on the surface of a semiconductor, in particular, a contact island which is self-aligned with a contact area provided on the surface of a device is used. It is currently used in the field of large scale integrated circuits because it allows it to be made and, if desired, is self-aligned as a silicon gate in the case of MOS transistors.

With respect to the formation of interconnections in the form of higher levels than the first level, in particular for the purpose of forming electrical (vertical) interconnections between different levels of interconnections with diameter dimensions of the order of 1 μm or less. Constant efforts have been made to determine which is the most suitable technique. In practice, such a reduction in size is desirable to obtain the desired very high integration densities. In this regard, the great difficulty is due to the fact that the contact opening in the insulating isolation layer is relatively deep with respect to its diameter (depth / diameter ratio of approximately 1 or more). Conventional metallization techniques can no longer be used to properly fill contact openings having such geometries.

Among the methods that come to mind to solve this difficulty, it was considered to obtain the metal shape of the interconnect in two steps,
That is, the first step is to fill at least a considerable portion of the contact opening with a localized element of a super refractory metal, for example tungsten or molybdenum, obtained for example by selective growth or by uniform deposition with partial etching. And the second step consists only of coating the structure with a metal layer and then cutting it into the desired shape.

Test results on the use of several contact connection methods and in particular the method described at the beginning are "Proceeding of the Workshop on Tungsten and Other Refractory Metals for VLSI Applications". the workshop on tungsten and other
refractory metals for VLSI application) '' II, 1986
RC Ellwanger, JE Schmitz, RAWolters and A. of the year.
“The Contact Properties.” By J. van Dijk
Qi TiSi ₂ and the adhesion within submicron contact holes of etched back. CVD W / Adhesion Layer Films (The contact properties to TiSi ₂ and the adhe
sion within submicron contact holes of etched−bac
k CVD W / adhesion layer films) ”.

In this related method, the operation of providing the contact opening in the separation layer is fairly critical.

In fact, the bottom of the opening is composed of a silicide layer and its etching selectivity with respect to the oxide of the isolation layer is not very high. Therefore, the silicide layer may be damaged during etching of the contact opening.

With the exception of this difficulty, the present invention aims at obtaining a method in which the etching operation of the contact openings is less critical and keeps the contact between the semiconductor material and the silicide layer intact.

To this end, the invention has the following features:
That is, after the steps described at the beginning and before the steps, a contact island is completed by coating the titanium silicide layer with a titanium nitride layer and the titanium nitride layer with a supplemental metal layer of tungsten or molybdenum. Characterize.

Therefore, during the process of etching the contact openings in the isolation layer 1, the resulting etching depth is complemented.
mentary) limited by the metal layer. In this case, the etching selectivity of the separating material (for example silicon dioxide) with respect to tungsten or molybdenum is excellent, so that the etching operation can be lengthened without the possibility of attacking the supplemental metal layer at the bottom of the opening. This method makes it possible in a very reliable manner to provide contact openings with different depths on the same substrate as a result of the so-called planarization operation of the separating layer.

On the other hand, the supplemental metal layer is obtained directly in localized form, so that no special etching mask is required. It should also be noted that the supplemental metal layer has the function of not imposing tight control of its thickness.

Finally, the structure formed by the combination of the supplemental metal layer and the localized element of super refractory metal has, due to its shape, a high mechanical resistance to strain, especially thermal strain.

In practice, the thickness of the supplemental metal layer is chosen to be between 20 nm and 150 nm, preferably between 50 nm and 100 nm.

In one embodiment of the method of the present invention, when titanium is selected as the super refractory metal for forming the silicide layer, a titanium nitride layer is formed on the surface of the titanium nitride layer, and the titanium nitride layer is used for selective growth of the supplementary layer. Used as a base.

This titanium nitride layer is kept at 700 ° C and 1000 ° C in a nitrogen atmosphere.
It is preferably formed by a conversion treatment of the surface of the titanium silicide layer at a temperature between ° C. Therefore, a suitable base is formed for the growth of the supplemental metal layer, and this heat treatment at the same time serves for the sintering of the titanium silicide.

In this embodiment of the invention, the supplemental metal layer is at 300 ° C and 5 ° C.
Utilizing the reduction of tungsten hexafluoride (or molybdenum hexafluoride) with hydrogen at a temperature between 00 ° C and a gas flow ratio of hexafluoride / hydrogen between 1/1000 and 1/5 of 0.05 torr
It is formed by the chemical deposition method from the gas phase at a reduced pressure between 2 and 2 torr.

Hereinafter, the method of the present invention will be described by way of examples with reference to the accompanying drawings.

FIG. 1 illustrates one embodiment of an interconnect structure for forming electrical contact connections in a silicon integrated circuit having MOS transistors. The first conductivity type substrate 10 has on its surface doped source and drain regions 11, 12 of a second conductivity type opposite to the first conductivity type. These regions 11 and 12 have a perimeter bounded by a localized layer of field oxide 13 and are separated from each other by a narrow channel 14, on which a heavily doped channel is formed. A control gate 15 of polycrystalline silicon is provided. This gate 15 is insulated from the semiconductor of the channel 14 by a gate oxide layer 16. The portion of the layer of polycrystalline silicon that serves to form the gate 15 is the field oxide 13
Can be kept above to form electrical connections,
One example is the connecting strip shown at 17. The surface of the underlying device is provided with contact areas exposing most of the surfaces of the doped regions 11 and 12 and of the gate 15 and the connecting strips 17. Contact island 20a, which then consists of at least one layer of titanium silicide, obtained by self alignment with said contact area by techniques well known to those skilled in the art.
-20d is formed.

Separation layer 22 has contact openings 23, 24, 25, the bottoms of which are predetermined contact islands 20a, 20b, 20d.

Finally, an interconnect profile completes the structure of the illustrated device, with one or more localized elements 26 of tungsten or molybdenum at least partially filling the contact openings 23, 24, 25, and In the so-called second-level metal layer portion 27, 28, which is cut into a predetermined shape and which is provided with localized elements 26 so as to form the desired electrical connection with the contact islands 20a, 20b, 20d. Can be made of, for example, aluminum.

As will be described below, it is an object of the present invention that before the isolation layer 22 is formed, the contact islands 20a, 20b, 20c, 20d are obtained by selective growth of tungsten or molybdenum and thus located on said island. The aim is to obtain an interconnect structure of the type shown in FIG.

The method of the present invention will be described with reference to FIGS.
The embodiment shown in these figures is very general, whether at the substrate or at the doped regions supported by this substrate or also at the contact connection with a layer of polycrystalline metal,
It is understood that it refers to any type of contact connection on a semiconductor device. FIG. 2 shows a schematic cross-section of a contact island 20 provided in a contact region 18 defined on the surface of the semiconductor substrate 10 by a dielectric layer 19.

The contact islands 20 deposit a layer of a refractory metal such as titanium over the entire structure and then react the titanium layer with a portion of the silicon surface not covered by the dielectric layer 19 by a suitable heat treatment to form the contact area 18. Is obtained by self-aligning with the contact region 18 by forming titanium silicide in the portion of the contact layer and finally removing the remaining portion of the titanium layer which has not reacted by selective etching. At this stage of the method, it is preferable to carry out in a nitrogen atmosphere.
It is known and necessary in practice to stabilize the composition of the layer of titanium silicide in contact with the material of the contact area by the heat treatment of. Therefore, the contact island 20 will eventually consist of a layer of titanium silicide 201 overlying a thin layer of titanium nitride 202 obtained during the above treatment by the action of nitrogen on the titanium silicide.

By way of example, a treatment under nitrogen at 85 ° C. for 10 seconds comprises a layer of titanium nitride 202 having a thickness of 6 to 8 nm on the surface of a layer of titanium silicide 201 having a thickness of the order of 30 nm.
Is generated.

A selective growth of tungsten is then performed to cover the contact island 20 with a relatively thin supplemental metal layer.

During this operation, the layer of titanium nitride 202 acts as an uncleation base for the growth of tungste, while the dielectric layer 19 blocks this growth. Therefore,
The supplemental metal layer 30 is located on the contact island 20 without the need to perform a photomask operation, as shown in FIG. The method of selective growth of tungsten is known per se. Temperature between 300 ° C and 500 ° C and 0.05 to 2 torr
It is preferable to use a method of depositing from the gas phase using a chemical reduction reaction of tungsten fluoride (WF ₆ ) with hydrogen (H ₂ ) at a reduced pressure of the order of (6.6 to 266 Pa).
The gas flow rates of WF ₆ and H ₂ introduced during the reaction are chosen to have a ratio between 1/1000 and 1/5.

If desired, the supplemental metal layer 30 can be formed by selective growth of molybdenum at operating conditions very close to those shown for tungsten. During the reaction of the reduction of tungsten hexafluoride or molybdenum hexafluoride with hydrogen as described above, the titanium silicide layer 201 would be attacked if not protected by the titanium nitride layer 202.

In practice the thickness of the supplemental metal layer 30 is not critical in practice, but this thickness is between 20 nm and 150 nm, preferably 5 nm.
It is typically chosen to be between 0 nm and 100 nm.

At thicknesses above 150 nm, undesired topograhpy irregularities are introduced on the surface of the device, which unnecessarily prolongs the duration of the etching operation. At thicknesses below 20 nm, the supplemental metal layer 30 no longer fulfills its etch-blocking function and exhibits discontinuities arising from the initial phase of growth.

As shown in FIG. 4, a separation layer 32 of, for example, silicon dioxide is then formed over the entire structure by using any suitable method, for example, the method of deposition from the vapor phase utilizing the oxidation of silicon compounds. To be done.

In the course of this process, it is advantageous to subject the separating layer 32 to a so-called planarization operation, the purpose of which is to make the outer surface of the separating layer substantially flat, while this separating layer is in contact with a structure having a sharp bump. To do so.

A photomasking operation etches the contact openings 33 into the isolation layer 32, preferably by using a so-called reactive ion etch, which creates openings of very small diameter with virtually vertical walls. be able to. The extent of this contact opening 33 is such that it exposes a surface portion of the supplemental metal layer 30 covering the contact islands. For the ion etching treatment of the separating layer, it is preferable to use the ionized gas mixture CF ₄ + O ₄ as chemical attack agent.

During this process, the etch selectivity of silicon oxide over tungsten or molybdenum exceeds a ratio of 30/1 so that the supplemental metal layer 30 forms a very effective etch stop.

In the conventional manner, the step of etching the isolation layer 32 is completed on the contact islands formed by the titanium nitride-titanium silicide bilayer. The etching selectivity of silicon oxide for these materials has only a ratio close to 10/1. Thus, the method of the present invention can complete the step of etching the openings 33 without the risk of excessive under-etching and titanium silicide degradation. This advantage is particularly important when contact openings with different depths have to be formed simultaneously, as shown for openings 23 and 25 in FIG. The photoresist mask (not shown) that served to define the contact openings 33 is removed by, for example, an oxygen plasma etching process.

The structure in the process illustrated in FIG. 4 is then conventional in the art, for example curing in nitric acid followed by careful rinsing in deionized water and drying by centrifugal force and then in dilute hydrofluoric acid. It undergoes a complementary operation of cleaning its surface using a chemical bath.

The next operation is aimed at filling at least most of the volume of the contact opening 33 with a localized element of super refractory metal such as tungsten or molybdenum.

The localized element 26 shown in FIG. 5A can be obtained by a method of selectively growing tungsten or molybdenum under substantially the same operating conditions as for the formation of the supplemental metal layer 30.

Particularly for reasons of facility simplicity and economy, it is preferred to use the same metal, eg tungsten, for forming the supplemental metal layer 30 and the localized element 26.

But this is not essential,
Depending on the special conditions, the supplemental metal layer 30 is made of molybdenum and the tungsten localized element 26 is then grown, or
Or vice versa. In either case, the metal surface of the supplemental metal layer 30 exposed through the contact opening 33 serves as a nucleation base for the selective growth of the localized element 26, while the growth occurs on the free surface 34 of the isolation layer 32. Absent.

In a typical application of a large scale integrated circuit, the contact opening 33
0.8 μm diameter and 0.5 to 0 depending on the position of this opening.
It has a depth that can be changed up to 9 μm.

For the duration of the growth, the shallowest contact opening is overfilled, its upper level slightly exceeding the level of the adjacent layers and forming laterally extending humps, which is detrimental to the operation of the device. It is determined to have a localized element 26 that does not become.

Such an overfilled contact opening is shown for the contact opening 25 in FIG. On the contrary,
The deepest contact openings are the contact openings 23 and 24 of FIG.
As shown for, it is not completely filled by the localized element 26 during the same deposition period.

This is not a major disadvantage, since the unfilled part of such a contact opening is now 1
This is because it has a much smaller aspect ratio (depth / diameter) while subsequent filling by conventional metallization techniques is easily obtained.

The formation of localized elements 26 is directly and economically obtained by the selective growth method just described. However, this is essentially a supplemental layer of tungsten or molybdenum 30.
Is not essential to the invention which is based on the coating of contact islands according to.

The localized element 26 may also be obtained by the process described with respect to Figures 5B and 5C, for example.

As shown in FIG. 5B, an adhesive layer 40 of, for example, 100 nm titanium-tungsten alloy (titanium 10% by weight, tungsten 90% by weight) that is thin with respect to the size of the contact opening is formed on the inner wall of the contact opening 33. Deposited on all surfaces including.

It is important to use for this purpose a deposition method, such as cathodic sputtering, which guarantees a virtually constant surface conformal coating even inside the contact opening, regardless of its roughness.

Then, using a deposition method having conformal coating properties, such as a method of vapor phase deposition at reduced pressure, a tungsten fill layer 41 on top of the adhesive layer 40 is also used.
Grow. The thickness of this filling layer 41 is in this case chosen sufficiently to completely fill the contact opening 33. That is, this thickness has a value equal to at least half the diameter of said opening.

The adhesive and fill layers are then removed as shown in FIG. 5C so that only those portions of these layers that are located inside the contact openings 33 and thus form the localized metal element 26 remain. . This operation can be performed by etching in SF ₆ plasma, which erodes the titanium-tungsten alloy faster than silicon oxide.

The localized element 26 constitutes part of the metal shape of the interconnect. As shown in FIG. 6, another complementary portion is formed by covering the surface 34 of the device with a metal layer 35, and other than its desired shape is removed by localized selective etching, for example by a photomask.

The surface 34 in contact with the metal layer 35 is preferably substantially flat so that the metal layer 35 can be readily obtained using conventional techniques. Many metals are suitable for performing this operation, the choice of which is determined by the requirements of mechanical attachment to the surface of the isolation layer 32 and the intention to obtain minimum conductivity and great resistance to electromigration phenomena. To be By way of example, aluminum or aluminum-copper alloys having a thickness of 0.8 to 2 μm are particularly suitable. Of course, the portion of the metal layer 35 covers the contact opening 33, where it ensures an electrical connection with the localized element 26.

Although not shown in the drawings, if desired, the device can be completed with at least one additional metal feature of the interconnect formed at a higher level, depending on its complexity. .

The method of the invention is not limited to the fabrication of interconnect structures on integrated circuits having MOS transistors.

This method forms contact connections for all types of semiconductors having a silicon substrate, preferably when very small dimensions of the connection area are to be used, and is self-aligned with this connection area for contact islands of super refractory metal silicide. Is widely useful when should be provided on it.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view of a part of the structure of an interconnect portion of an integrated circuit obtained by the method of the present invention, and FIGS. 2, 3, 4, 5A and 6 show the present invention. Schematic cross-sectional views of the contact portion of the electrical contact of the semiconductor device in different manufacturing steps of the method, 5B and 5C of the connection portion of the electrical contact of the semiconductor device in different manufacturing steps of obtaining a localized element It is a schematic sectional drawing. 10 ... Substrate, 11 ... Source region, 12 ... Drain region, 13 ... Field oxide, 14 ... Channel, 15 ... Gate, 18 ... Contact region, 19 ... Dielectric layer 20, 20a, 20b, 20c , 20d …… Contact island 22,32 …… Separation layer 23,24,25,33 …… Contact opening 26 …… Localized element 27,28,35,41 …… Metal layer 30 …… Supplementary metal layer, 40 ...... Adhesive layer 201 …… Titanium silicide layer, 202 …… Titanium nitride layer

Claims (4)

(57) [Claims] 1. A step of: (a) forming a contact region (18) on a surface of a semiconductor device (10). (B) Forming a contact island (20) having a titanium silicide layer (201) covering the contact region. (C) A step of depositing the separation layer (32) of silicon oxide. (D) A step of forming a contact opening (33) in which a contact island is exposed in the separation layer. (E) Localized element of tungsten or molybdenum (26)
Filling the contact openings with. (F) forming a metal layer (35) of an interconnection part on the separation layer,
Contacting a tungsten or molybdenum localized element in the contact opening. In a method of forming an electrical interconnect on a semiconductor device having a silicon substrate consisting of a titanium silicide layer (201) and a titanium nitride layer (201) after step (b) and before step (c). 202) coating process and titanium nitride layer (20
2) a tungsten or molybdenum supplemental metal layer (3
A method for forming an electrical interconnect in a silicon semiconductor device, characterized in that the contact island (20) is completed by the step of coating with (0). 2. The thickness of the supplemental metal layer is between 20 nm and 150 nm,
Preferably selected to be between 50 nm and 100 nm.
A method of forming an electrical interconnect in a semiconductor device having a silicon substrate as described. 3. A titanium nitride layer is formed at 700 ° C. in a nitrogen atmosphere.
A method for forming electrical interconnections in a semiconductor device having a silicon substrate according to claim 1, which is formed by a conversion treatment of the surface of the titanium silicide layer at a temperature of between 1000 and 1000 ° C. 4. A supplemental metal layer comprising tungsten hexafluoride or hexafluoride at a temperature between 300 ° C. and 500 ° C. and a gas flow ratio of hexafluoride / hydrogen between 1/1000 and 1/5. The method for forming an electrical interconnect in a semiconductor device having a silicon substrate according to claim 1, wherein the reduction is performed by using hydrogen of molybdenum oxide to form a chemical vapor deposition method from a vapor phase at a reduced pressure of 0.05 torr to 2 torr.