JP2682497B2 - Manufacturing method of printed wiring board - Google Patents
Manufacturing method of printed wiring boardInfo
- Publication number
- JP2682497B2 JP2682497B2 JP7041372A JP4137295A JP2682497B2 JP 2682497 B2 JP2682497 B2 JP 2682497B2 JP 7041372 A JP7041372 A JP 7041372A JP 4137295 A JP4137295 A JP 4137295A JP 2682497 B2 JP2682497 B2 JP 2682497B2
- Authority
- JP
- Japan
- Prior art keywords
- solder resist
- wiring board
- printed wiring
- palladium
- plating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、印刷配線板の製造方法
に関し、特に、高密度表面実装用のパッド間にソルダー
レジストを正確に形成する印刷配線板の製造方法に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for manufacturing a printed wiring board in which a solder resist is accurately formed between pads for high density surface mounting.
【０００２】[0002]
【従来の技術】従来技術について図３を用いて説明す
る。図３は、従来技術による印刷配線板の製造方法を示
す縦断面図で、図３（ａ）はパターン形成後の縦断面
図、（ｂ）はソルダーレジスト塗布、硬化後の縦断面
図、（ｃ）は平滑に研磨後の縦断面図、及び（ｄ）は２
次ソルダーレジスト形成後の縦断面図である。従来の印
刷配線板の製造方法における、パッドピッチの狭い部分
にソルダーレジストを形成するための従来の技術につい
ては、例えば、特開平３−２７８５９２に提案されてい
る。2. Description of the Related Art A conventional technique will be described with reference to FIG. 3A and 3B are vertical cross-sectional views showing a method for manufacturing a printed wiring board according to a conventional technique. FIG. 3A is a vertical cross-sectional view after pattern formation, FIG. 3B is a vertical cross-sectional view after solder resist coating and curing, c) is a vertical cross-sectional view after smooth polishing, and (d) is 2
It is a longitudinal cross-sectional view after the formation of the next solder resist. A conventional technique for forming a solder resist in a portion having a narrow pad pitch in a conventional method for manufacturing a printed wiring board has been proposed, for example, in Japanese Patent Laid-Open No. 3-278592.
【０００３】この従来の技術（特開平３−２７８５９
２）によれば、図３（ａ）に示すように、従来より公知
の方法で回路形成された０．３ｍｍピッチパッド（２）
（幅０．１５ｍｍ、間隙０．１５ｍｍ、導体厚４０μ
ｍ）を有する印刷配線板（１）上に、図３（ｂ）に示す
ように、膨張性ソルダーレジストインク（４ａ）を塗布
する。その後、５０〜１００℃で仮乾燥させる。次に、
図３（ｃ）に示すように、ソルダーレジスト（４ａ）と
実装用パッド（２）によって構成される面が平滑になる
ように機械研磨を行う。その後１４０〜１６０℃でソル
ダーレジスト（４ａ）を硬化する。この時、ソルダーレ
ジスト中の充填材の膨張が起こり、ソルダーレジストダ
ムが形成される。This conventional technique (Japanese Patent Laid-Open No. 3-27859)
According to 2), as shown in FIG. 3A, a 0.3 mm pitch pad (2) formed into a circuit by a conventionally known method.
(Width 0.15mm, gap 0.15mm, conductor thickness 40μ
m), the expandable solder resist ink (4a) is applied on the printed wiring board (1) having m). Then, temporary drying is performed at 50 to 100 ° C. next,
As shown in FIG. 3C, mechanical polishing is performed so that the surface formed by the solder resist (4a) and the mounting pad (2) is smooth. Then, the solder resist (4a) is cured at 140 to 160 ° C. At this time, the filler in the solder resist expands to form a solder resist dam.
【０００４】その他、同様の目的（狭小パッド間のソル
ダーレジスト形成）を達成するための従来技術として
は、例えば、特開平３−２６８４７９のようにエッチン
グレジストを残存させ、ソルダーレジスト塗布乾燥後、
平滑になるように研磨する方法もある。図３（ｃ）の状
態では、実装用パッド以外の部分も研磨により導体回路
が露出しているため、図３（ｄ）に示すように、この印
刷配線板上に通常のフォト現像型のソルダーレジスト
（４ｂ）又はスクリーン印刷による熱硬化型のソルダー
レジストを形成し、狭小パッド間にソルダーレジストを
形成した所望の印刷配線板を製造する。In addition, as a conventional technique for achieving the same purpose (formation of solder resist between narrow pads), for example, as in JP-A-3-268479, an etching resist is left and after coating and drying the solder resist,
There is also a method of polishing so that the surface becomes smooth. In the state of FIG. 3 (c), the conductor circuit is exposed by polishing the portions other than the mounting pads. Therefore, as shown in FIG. 3 (d), a normal photo-developing solder is placed on the printed wiring board. A desired printed wiring board in which a resist (4b) or a thermosetting solder resist by screen printing is formed and the solder resist is formed between the narrow pads is manufactured.
【０００５】[0005]
【発明が解決しようとする課題】上記従来の印刷配線板
の製造方法では、パッド間隙狭小部分にソルダーレジス
トを形成するため、印刷配線板全面にソルダーレジスト
インクを塗布・乾燥し、パッドとソルダーレジストが平
滑になるように研磨している。従って、ソルダーレジス
ト（又はエッチングレジスト）がパッド上に残り実装時
にはんだ付け不良になるという問題があった。In the conventional method for manufacturing a printed wiring board described above, since the solder resist is formed on the narrow portion of the pad gap, the solder resist ink is applied and dried on the entire surface of the printed wiring board to form the pad and the solder resist. Is polished so that it becomes smooth. Therefore, there is a problem that the solder resist (or the etching resist) remains on the pad, resulting in poor soldering during mounting.
【０００６】[0006]
【課題を解決するための手段】本発明は、回路導体及び
スルーホールを形成した印刷配線板の銅上にニッケル又
はパラジュウムをめっきする工程と、めっき表面を加熱
処理して酸化させる工程と、ソルダーレジストを全面に
塗布・乾燥する工程と、アルカリ溶液にてソルダーレジ
ストを膨潤させ、導体回路上のソルダーレジストを研磨
除去する工程と、露出した導体部に無電解銅めっきを置
換析出させる工程と、ソルダーレジストを形成する工程
を含むことを特徴とする印刷配線板の製造方法である。
また、本発明は、印刷配線板の銅上にニッケル又はパラ
ジュウムをめっきする工程が、無電解めっきであること
を特徴とする上記の印刷配線板の製造方法である。According to the present invention, a step of plating nickel or palladium on copper of a printed wiring board on which a circuit conductor and a through hole are formed, a step of heat-treating a plated surface for oxidation, and a solder are included. A step of coating and drying the resist on the entire surface, a step of swelling the solder resist with an alkaline solution, polishing and removing the solder resist on the conductor circuit, and a step of replacing and depositing electroless copper plating on the exposed conductor portion, A method of manufacturing a printed wiring board, comprising a step of forming a solder resist.
The present invention is also the above-mentioned method for producing a printed wiring board, wherein the step of plating nickel or palladium on the copper of the printed wiring board is electroless plating.
【０００７】[0007]
【作用】本発明においては、印刷配線板の銅上にニッケ
ル又はパラジュウムをめっきする工程、めっき表面を加
熱処理して酸化させる工程、ソルダーレジストを全面に
塗布・乾燥する工程と、アルカリ溶液にてソルダーレジ
ストを膨潤させ、銅上のソルダーレジストを研磨除去す
る工程、露出した導体部に無電解銅めっきを置換析出さ
せる工程を含むもので、銅上にめっきされているニッケ
ル又はパラジュウムは、その表面が銅に比べてなめらか
であるため、ソルダーレジストのアンカー効果がなくな
り密着しないものであり、かつ、これらをを酸化させて
いるため、剥離しやすくなっており、ソルダーレジスト
は、完全に剥離除去できるものである。また、印刷配線
板の銅上にニッケル又はパラジュウムをめっきする工程
が、無電解めっきであることが好ましく、銅上にめっき
されているニッケル又はパラジュウムは、その表面が銅
に比べてなめらかである。In the present invention, a step of plating nickel or palladium on copper of a printed wiring board, a step of heat-treating the plated surface to oxidize it, a step of coating and drying a solder resist on the entire surface, and an alkaline solution are used. It includes a step of swelling the solder resist, polishing and removing the solder resist on copper, and a step of substituting and depositing electroless copper plating on the exposed conductor part. Nickel or palladium plated on copper has a surface Since it is smoother than copper, it does not adhere because the anchor effect of the solder resist disappears, and since these are oxidized, it is easy to peel off, and the solder resist can be completely peeled and removed. It is a thing. The step of plating nickel or palladium on copper of the printed wiring board is preferably electroless plating, and the surface of nickel or palladium plated on copper is smoother than that of copper.
【０００８】[0008]
【実施例】本発明の実施例について図面を参照して説明
する。 ［実施例１］図１は、本発明の実施例１の印刷配線板の
製造方法を示す縦断面図で、（ａ）はニッケルめっき後
の縦断面図、（ｂ）はソルダーレジスト塗布、硬化後の
縦断面図、（ｃ）は平滑に研磨後の縦断面図、（ｄ）は
無電解銅めっき後の縦断面図及び（ｅ）は２次ソルダー
レジスト形成後の縦断面図である。図１（ａ）に示すよ
うに、従来より公知の方法で回路形成された０．３ｍｍ
ピッチパッド（２）（幅０．１５ｍｍ、間隙０．１５ｍ
ｍ、導体厚４０μｍ）を有する印刷配線板（１）の銅上
に無電解ニッケルめっき（３）を行う。Embodiments of the present invention will be described with reference to the drawings. [Embodiment 1] FIG. 1 is a vertical sectional view showing a method for manufacturing a printed wiring board according to Embodiment 1 of the present invention. (A) is a vertical sectional view after nickel plating, (b) is solder resist application, curing A vertical cross-sectional view after that, (c) is a vertical cross-sectional view after smooth polishing, (d) is a vertical cross-sectional view after electroless copper plating, and (e) is a vertical cross-sectional view after secondary solder resist formation. As shown in FIG. 1 (a), the circuit formed by a conventionally known method is 0.3 mm.
Pitch pad (2) (width 0.15 mm, gap 0.15 m
m, conductor thickness 40 μm), electroless nickel plating (3) is performed on the copper of the printed wiring board (1).
【０００９】無電解ニッケルめっきの処理方法は、前処
理として酸性脱脂→ソフトエッチング（過酸化水素−硫
酸系）→１０％硫酸洗浄を行い、銅表面の汚れ（酸化
膜、油分）を除去して、ニッケルめっきの触媒となるパ
ラジュウムを含む活性化浴に常温で１分間浸漬し、銅と
の置換反応によってパラジュウムを０．００１μｍ程度
析出させる。次に、次亜リン酸又はジメチルアミンボラ
ン等を還元剤とする無電解ニッケルめっき液に９０℃、
２０分間の条件で浸漬し、銅上のパラジュウムを触媒と
して、ニッケルめっき（３）を約３μｍ析出させる。ニ
ッケルは約３μｍ被膜を形成すれば特性が得られる。ニ
ッケルめっきした印刷配線板（１）を１５０℃、１０分
間加熱処理し、ニッケルの表面を約０．１μｍ酸化させ
る。The electroless nickel plating method is as follows: acid degreasing → soft etching (hydrogen peroxide-sulfuric acid system) → 10% sulfuric acid cleaning to remove stains (oxide film, oil) on the copper surface. Then, it is immersed in an activation bath containing palladium serving as a catalyst for nickel plating at room temperature for 1 minute to deposit 0.001 μm of palladium by a substitution reaction with copper. Next, at 90 ° C. in an electroless nickel plating solution using hypophosphorous acid or dimethylamine borane as a reducing agent,
Immersion is carried out under the condition of 20 minutes, and nickel plating (3) is deposited by about 3 μm using palladium on copper as a catalyst. Nickel can be obtained by forming a film of about 3 μm. The nickel-plated printed wiring board (1) is heat-treated at 150 ° C. for 10 minutes to oxidize the surface of nickel by about 0.1 μm.
【００１０】図１（ｂ）に示すように、印刷配線板
（１）上に樹脂を低分子化してアルカリ溶液の浸透性を
良くしたソルダーレジスト（４ａ）を導体厚とほぼ同じ
厚み４０μｍ塗布し、１００℃、３０分間乾燥する。そ
の後、常温の１％炭酸ナトリウム溶液に１０分間浸漬
し、ソルダーレジスト（４ａ）の表面を膨潤させ、図１
（ｃ）に示すように、パッド（２）とソルダーレジスト
（４ａ）が平滑になるように機械研磨（ブラシ、バフ、
ベルト研磨等）する。ニッケルの表面は銅に比べてなめ
らかであるため、ソルダーレジストのアンカー効果がな
くなり密着しない。また、ニッケルを酸化させているた
め、酸化ニッケルとニッケルの間で剥離しやすくなって
おり、ソルダーレジスト（４ａ）はニッケル（３）上か
ら完全に剥離除去できる。As shown in FIG. 1 (b), a solder resist (4a), in which the resin has a low molecular weight to improve the permeability of an alkaline solution, is applied on the printed wiring board (1) to a thickness of 40 μm, which is almost the same as the conductor thickness. Dry at 100 ° C. for 30 minutes. Thereafter, the surface of the solder resist (4a) is swollen by immersing it in a 1% sodium carbonate solution at room temperature for 10 minutes, and
As shown in (c), mechanical polishing (brush, buff, so as to smooth the pad (2) and the solder resist (4a)
Belt polishing, etc.). Since the surface of nickel is smoother than that of copper, the anchor effect of the solder resist is lost and the nickel does not adhere. Further, since nickel is oxidized, it is easy to peel off between nickel oxide and nickel, and the solder resist (4a) can be completely peeled off from the nickel (3).
【００１１】次に、図１（ｄ）に示すように、１０％硫
酸に常温、１分間浸漬しニッケル酸化層を除去した後無
電解銅めっき（５）をニッケル（３）との置換反応によ
り行う。無電解銅めっき（５）は６０℃、２０分間で約
１μｍ析出させる。無電解銅めっき（５）を行うことに
より導体回路の表面はポーラスな形状となり、ソルダー
レジストのアンカー効果の作用を使用できる状態とな
る。図１（ｅ）に示すように、得られた印刷配線板
（１）上に通常のフォト現像型ソルダーレジスト（４
ｂ）を形成し、実装パッド上にソルダーレジストの残渣
がなく。狭小ピッチパッド間にソルダーレジストが形成
された所望の印刷配線板を得ることが出来るものであ
る。Next, as shown in FIG. 1 (d), the nickel oxide layer was removed by immersing in 10% sulfuric acid at room temperature for 1 minute, and then the electroless copper plating (5) was replaced with nickel (3) by a substitution reaction. To do. Electroless copper plating (5) is deposited at 60 ° C. for about 20 minutes to about 1 μm. By performing the electroless copper plating (5), the surface of the conductor circuit becomes porous, and the anchor effect of the solder resist can be used. As shown in FIG. 1 (e), an ordinary photo-developing solder resist (4
b) is formed, and there is no residue of solder resist on the mounting pad. It is possible to obtain a desired printed wiring board having a solder resist formed between narrow pitch pads.
【００１２】〔実施例２〕図２は、本発明の実施例２の
印刷配線板の製造方法を示す縦断面図で、（ａ）はパラ
ジュウムめっき後の縦断面図、（ｂ）はソルダーレジス
ト塗布、硬化後の縦断面図、（ｃ）は平滑に研磨後の縦
断面図、（ｄ）は無電解銅めっき後の縦断面図、及び
（ｅ）は２次ソルダーレジスト形成後の縦断面図であ
る。図２（ａ）に示すように、従来より公知の方法で回
路形成された０．３ｍｍピッチパッド（２）（幅０．１
５ｍｍ、間隙０．１５ｍｍ、導体厚４０μｍ）を有する
印刷配線板（１）の銅上に無電解パラジュウムめっき
（６）を行う。[Embodiment 2] FIG. 2 is a longitudinal sectional view showing a method for manufacturing a printed wiring board according to an embodiment 2 of the present invention. (A) is a longitudinal sectional view after palladium plating, (b) is a solder resist Longitudinal sectional view after coating and curing, (c) longitudinal sectional view after smooth polishing, (d) longitudinal sectional view after electroless copper plating, and (e) longitudinal sectional view after forming secondary solder resist It is a figure. As shown in FIG. 2 (a), a 0.3 mm pitch pad (2) (width 0.1
Electroless palladium plating (6) is performed on copper of a printed wiring board (1) having 5 mm, a gap of 0.15 mm and a conductor thickness of 40 μm.
【００１３】無電解パラジュウムめっきの処理方法は、
前処理として酸性脱脂→ソフトエッチング（過酸化水素
−硫酸系）→１０％硫酸洗浄を行い、銅表面の汚れ（酸
化膜、油分）を除去して、パラジュウムめっきの触媒と
なるパラジュウムを含む活性化浴に常温で１分間浸漬
し、銅との置換反応によってパラジュウムを０．００１
μｍ程度析出させる。次に、次亜リン酸等を還元剤とす
る無電解パラジュウムめっき液に５０℃、６０分間の条
件で浸漬し、銅上のパラジュウムを触媒として、パラジ
ュウムめっき（６）を約１μｍ析出させる。パラジュウ
ムは約１μｍ被膜を形成すれば表面がなめらかになる。
パラジュウムめっき（６）した印刷配線板（１）を１５
０℃、１０分間加熱処理し、パラジュウムの表面を約
０．０５μｍ酸化させる。The treatment method of electroless palladium plating is as follows:
As a pretreatment, acid degreasing → soft etching (hydrogen peroxide-sulfuric acid system) → washing with 10% sulfuric acid to remove stains (oxide film, oil content) on the copper surface and activate palladium containing palladium, which serves as a catalyst for palladium plating. Immerse it in the bath at room temperature for 1 minute and 0.001 of palladium by substitution reaction with copper.
Precipitate about μm. Next, it is immersed in an electroless palladium plating solution containing hypophosphorous acid or the like as a reducing agent at 50 ° C. for 60 minutes to deposit palladium (6) with a thickness of about 1 μm using palladium on copper as a catalyst. The surface of paradium becomes smooth when a film of about 1 μm is formed.
Palladium-plated (6) printed wiring board (1) 15
Heat treatment is performed at 0 ° C. for 10 minutes to oxidize the surface of palladium to about 0.05 μm.
【００１４】図２（ｂ）に示すように、印刷配線板
（１）上に樹脂を低分子化してアルカリ溶液の浸透性を
良くしたソルダーレジスト（４ａ）を導体厚とほぼ同じ
厚み４０μｍ塗布し、１００℃、３０分間乾燥する。そ
の後、常温の１％炭酸ナトリウム溶液に１０分間浸漬
し、ソルダーレジスト（４ａ）の表面を膨潤させ、図２
（ｃ）に示すように、パッド（２）とソルダーレジスト
（４ａ）が平滑になるように機械研磨（ブラシ、バフ、
ベルト研磨等）する。パラジュウムの表面は銅に比べて
なめらかであるため、ソルダーレジストのアンカー効果
がなくなり密着しない。またパラジュウムを酸化させて
いるため、酸化パラジュウムとパラジュウムの間で剥離
しやすくなっておりソルダーレジスト（４ａ）はパラジ
ュウム（６）上から完全に剥離除去できる。As shown in FIG. 2 (b), a solder resist (4a), in which the resin has a low molecular weight to improve the permeability of an alkaline solution, is applied on the printed wiring board (1) to a thickness of 40 μm, which is almost the same as the conductor thickness. Dry at 100 ° C. for 30 minutes. Then, the surface of the solder resist (4a) is swollen by immersing it in a 1% sodium carbonate solution at room temperature for 10 minutes, and
As shown in (c), mechanical polishing (brush, buff, so as to smooth the pad (2) and the solder resist (4a)
Belt polishing, etc.). Since the surface of Palladium is smoother than that of copper, the anchoring effect of the solder resist is lost and it does not adhere. Further, since the palladium is oxidized, it is easy to peel between the palladium oxide and the palladium, and the solder resist (4a) can be completely peeled and removed from the palladium (6).
【００１５】次に、図２（ｄ）に示すように、１０％硫
酸に常温、１分間浸漬しパラジュウム酸化層を除去した
後無電解銅めっき（５）をパラジュウム（６）との置換
反応により行う。無電解銅めっき（５）は、６０℃、２
０分間で約１μｍ析出させる。無電解銅めっき（５）を
行うことにより導体回路の表面はポーラスな形状とな
り、ソルダーレジストのアンカー効果の作用を使用でき
る状態となる。図２（ｅ）に示すように、得られた印刷
配線板（１）上に通常のスクリーン印刷で熱硬化型ソル
ダーレジスト（４ｃ）を形成する。回路形成後ニッケル
めっきの代わりにパラジュウムめっきを使用しても実装
パッド上にソルダーレジストの残渣がなく、狭小ピッチ
パッド間にソルダーレジストが形成された所望の印刷配
線板を得ることが出来るものである。Next, as shown in FIG. 2 (d), the palladium oxide layer was removed by immersing in 10% sulfuric acid at room temperature for 1 minute, and then the electroless copper plating (5) was replaced with palladium (6). To do. Electroless copper plating (5) is 60 ℃, 2
Precipitate about 1 μm in 0 minutes. By performing the electroless copper plating (5), the surface of the conductor circuit becomes porous, and the anchor effect of the solder resist can be used. As shown in FIG. 2E, a thermosetting solder resist (4c) is formed on the obtained printed wiring board (1) by ordinary screen printing. Even after using palladium plating instead of nickel plating after circuit formation, there is no residue of solder resist on the mounting pads, and it is possible to obtain a desired printed wiring board with solder resist formed between narrow pitch pads. .
【００１６】[0016]
【発明の効果】以上説明したように本発明は、印刷配線
板の製造方法において、狭小パッド間にソルダーレジス
トを形成するため、回路形成後銅上に無電解ニッケル又
はパラジュウムめっきを行い、めっき表面を酸化後、印
刷配線板全面にソルダーレジストを塗布し、レジストの
膨潤後パターンとソルダーレジストの面が平滑になるよ
うに研磨した。ニッケル又はパラジュウム上のソルダー
レジストは銅めっき上に比較して剥離除去しやすいた
め、実装パッド上のレジスト残りは従来の５％から１％
未満に減少した。その結果、部品実装時のはんだ付け不
良も防止することが出来るという効果を奏するものであ
る。As described above, according to the present invention, in the method for manufacturing a printed wiring board, in order to form the solder resist between the narrow pads, electroless nickel or palladium plating is performed on the copper after the circuit formation, and the plated surface After oxidation, a solder resist was applied to the entire surface of the printed wiring board, and after the resist was swollen, the pattern and the surface of the solder resist were polished to be smooth. Solder resist on nickel or palladium is easier to peel and remove than on copper plating.
Reduced to less than. As a result, it is possible to prevent defective soldering during component mounting.
【図１】本発明の実施例１の印刷配線板の製造方法を示
す縦断面図。FIG. 1 is a vertical sectional view showing a method for manufacturing a printed wiring board according to a first embodiment of the present invention.
【図２】本発明の実施例２の印刷配線板の製造方法を示
す縦断面図。FIG. 2 is a vertical sectional view showing a method for manufacturing a printed wiring board according to a second embodiment of the present invention.
【図３】従来技術による印刷配線板の製造方法を示す縦
断面図。FIG. 3 is a vertical sectional view showing a method for manufacturing a printed wiring board according to a conventional technique.
１ 印刷配線板 ２ パッド ３ ニッケルめっき ４ａ ソルダーレジスト（改良熱硬化型） ４ｂ ソルダーレジスト（フォト現像型） ４ｃ ソルダーレジスト（熱硬化型） ５ 銅めっき ６ パラジウムめっき 1 Printed wiring board 2 Pad 3 Nickel plating 4a Solder resist (improved thermosetting type) 4b Solder resist (photo development type) 4c Solder resist (thermosetting type) 5 Copper plating 6 Palladium plating
Claims (2)
刷配線板の銅上にニッケル又はパラジュウムをめっきす
る工程と、めっき表面を加熱処理して酸化させる工程
と、ソルダーレジストを全面に塗布・乾燥する工程と、
アルカリ溶液にてソルダーレジストを膨潤させ、導体回
路上のソルダーレジストを研磨除去する工程と、露出し
た導体部に無電解銅めっきを置換析出させる工程と、ソ
ルダーレジストを形成する工程を含むことを特徴とする
印刷配線板の製造方法。1. A step of plating nickel or palladium on copper of a printed wiring board on which a circuit conductor and a through hole are formed, a step of heating the plated surface to oxidize it, and applying and drying a solder resist on the entire surface. Process,
It includes a step of swelling the solder resist with an alkaline solution and polishing and removing the solder resist on the conductor circuit, a step of replacing and depositing electroless copper plating on the exposed conductor portion, and a step of forming the solder resist. And a method for manufacturing a printed wiring board.
ュウムをめっきする工程が、無電解めっきであることを
特徴とする請求項１に記載の印刷配線板の製造方法。2. The method for producing a printed wiring board according to claim 1, wherein the step of plating nickel or palladium on the copper of the printed wiring board is electroless plating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7041372A JP2682497B2 (en) | 1995-02-06 | 1995-02-06 | Manufacturing method of printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7041372A JP2682497B2 (en) | 1995-02-06 | 1995-02-06 | Manufacturing method of printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08213741A JPH08213741A (en) | 1996-08-20 |
| JP2682497B2 true JP2682497B2 (en) | 1997-11-26 |
Family
ID=12606601
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7041372A Expired - Fee Related JP2682497B2 (en) | 1995-02-06 | 1995-02-06 | Manufacturing method of printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2682497B2 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4691797B2 (en) * | 2001-02-15 | 2011-06-01 | イビデン株式会社 | Printed wiring board and manufacturing method thereof |
| JP3701949B2 (en) | 2003-04-16 | 2005-10-05 | 沖電気工業株式会社 | Wiring board for mounting semiconductor chip and manufacturing method thereof |
| JP5106351B2 (en) * | 2008-10-29 | 2012-12-26 | 京セラＳｌｃテクノロジー株式会社 | Wiring board and manufacturing method thereof |
| JP2015141998A (en) * | 2014-01-28 | 2015-08-03 | ファナック株式会社 | Printed circuit board including structure for preventing disconnection of wiring pattern due to corrosion |
| JP7490484B2 (en) | 2020-07-22 | 2024-05-27 | キオクシア株式会社 | Semiconductor Device |
-
1995
- 1995-02-06 JP JP7041372A patent/JP2682497B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08213741A (en) | 1996-08-20 |
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