JP2680046B2 - Superconducting transistor and manufacturing method thereof - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a superconducting transistor in which a superconductor and a semiconductor are used in combination, and more particularly to a superconducting transistor that controls a superconducting current by the electric field effect.

[Conventional technology]

Conventionally, regarding the field effect type superconducting transistor,
By Clark, Journal of Applied Physics, 51, 1980, 2736 (Journal of
Applied Physics, Vol. 51, pp. 2736, 1980). A device having a similar structure is disclosed in JP-A-60-142580. A cross-sectional structural view of this device is shown in FIG. 7 (c). A control electrode installed between two electrodes of the two superconducting conductive electrodes 6 which are close to each other and face each other on the semiconductor substrate 1 by about 0.1 μm.
It is changed by the voltage applied to 14. Control electrode 14 is 0.1
Since the devices are installed at a narrow interval of μm, the photoresist formed for processing the control electrode is used as a mask for forming the source / drain electrodes when manufacturing this device. There is. The manufacturing method is shown in FIGS. A semiconductor substrate 1 including an impurity introducing portion 8 as shown in FIG.
A superconductor 14 which will serve as a control electrode is formed thereon, and a resist pattern 10 having a length of about 0.1 μm is formed thereon. The lower film is plasma-etched using this resist pattern 10 as a mask. At this time, in order to form a photoresist stencil, isotropic etching that causes undercut is performed. This is because the source / drain electrodes and the control electrode do not come into contact with each other (Fig. 7 (b)). After forming the structure with the resist as an eave, the superconducting conductive electrode is attached so as to have no directivity to manufacture the device shown in FIG. 7 (c).

[Problems to be solved by the invention]

In Clark's prior art, no consideration has been given to installing a control electrode between the source and drain electrodes that are close to each other by 0.1 μm or less, and the characteristics of the field-effect superconducting transistor due to the miniaturization of the control electrode are not considered. The circuit may easily malfunction due to the variation, and the operation may become unstable.

The device disclosed in JP-A-60-142580 separates the source, control and drain electrodes by depositing a superconducting conductive electrode through a photoresist mask having an eaves structure. At this time, the length of the mask determines the distance between the superconducting electrodes. The method of forming a structure using a photoresist as an visor by isotropic plasma etching shown in this paper has poor controllability and it is technically necessary to retreat the control electrode with an accuracy of several nm with good reproducibility. It was difficult. In addition, when the superconducting electrode is vapor-deposited, the angle between the wafer and the vapor deposition source deviates by 2 to 3 degrees from 90 degrees,
There is a problem that the reproducibility of the device characteristics is poor, such as the distance between the superconducting electrodes changes and the electrical insulation between the control electrode and the source / drain electrodes becomes insufficient. That is, as shown in FIG. 9A, when vapor deposition is performed at an angle in the left direction, the superconducting electroconductive electrode 6 and the control electrode 14 come into contact with each other on the left side wall of the control electrode 14. In particular, when the film is formed by the sputtering method, the probability that it will go around and adhere to the side wall of the control electrode becomes higher. As shown in FIG. 9 (b), this is because the superconducting material adheres to the back side of the resist 10 that serves as an eaves, or adheres to the side wall of the control electrode. Also, the vapor deposition method,
When a film is formed by the sputtering method, what has once adhered may be reflected and redeposited. Therefore, the reflected superconductor is redeposited on the side wall of the control electrode, similar to FIG. 9 (b). Problem arises.

Also, the film thickness of the superconducting electrode must be smaller than the thickness of the control electrode in order to perform lift-off. In order to obtain a superconducting electrode with good superconducting properties, its thickness is
0.1 μm or more is required. Therefore, the aspect ratio of the control electrode (height / length of the control electrode) becomes larger than 1, and there is a problem that fine processing is difficult.

Increasing the size of the eaves, that is, increasing the difference between the control electrode length and the photoresist length reduces the problem of redeposition, but increases the distance between the impurity introduction part and the control electrode, and Deterioration of characteristics such as a decrease in the gain of.

An object of the present invention is to solve the problems of the prior art, to miniaturize the control electrode, to reduce variations in characteristics, and to stabilize circuit operation, and a superconducting transistor structure and manufacturing method. To provide.

[Means for solving the problem]

The above-described object is to provide a semiconductor substrate, an impurity introducing portion formed on the surface of the semiconductor substrate, a first superconducting electrode and a second superconducting electrode provided so as to face each other on the semiconductor substrate, and a first superconducting electrode on the semiconductor substrate. In a superconducting transistor having a control electrode provided between the superconducting electrode and the second superconducting electrode, a superconducting transistor is provided between the control electrode and the semiconductor substrate,
A first insulating film formed by oxidizing the semiconductor substrate, and a second insulating film provided between the control electrode and the first superconducting electrode and between the control electrode and the second superconducting electrode, respectively. And the dielectric constant of the substance forming the second insulating film is larger than that of the substance forming the first insulating film.

[Action]

In a field effect transistor using a superconductor, the distance between the source and drain electrodes made of the superconductor must be 0.2 μm or less in order to control the superconducting current. This corresponds to a distance less than 10 times the range (coherence length in the semiconductor) where the electron pair seeps from the superconductor to the semiconductor. Therefore, each of the source and drain electrodes must be placed adjacent to the gate electrode having a fine gate length.

If the gate electrode is first formed and the side wall thereof is covered with silicon nitride, it can be completely insulated even if silicon nitride having a film thickness of about 5 nm is used. Further, it is not deteriorated by subsequent ion implantation for introducing impurities and heat treatment for activation. In this case, since the superconducting electrode can be provided in contact with the insulating film on the side wall of the gate electrode,
The distance between the superconducting electrodes can be set to a constant value while maintaining a good electrical insulation between the superconducting electrode and the gate electrode, and this value may depend on the formation conditions of the superconducting electrode. Few. Therefore, the reproducibility of device characteristics can be improved.

〔Example〕

Hereinafter, a first embodiment of the present invention will be described with reference to FIG.

An insulating film 2 for separating elements is provided on a substrate 1, and two superconducting electrodes 6 serving as source / drain electrodes are provided on the substrate so as to face each other. The distance between these two electrodes is selected to be less than 10 times the coherence length in the semiconductor, which is the range where the superconducting proximity effect occurs. When the distance becomes larger than this, the electron waves of the electron pairs that exude into the semiconductor from the superconductor do not occur, and the superconducting current does not flow, so that the device does not operate. In the meantime, a control electrode 4 made of polycrystalline silicon is provided via the gate oxide film 3 in order to change the superconducting current flowing through the semiconductor between the two source / drain electrodes. Above the control electrode 4, a silicon nitride 5 serving as a mask during processing is formed.
However, the side walls are covered with silicon nitride 7 for electrically insulating the source from the control electrode 4 and the drain from the control electrode 4. The thinner the insulating film on the side wall, the better. This is because the gate length of the device corresponds to the sum of the control electrode length and the thickness of the insulating film on both side walls. In the semiconductor substrate 1 below the source / drain electrodes 6, an impurity introducing portion 8 containing carriers that does not freeze even at low temperatures is provided.

By applying a voltage to the control electrode 4 and accumulating the carriers, the range in which the electron pair seeps from the superconductor to the semiconductor is widened, and the superconducting current flowing to the source / drain electrodes is increased.

Next, a method of manufacturing this device will be described with reference to FIG. Insulation made of SiO ₂ with a thickness of about 200 nm by oxidizing the surface of a (100) -oriented Si single crystal substrate 1 containing boron as an impurity in a concentration of 1 × 10 ¹⁶ cm ^-3 in oxygen at about 1000 ° C. The film 2 is formed. Then, the insulating film 2 is processed by a chemical etching method using the photoresist pattern as a mask (FIG. 3A). A gate oxide film 3 made of SiO ₂ and having a thickness of about 10 nm is formed by thermal oxidation in oxygen at about 950 ° C., and then polycrystalline silicon 4 is formed to a thickness of about 100 nm by chemical vapor deposition (CVD method). And then a high concentration of phosphorus is diffused therein, and then silicon nitride 5 is deposited to a thickness of about 50 nm (FIG. 3 (b)). Then, a negative type electron beam resist pattern is formed by an electron beam drawing method, and using this as a mask, the silicon nitride 5 and the polycrystalline silicon 4 are processed by CCl ₄ gas by the reactive ion etching method by CH ₂ F ₂ gas. To do. (FIG. 3 (c)).

Next, a silicon nitride film 7 is deposited to a thickness of 5 nm by chemical vapor deposition (CVD method), and then reactive ion etching is performed with CH ₂ F ₂ gas to remove the silicon nitride film deposited on the substrate surface. Etching by the method. Then, the SiO ₂ film remaining on the surface of the substrate is removed by a chemical etching method using HF to expose a clean surface of the Si substrate (FIG. 3 (d)).

Further, arsenic is ion-implanted under the conditions of an acceleration voltage of 25 keV and an implantation amount of 5 × 10 ¹⁴ cm ^-2 , and then an anneal in pure nitrogen is performed at a temperature of 850 ° C. for 10 minutes to form an impurity introduction portion 8.

Furthermore, 1 × 10 ⁻⁷ pa is formed on this by electron beam evaporation method.
Then, Nb is deposited in a high vacuum to form a superconducting electrode 6 having a thickness of about 100 nm (FIG. 3 (e)). Finally, the superconducting transistor of the present invention can be obtained by removing unnecessary portions of the Nb thin film by the reactive ion etching method using a photoresist pattern mask. Although not shown in FIG. 1, a plurality of superconducting transistors are formed on the substrate 1, and these are made of Nb thin film having a thickness of about 100 nm and are connected to the superconducting conductive electrode 6 by a wire extending therethrough. , Make up the circuit. Although Nb is used as the material of the superconducting electrode 6 in this embodiment, it is not limited to this. Instead of Nb, Nb compounds such as NbN, Pb alloys, A
l, In, Sn or alloys thereof may be used. Further, it goes without saying that an oxide superconductor or an organic superconductor may be used. For example, (La _0.9 Sr _0.1 ) ₂ CuO ₄ and YBa ₂ Cu ₃ O
It is desirable to use a substance represented by a composition such as _7-δ or the like, or a substance similar to this from the viewpoint of high temperature operation of the device, and even in these cases, the object of the present invention can be sufficiently achieved. Needless to say.

In this embodiment, the superconductor remains on the silicon nitride film 5 as shown in FIG. 1. However, by removing the superconductor, electrical separation from the source / drain electrodes is surely achieved. Nor. As a means to remove,
A method of peeling off silicon nitride 5 in 160 ° C. hot phosphoric acid,
A method in which a polymer is applied and flattened, and then etched away by an etch back method, or a silicon nitride film 5 is used.
There is a method of forming an Al layer underneath and removing it by a lift-off method.

According to this example, since the superconducting conductive electrode can be provided in contact with the insulating film on the side wall of the gate electrode, while maintaining good electrical insulation between the superconducting conductive electrode and the gate electrode,
It is possible to form the distance between the superconducting electrodes to a constant value. This value is less likely to be affected by the formation conditions of the superconducting electrode. Therefore, the reproducibility of device characteristics can be improved.

When silicon nitride is used as the insulating film, the thickness is 5n.
It can maintain insulation even in thin films of m or less, and is suitable for miniaturization of control electrodes.
Materials such as O ₂ , SiO, Al ₂ O ₃ , YSZ (yttrium stapled zirconia), MgO, and yttrium oxide may be used. The same effect can be obtained by using the self-oxidized film of the control electrode. Moreover, since the impurity introduction part 8 is formed using the silicon nitride 5 as a mask, the channel length can be shortened. Therefore, the switching speed of the device can be increased and the mutual conductance can be improved without causing punch-through.

Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 2 shows a sectional view of a superconducting transistor according to a second embodiment of the present invention.

Between the superconducting electrodes corresponding to the source and drain electrodes,
This is a structure in which the control electrode is provided via an insulating film made of silicon nitride 7. It has an eaves structure in which silicon nitride is inserted inside the polycrystalline silicon 4. The manufacturing method is almost the same as the step shown in the first embodiment, but includes the step of forming an eaves structure. This step is shown in FIG. As shown in FIG. 8 (a), a negative type electron beam resist pattern 10 is formed by an electron beam drawing method, and using this as a mask, the silicon nitride 5 and CCl 3 are removed by a reactive ion etching method using CH ₂ F ₂ gas. _The polycrystalline silicon 4 is processed with ₄ gases (FIG. 8 (b)). Then again 11
Oxidation is carried out in oxygen at 00 ° C. As a result, an oxide film 11 having a thickness of about 15 nm is formed on the side surface of the processed polycrystalline silicon (FIG. 8 (c)). The thickness of the oxide film 11 can be easily controlled by controlling the oxidation time. Further, this oxide film is removed by a chemical etching method using HF to recede the side walls of the polycrystalline silicon, and a structure in which the upper silicon nitride film is used as an eaves is obtained (FIG. 8 (d)).

Although Nb is used as the material of the superconducting electrode 6 in this embodiment, it is not limited to this. Nb instead of Nb
A compound of Nb such as N, Pb alloy, Al, In, Sn or an alloy thereof may be used. Further, it goes without saying that an oxide superconductor or an organic superconductor may be used. For example, (La
_0.9 Sr _0.1 ) ₂ CuO ₄ and YBa ₂ Cu ₃ O _7-δ and similar substances, and similar substances are preferable from the viewpoint of high temperature operation of the device. Needless to say, the object of the present invention can be sufficiently achieved.

Further, in the present embodiment, the sidewalls of polycrystalline silicon were oxidized to obtain a structure having a silicon nitride film as an overhang, but in order to obtain a uniform oxide film thickness,
It is desirable to oxidize in oxygen of 1000 ℃ or more.

In this embodiment, the superconductor remains on the upper portion of the silicon nitride film 5 as shown in FIG. 2. However, by removing the superconductor, electrical separation from the source / drain electrodes is surely achieved. Nor. As a means to remove,
A method of peeling off silicon nitride 5 in 160 ° C. hot phosphoric acid,
A method in which a polymer is applied and flattened, and then etched away by an etch back method, or a silicon nitride film 5 is used.
There is a method of forming an Al layer underneath and removing it by a lift-off method.

When the device shown in this example was operated, the electrical insulation between the control electrode and the source / drain electrodes was good, no malfunction occurred, and the gain was improved.

In addition, the restrictions on the vapor deposition conditions for the superconducting electrode were reduced, and the production yield was improved.

Next, a third embodiment of the present invention will be described with reference to FIG. FIG. 4 shows a sectional view of a superconducting transistor according to a third embodiment of the present invention. FIG. 6 shows the manufacturing process.
The substrate 1 is provided with a protrusion 9 made of a substrate material, which corresponds to a substantial channel. In order to change the number of carriers in this channel, a control electrode 4 made of polycrystalline silicon is provided via a gate oxide film 3.

Superconducting electrodes 6 are provided on both sides of the protrusion 9 and the control electrode 4 so as to face each other, which correspond to the source / drain electrodes.

When a voltage is applied to the control electrode 4, carriers are accumulated from the impurity introducing portion 8, the range in which the electron pair seeps out from the superconductor is expanded, and the superconducting current flowing to the source / drain electrodes is increased.

Since it is aligned with the source-channel-drain, the current flows more efficiently. However, this protrusion 9
The width of the control electrode 4 and the width of the control electrode 4 determine the distance between the source and drain electrodes, and therefore must be 10 times or less the coherence length in the semiconductor. Therefore, the control electrode 4 is microfabricated and both sides are covered with silicon nitride to maintain the electrical insulation between the source and drain electrodes. The surface of the Si single crystal substrate 1 with a (100) plane orientation containing boron as an impurity at a concentration of 1 × 10 ¹⁵ cm ^-3 is about 100
The insulating film 2 made of SiO ₂ and having a thickness of about 200 nm is formed by oxidizing in oxygen at 0 ° C. Then, the insulating film 2 is processed by a chemical etching method using the photoresist pattern as a mask (FIG. 6A). An oxide film 3 of SiO _{2 having a} thickness of about 10 nm is formed by thermal oxidation in pure oxygen at about 950 ° C. (FIG. 6 (b)), followed by chemical vapor deposition (CVD).
Method), polycrystalline silicon 4 is deposited to a thickness of about 100 nm, and then silicon nitride 5 is deposited to a thickness of about 50 nm (FIG. 6 (c)). Then, a negative type electron beam resist pattern is formed by an electron beam drawing method, and using this as a mask, the silicon nitride 5, the polycrystalline silicon 4, and the oxide film 3 are processed by the reactive ion etching method using CF ₄ gas. After that, the silicon constituting the substrate 1 is etched to a depth of about 100 nm (FIG. 6 (d)). Next, the exposed surfaces of the substrate 1 and the polycrystalline silicon substrate 1 are oxidized by thermal oxidation in pure oxygen to form an oxide film with a thickness of about 10 nm, and then arsenic ions are accelerated at an acceleration voltage of 25 keV and an implantation amount of 5 Ion implantation was performed under the condition of × 10 ¹⁴ cm ^-2 , and then 850 ° C.
Heat treatment is performed for 10 minutes in pure nitrogen at the temperature of 1 to activate the implanted arsenic to form the impurity introduction portion 8 (FIG. 6 (e)).

Next, a resist 10 is applied so that the etched surface of silicon is filled up to a depth corresponding to the etching depth of about 100 nm, and then a silicon nitride film 7 is deposited to a thickness of 5 nm by a chemical vapor deposition method (CVD method). The side wall of the polycrystalline silicon 4 is insulated (FIG. 6 (f)). After removing the applied resist by immersing it in acetone, SiO ₂ on the surface is removed in hydrofluoric acid diluted 100 times with water to expose a clean Si surface. Furthermore, Nb is deposited by electron beam evaporation to a thickness of approximately 10
When a 0 nm superconducting film is formed (Fig. 6 (g)) and Nb is processed into a superconducting electrode 6 by reactive ion etching using CF ₄ gas with a photoresist pattern as a mask, the structure shown in Fig. 4 is obtained. It is possible to obtain the superconducting field effect transistor of the present invention.

In the superconducting transistor shown in this embodiment, the superconducting electrode and the channel are on the same plane, so that the superconducting proximity effect can be increased. Since the control electrode and the source / drain electrode are electrically separated from the source / drain electrode, malfunction due to fine processing is eliminated.

Although Nb is used as the material of the superconducting electrode 6 in this embodiment, it is not limited to this. Nb instead of Nb
A compound of Nb such as N, Pb alloy, Al, In, Sn or an alloy thereof may be used. Further, it goes without saying that an oxide superconductor or an organic superconductor may be used. For example, (La
_0.9 Sr _0.1 ) ₂ CuO ₄ and YBa ₂ Cu ₃ O _7-δ and similar substances, and similar substances are preferable from the viewpoint of high temperature operation of the device. Needless to say, the object of the present invention can be sufficiently achieved.

In the embodiment, as shown in FIG. 4, the superconductor remains on the upper part of the silicon nitride film 5, but it is needless to say that the superconductor is surely electrically separated from the source / drain electrode. Absent. 16 means to remove
A method of peeling off the silicon nitride 5 in hot phosphoric acid at 0 ° C., a method of applying a polymer to planarize and then etching away by an etch back method, or an Al layer provided under the silicon nitride film 5 and lift-off There is a method of removing by the method.

Next, a fourth embodiment of the present invention will be described with reference to FIG. FIG. 5 shows a sectional view of a superconducting transistor according to a fourth embodiment of the present invention. It has an eaves structure in which the silicon nitride film 7 enters inside the polycrystalline silicon 4 which is the control electrode. The manufacturing method of the eaves structure is shown in FIG. Insulation made of SiO ₂ with a thickness of about 200 nm by oxidizing the surface of a Si single crystal substrate 1 with a (100) plane orientation containing boron as an impurity in a concentration of 1 × 10 ¹⁵ cm ⁻³ in oxygen at about 1000 ° C. Layer 2
To form Then, the insulating film 2 is processed by a chemical etching method using the photoresist pattern as a mask. About 95
About 10 nm thick SiO by thermal oxidation in pure oxygen at 0 ℃
_An oxide film 3 made of ₂ is formed, and then, polycrystalline silicon 4 is deposited to a thickness of about 100 nm by chemical vapor deposition (CVD method), and then silicon nitride 5 is deposited to a thickness of about 50 nm. Let Then, a negative type electron beam resist pattern is formed by an electron beam drawing method, and using this as a mask, the silicon nitride 5, the polycrystalline silicon 4, and the oxide film 3 are processed by the reactive ion etching method using CF ₄ gas. After that, the silicon constituting the substrate 1 is etched to a depth of about 100 nm. Next, the exposed surfaces of the substrate 1 and the polycrystalline silicon 4 are oxidized by thermal oxidation at 1100 ° C. in pure oxygen to form an oxide film with a thickness of about 10 nm, and then arsenic ions are implanted at an acceleration voltage of 25 keV. Ion implantation is performed under the condition of an amount of 5 × 10 ¹⁴ cm ⁻² , followed by heat treatment in pure nitrogen at a temperature of 850 ° C. for 10 minutes to activate the implanted arsenic to form the impurity introduced portion 8. Subsequently, the oxide film on the surface is removed in hydrofluoric acid diluted 100 times with water to form an eaves structure.

Next, a resist having a thickness of about 100 nm corresponding to the etching depth is applied so as to fill the etched surface of silicon, and then a silicon nitride film 7 is deposited to a thickness of 5 nm by chemical vapor deposition (CVD method). Then, the side wall of the polycrystalline silicon 4 is insulated. After removing the applied resist by immersing it in acetone, the surface SiO ₂ is removed in hydrofluoric acid diluted with water to expose a clean Si surface. Further, Nb is deposited by electron beam evaporation to form a superconducting film having a thickness of about 100 nm, and Nb is processed into a superconducting electrode 6 by reactive ion etching using CF ₄ gas with a photoresist pattern as a mask. The superconducting field effect transistor of the present invention having the structure shown in FIG. 5 can be obtained.

In the superconducting transistor shown in this embodiment, the superconducting electrode and the channel are on the same plane, so that the superconducting proximity effect can be increased. Since the control electrode and the source / drain electrode are electrically separated from the source / drain electrode, malfunction due to fine processing is eliminated.

Although Nb is used as the material of the superconducting electrode 6 in this embodiment, it is not limited to this. Nb instead of Nb
A compound of Nb such as N, Pb alloy, Al, In, Sn or an alloy thereof may be used. Further, it goes without saying that an oxide superconductor or an organic superconductor may be used. For example, (La
_0.9 Sr _0.1 ) ₂ CuO ₄ and YBa ₂ Cu ₃ O _7-δ and similar substances, and similar substances are preferable from the viewpoint of high temperature operation of the device. Needless to say, the object of the present invention can be sufficiently achieved.

In addition, in the present embodiment, the sidewalls of polycrystalline silicon were oxidized to obtain a structure having a silicon nitride film as an overhang, but in order to obtain a uniform oxide film thickness.
It is desirable to oxidize in oxygen above 00 ℃.

In this embodiment, the superconductor remains on the silicon nitride film 5 as shown in FIG. 5, but it can be surely electrically separated from the source / drain electrode by removing the superconductor. Nor. As a means to remove,
Method of peeling off silicon nitride 5 in 160 ° C hot phosphoric acid,
A method in which a polymer is applied and flattened, and then etched away by an etch back method, or a silicon nitride film 5 is used.
There is a method of forming an Al layer underneath and removing it by a lift-off method.

According to the present embodiment, since the superconducting conductive electrode can be provided in contact with the insulating film on the side wall of the gate electrode, the distance between the superconducting conductive electrodes can be increased while maintaining good electrical insulation between the superconducting conductive electrode and the gate electrode. It can be formed to a constant value, and this value is less dependent on the forming conditions of the superconducting electrode. Therefore, the reproducibility of device characteristics can be improved.

〔The invention's effect〕

According to the present invention, it is possible to easily realize the miniaturization of the control electrode, so that it is possible to provide a superconducting device having improved reproducibility and uniformity, which improves the manufacturing yield and the dimensional accuracy of the channel length. . Therefore, the circuit using the superconducting device of the present invention has the effects of reducing malfunctions due to slight fluctuations in voltage and temperature, stabilizing the circuit operation, and increasing the speed of transfer conductance signal transmission.

[Brief description of the drawings]

1 is a sectional view showing a part of a superconducting transistor according to a first embodiment of the present invention, FIG. 2 is a sectional view showing a part of a superconducting transistor according to a second embodiment of the present invention, and FIG. FIG. 4 is a sectional view showing a part of a superconducting transistor according to the third embodiment of the present invention, and FIG. 5 is a sectional view showing a manufacturing process of the device shown in FIG. Sectional drawing which shows a part, 6th
FIG. 7 is a diagram showing a manufacturing process of the device shown in FIG.
FIG. 8 is a cross-sectional view of a device according to the prior art and a view showing a manufacturing process, FIG. 8 is a view showing a manufacturing process for obtaining the eaves structure shown in FIGS. 2 and 5, and FIG. 9 is a problem of the prior art. It is sectional drawing which shows a point. 1 ... Substrate, 2 ... Insulating film, 3 ... Gate insulating film, 4 ... Polycrystalline silicon, 5 ... Silicon nitride, 6 ... Superconducting electrode, 7 ... Silicon nitride, 8 ... Impurity introduction part,
9 ... Projection, 10 ... Resist, 14 ... Control electrode.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Fumio Murai 1-280 Higashi Koikeku, Kokubunji, Tokyo Inside Central Research Laboratory, Hitachi, Ltd. (72) Tokio Kure 1-280 Higashi Koikeku, Kokubunji, Tokyo Hitachi Ltd. Central Research Laboratory (72) Inventor Haruhiro Hasegawa 1-280, Higashi Koigokubo, Kokubunji, Tokyo (56) References, Central Research Laboratory, Hitachi, Ltd. (56) Reference JP 61-206277 (JP, A) JP 64-13781 ( JP, A) JP-A-1-241186 (JP, A)

Claims (5)

(57) [Claims] 1. A semiconductor substrate, an impurity introducing portion formed on the surface of the semiconductor substrate, a first superconducting electrode and a second superconducting electrode provided on the semiconductor substrate so as to face each other, and the semiconductor substrate. In a superconducting transistor having a control electrode provided between the first superconducting electrode and the second superconducting electrode, the semiconductor substrate is provided between the control electrode and the semiconductor substrate, and the semiconductor substrate is oxidized. The first insulating film formed by, and the second insulating film respectively provided between the control electrode and the first superconducting electrode and between the control electrode and the second superconducting electrode. A superconducting transistor, characterized in that the dielectric constant of the substance forming the second insulating film is larger than the dielectric constant of the substance forming the first insulating film. 2. The superconducting transistor according to claim 1, wherein the substance forming the second insulating film is silicon nitride or Si.
A superconducting transistor, which is an oxide of O, Al ₂ O ₃ , YSZ, MgO, and yttrium. 3. The superconducting transistor according to claim 1, wherein the impurity introducing portion is formed on the surface of the semiconductor substrate in contact with the first superconducting electrode and the second superconducting electrode. Superconducting transistor. 4. The superconducting transistor according to claim 1, wherein the distance between the first superconducting electrode and the second superconducting electrode is the length of the control electrode and the control electrode and the first superconducting electrode. And a thickness of the second insulating film provided between the control electrode and the second superconducting electrode, respectively. 5. A step (I) of depositing a first insulating film, a control electrode film and a third insulating film formed on the semiconductor substrate by oxidizing the semiconductor substrate, and (II) the third insulating film. A step of forming a pattern of an electron beam resist on the insulating film and processing the control electrode film and the third insulating film using the formed pattern as a mask; (III) on the semiconductor substrate surface and the control electrode side surface A step of depositing a second insulating film having a dielectric constant larger than that of the first insulating film, and removing the second insulating film deposited on the surface of the semiconductor substrate; and (IV) the second insulating film. A step of forming an impurity introduction part on the surface of the semiconductor substrate from which the film has been removed, and depositing a superconducting material to form the first and second superconducting conductive electrodes so as to face each other with the control electrode sandwiched therebetween. Superconducting transistor characterized by Manufacturing method.