JP2673843B2 - Loop pattern detector - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a loop pattern detecting device for detecting whether or not there is a loop pattern portion in a wiring pattern on a printed board.

[0002]

2. Description of the Related Art A loop pattern is not preferable in manufacturing because it causes unnecessary line lengths and unnecessary vias, and is also not preferable electrically because it becomes a source of radio waves. Conventionally, it has been visually confirmed whether or not a loop portion exists in a wiring pattern.

[0003]

However, since the wiring pattern has a repeating geometric pattern, it is not easy to visually find the loop pattern portion therein, and it is difficult to correct the wiring pattern. there were. The present invention was created in view of this point, and it is possible to automatically detect a looped portion in a route between pins in a wiring pattern of a printed board. The purpose is to provide a device.

[0004]

FIG. 1 is a diagram illustrating the principle of the present invention. As shown in the figure, the loop pattern detection device of the present invention includes a non-target pattern removal function unit 6, a temporary pattern data storage unit 7, a route simplification function unit 8, and a route line segment table 9. , Loop determination function unit 10
And a loop flag setting function unit 11, wherein the non-target pattern removal function unit 6 removes the non-target pattern from the wiring pattern of the printed board and obtains the result of removal. The temporary pattern data storage unit 7 is configured to write the temporary pattern data stored in the temporary pattern data storage unit 7, and the route simplification function unit 8 uses two patterns from the pattern data stored in the temporary pattern data storage unit 7. Finds a via connected to the line, replaces the combination of the via and the two lines in the temporary pattern data storage unit 7 with the maximum side of the triangle formed by the via and the two lines, and The loop determination function unit 10 is configured to perform a process of registering the maximum side as a route line segment in the route line segment table 9. It is configured to check whether or not a route line segment overlapping the route line segment output from the route simplification function unit 8 is registered in the route line segment table 9, and if there is, a process for determining that there is a loop is performed. The loop flag setting function unit 11 is configured to perform a process of attaching a loop flag to vias and lines that form the route line segment that is the basis of the determination that there is a loop. It is what

[0005]

The wiring pattern data of the printed board is input to the non-target pattern removal function section 6. The non-target pattern removal function unit 6 removes the non-target pattern therein and stores the temporary pattern data obtained as a result of the removal in the temporary pattern data storage unit 7. The path simplification function unit 8 refers to the contents of the temporary pattern data storage unit 7 to find a via connected to the two lines, and the temporary pattern data storage unit 7
The two lines and the via found in are replaced with the maximum side of the triangle formed by the two lines and the via. Further, the route simplification function unit 8 registers the maximum side (referred to as a route line segment) of the replacement result in the route line segment table 9. The loop determination function unit 10 checks whether or not a line segment overlapping the route line segment output from the route simplification function unit 8 is registered in the route line segment table 9, and if it is registered, a loop is detected. judge. The loop flag setting function unit 11 starts the operation when it is determined that there is a loop, and the via and the line (that is, the route line segment that corresponds to the route line segment that is the basis of the determination that the loop exists). Set the loop flag for the route on the wiring pattern to be used.

[0006]

FIG. 2 is a functional block diagram of an embodiment of the loop pattern detecting apparatus of the present invention. In the figure, 1 is an external data fetching function unit, 2 is a pattern data storage unit, 3 and 3'is a data access function unit, 4 is a line connection number calculation function unit, 5 is a line connection number table, and 6 is a target. Outer pattern removal function, 7 is a temporary pattern
A data storage unit, 8 is a route simplification function unit, 9 is a route line segment table, 10 is a loop determination function unit, 11 is a loop flag setting function unit, and 12 is a route target pattern table.

The hardware configuration of the loop pattern detection device is the same as that of an ordinary computer. As software, an external data fetching function unit 1, a data access function unit 3, a line connection number calculation function unit 4, and a non-target pattern Removal function unit 6, path simplification function unit 8, loop determination function unit 1
There are programs corresponding to 0, loop flag set function unit 11, and the like.

The external data fetching function section 1 fetches the wiring pattern data of the printed board stored in an external storage device (not shown) into the pattern data storage section 2. The data access function unit 3 accesses the pattern data storage unit 2. The line connection number calculation function unit 4 calculates the number of lines connected to pins (or pads) and the number of lines connected to vias by referring to the contents of the pattern data storage unit 2 and calculates the number. The result is written in the line connection number table 5.

The untargeted pattern removing function unit 6 refers to the contents of the line connection number table 5 to find a pin to which one line is connected and a via to which one line is connected, and The line and the pin or the via of the book are removed from the wiring pattern data, and the temporary pattern data obtained as a result is stored in the temporary pattern data storage unit 7. The data access function unit 3 ′ accesses the temporary data storage unit 7.

The path simplification function unit 8 refers to the contents of the line connection number table 5 and the contents of the temporary pattern data storage unit 7 to find a via to which two lines are connected, and The combination of the via and the two lines in the data storage unit 7 is replaced with the maximum side of a triangle formed by the via and the two lines (referred to as a route line segment), and the route line segment is replaced by the route line segment. It is stored in the table 9. Further, the actual route on the wiring pattern corresponding to the route line segment is written in the route target pattern table 12.

The loop determination function unit 10 checks whether or not there is a route line segment in the route line segment table 9 that overlaps with the route line segment output from the route simplification function unit 8. If there is, a loop is made. It is determined that there is. The loop flag setting function unit 11 sets the loop flag on the via and line that form the route line segment when it is determined that there is a loop.

FIG. 3 is a diagram showing a loop pattern detection flow performed by the loop pattern detection device of FIG.
In step S1, the pattern data is read into the pattern data storage unit 2. This processing is performed by the external data fetching function unit 1. In step S2, the number of lines connected to the pin and the via is calculated in order. This processing is performed by the line connection number calculation function unit 4.

In step S3, the pin having one line and its connecting line are connected to the loop target data (pattern.
Data) to create temporary pattern data. This processing is performed by the non-target pattern removal function unit 6
Done in In step S4, a via to which two lines are connected is taken out from the temporary pattern data, and the route is simplified so that the maximum side of the formed triangle becomes a new route. The new route (route line segment) is registered in the route line segment table 9. This processing is performed by the route simplification function unit 8.

In step S5, the overlap between the simplified line segment and the registered route line segment is checked, and if they overlap, it is determined to be a loop. This process is performed by the loop determination function unit 10. In step S6, it is determined whether the loop. If Yes, the process proceeds to step S7, and if No, the process returns to step S4. This processing is performed by the loop determination function unit 1
Performed at 0.

In step S7, when looping, a via / line forming the route line segment is provided with a loop flag to distinguish it from other vias / lines. This processing is performed by the loop flag setting function unit 11. In step S8, it is checked whether or not all data has been detected, and Yes
In case of No, the process is ended, and in case of No, the process returns to step S4.

FIG. 4 is a diagram showing the structure of pattern data. As shown in the figure, pin names are sequentially stored in the pin storage area, via names are sequentially stored in the via storage area, and line names are sequentially stored in the line storage area. Corresponding to each pin name, center coordinate X, center coordinate Y,
Layer number 1, layer number 2, size X, size Y, flags and the like are provided. Similarly, center coordinates X, center coordinates Y, layer number 1, layer number 2, size X, size Y, flag, etc. are provided corresponding to each via name. A start point X, a start point Y, an end point X, an end point Y, a layer number, a line width, a flag, etc. are provided corresponding to each line name. Flag 0 indicates before detection, flag 1 indicates a loop pattern, and flag -1 indicates detected.

5 and 6 are diagrams showing an example of detecting a loop pattern according to the present invention. In the figure, V ₁ to V ₆ are vias, and P is a pin (or pad). FIG. 6 is a diagram showing a wiring pattern on a printed board. Since one line is connected to the pin P ₃₅ as shown in FIG. 5, this line is removed. Pin P ₃₅
The state with the line connected to is removed is shown in.

In the via V ₁ , two lines are connected. Therefore, the via V ₁ and the two lines connected thereto are replaced with the route line segment.
This state is shown in. The order of checking the vias may be arbitrary. At, two lines are connected to the via V ₂ . Therefore, the via V ₂ and the two lines connected thereto are replaced with the route line segment. This state is shown in.

In the via V ₃ , two lines are connected. Therefore, the via V ₃ and the two lines connected thereto are replaced with the route line segment.
This state is shown in. As can be seen from the above, since the two route line segments overlap, it is determined that there is a loop. The overlapping route line segments are processed as one line thereafter.

In the via V ₄ , two lines are connected. Therefore, the via V ₄ and the two lines connected thereto are replaced with the route line segment.
This state is shown in. At, two lines are connected to the via V ₅ . Therefore, via V ₅
And the two lines connected to this are replaced by route line segments. This state is shown in.

In the above, two lines are connected to the via V ₆ . Therefore, the via V ₆ and the two lines connected thereto are replaced with the route line segment.
This state is shown in. As can be seen from the above, the overlap of the route line segments is newly detected. From this, it can be seen that the wiring pattern has two loops.

[0022]

As is apparent from the above description, according to the present invention, it is possible to automatically and accurately detect the position of the loop pattern in the wiring on the printed board, and the correction work is facilitated. . As a result, it is possible to obtain a printed board which is free from unnecessary line lengths and vias and has few quality sources of radio waves.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is a functional block diagram of an embodiment of the loop pattern detection device of the present invention.

FIG. 3 is a diagram showing a loop pattern detection flow according to the present invention.

FIG. 4 is a diagram showing a structure of pattern data.

FIG. 5 is a diagram showing an example of detecting a loop pattern according to the present invention.

FIG. 6 is a diagram showing a detection example (continuation) of a loop pattern according to the present invention.

[Explanation of symbols]

 1 External data import function unit 2 Pattern data storage unit 3 Data access function unit 4 Line connection number calculation function unit 5 Line connection number table 6 Untargeted pattern removal function unit 7 Temporary pattern data storage unit 8 Route simplification function Part 9 Route line segment table 10 Loop determination function part 11 Loop flag setting function part

Claims (1)

(57) [Claims] 1. A non-target pattern removal function unit (6), a temporary pattern data storage unit (7), a route simplification function unit (8), a route line segment table (9), and a loop determination function. A loop pattern detection device comprising a section (10) and a loop flag setting function section (11), wherein the non-target pattern removal function section (6) is a pattern not included in the printed wiring board pattern. And the temporary pattern data obtained as a result of the removal are written to the temporary pattern data storage unit (7) .The route simplification function unit (8) is configured to write the temporary pattern data. A via connected to two lines is found from the pattern data of the storage unit (7), and the combination of the via and the two lines in the temporary pattern data storage unit (7) is set to the via and the two lines. Book la It is configured to replace the maximum side of a triangle composed of INs and to register the maximum side as a route line segment in the route line segment table (9) .The loop determination function unit (10) Check whether or not the route line segment that overlaps with the route line segment output from the optimization function unit (8) is registered in the route line segment table (9), and if there is, a process to determine that there is a loop is performed. The loop flag set function unit (11) is configured to add a loop flag to the via and line that form the route line segment that is the basis of the determination that there is a loop. A loop pattern detection device characterized in that