JP2671132B2 - Power driver IC - Google Patents

Description

DETAILED DESCRIPTION [Overview] In a power driver IC capable of detecting a load state, load open and load short can be distinguished by combining and determining the level of an input terminal and the level of a status terminal.

[Industrial applications]

The present invention relates to a power driver IC capable of distinguishing between load open and load short with one status terminal.

There are types of power driver ICs that output a status output to the outside by diagnosing whether the self status or the load status is normal or abnormal.

Diagnostic contents include overheat detection, overcurrent detection, overvoltage detection, low voltage detection, load open detection, load short detection (same as overcurrent detection), but the number of status outputs is limited due to the limited number of package pins. Limited. Therefore, it is desired that a large amount of status information can be output from a small number of status terminals.

[Conventional technology]

Conventional high-side switch type power driver
The IC is constructed as shown in FIG. 3 or 4. The power driver IC1 shown in the figure is an example of a 5-pin package, IN is an input terminal that receives an external control signal, ST is a status terminal that outputs status information, Vcc is a power terminal, GND is a ground terminal, and OUT is connected to a load 3. Output terminal. The control signal given to the input terminal IN from the control device 2 such as CPU is inverted by the inverter 11 and passed through the inhibition gate 12 to the driver 13
To enter. In the following description, it is assumed that the power SW (switch) 14 is turned on when the control signal is H (high) and turned off when the control signal is L (low), but the logic is not limited to this.

When the power SW14 turns on, the power supply terminal Vcc changes to the output terminal OUT
A current i flows through the load 3 through the. At this time, the overvoltage detection circuit 15 monitors the voltage of the power supply terminal Vcc and outputs the detection output A when the voltage is overvoltage. Further, the overheat detection circuit 16 monitors the temperature in the IC 1 and outputs an overheat detection output B when the temperature rises abnormally. If one of these detection outputs A and B occurs, the inhibit gate 12 blocks the on-input to the driver 13, and the power SW14
To turn off forcibly.

In the system shown in FIG. 3, in addition to this, the overcurrent detection circuit 17 monitors a minute current i ′ obtained by shunting a part of the load current i, and outputs an overcurrent detection output C when the value exceeds a certain value. Power SW14 is forced off.

In FIG. 4, this portion is used as an overcurrent open detection circuit 18, which detects a short circuit and an open circuit of the load 3 from the voltage across the resistor R through which a minute current i ′ flows, and outputs a current limit output when a short circuit (when an overcurrent is detected). Input C to gate 12 and power SW
To turn off forcibly.

FIG. 5 is an explanatory diagram of the overcurrent open detection circuit 18, 21 is a differential circuit for detecting the voltage V generated in the resistor R by the current i ', 22 is the voltage V becomes higher than the short circuit detection reference value V ₂ . Sometimes a comparator circuit that sets the current limit output C to H, 23
Is a comparator circuit which sets the output D to H when the voltage V becomes lower than the open detection reference value V ₁ , and 24 is a gate which takes the logical sum of these outputs C and D. The comparator circuits 22 and 23 and the gate 24 constitute a window comparator having reference values V ₁ and V ₂ , and its output E becomes L (normal) if the voltage V is between V ₁ and V ₂ ,
It becomes H (abnormal) when the voltage V is V ₁ or less or V ₂ or more.

In the method shown in FIG. 4, this detection output E is sent to the status terminal ST.
Further, in the method of FIG. 3, the levels of H and L2 values corresponding to the voltage of the output terminal OUT are output from the buffer BUF to the status terminal ST.

[Problems to be solved by the invention]

In the system shown in FIG. 3, since the load 3 is monitored by the status terminal ST by the voltage detection type, each part has the following relationship.

In this method, if the load is normal, IN = H (ON) and ST = H
Since it is (normal), a short circuit in which IN = H and ST = L (abnormal) can be easily detected. However, an open with IN = H and ST = H is considered normal as it is.
When IN = L, ST = L (normal) or ST = H (abnormal) must be detected and determined. As described above, it is a problem that the load open cannot be detected as an abnormality when IN = H.

On the other hand, the method shown in FIG.
Since the monitor is a current detection type, each part has the following relationship.

In this method, ST at normal times becomes L for both IN = H and L. And when abnormal, IN = H, open and short both ST = H
Therefore, any load abnormality at IN = H can be detected. However, in order to reduce the status terminal ST, FIG. 5 (a)
As a result of integrating the outputs C and D at the gate 24, it is impossible to distinguish between open and short.

According to the present invention, any load abnormality can be detected in the state of IN = H, and if IN = L is set when the load abnormality is detected, it is possible to determine whether the load abnormality is short circuit or open circuit with only one status terminal ST. It is a thing.

[Means for solving the problem]

According to the present invention, when the external control signal applied to the input terminal (IN) reaches a predetermined level, the output terminal (OUT) transfers the external load (3).
A power switch (14) for passing a current through, and an overcurrent open detection circuit (18) for inverting the load abnormality detection output (E) when detecting that the value of the current is below or above the normal range, A first gate (G) that performs a logical product of the inverted level (F) of the control signal and the level of the output terminal (OUT).
₁ ), and a second gate (G ₂ ) that takes the logical sum of the output (G) of the first gate (G ₁ ) and the load abnormality detection output (E)
With a status output circuit (19) and a status terminal (S that can detect the output of the second gate (G ₂ ) from the outside.
T) and the control signal is the power switch (1
When the status terminal (ST) reaches the load abnormality detection level at the level at which 4) is turned on, it is possible to determine whether the load is short-circuited or open by reversing the level of the control signal. It is a feature.

[Action]

Since the load abnormality detection output E of the overcurrent open detection circuit is a combination of the short detection output C and the open detection output D, the occurrence of these load abnormalities can be detected in the state of IN = H. When this load abnormality is detected, the output terminal OUT
By referring to the level, it is possible to distinguish whether the load abnormality is open or short-circuited. Status output circuit 19 is 1
This is made possible by one status terminal ST.

The first gate G ₁ outputs the OUT level when IN = L. If it is H, it is open, and if it is L, it is another case. Therefore, the output G of the first gate G ₁ is guided to the status terminal ST through the second gate. First
The output of the gate G ₁ is set to H only when IN = L and the load is open so that the second gate G ₂ does not interfere with the passage of the load abnormality detection output E in other cases.

In this way, if IN = H and ST = H (abnormal), then when IN = L, ST = H (open) or ST =
By detecting whether L (short) occurs, the type of load abnormality can be discriminated by only one status terminal ST.

〔Example〕

FIG. 1 is a configuration diagram showing an embodiment of the present invention, in which a status output circuit 19 is added to the configuration of FIG. The status output circuit 19 is composed of _two gates G ₁ and G ₂ , and the AND gate G ₁ uses the level of the input terminal IN as an inverter.
The logical product of the output F inverted at 11 and the level of the output terminal OUT is obtained. Further, the OR gate G ₂ takes the logical sum of the output G of the AND gate G ₁ and the detection output E of the overcurrent open detection circuit 18, and outputs the output to the status terminal ST. Therefore,
The relation of each part is as follows.

FIG. 2 is a determination processing flowchart in the control device 2. The controller 2 has an input terminal IN for controlling IC1.
The control signal is given to the input terminal at that time.
I always know the level of IN. So in step S1 IN
= H is determined, the process proceeds to step S2 and the status terminal
Check the ST level. If ST = L, the load is normal, but if ST = H, the load is abnormal. Therefore, the input to the terminal IN is switched to L in step S3, and the level of the status terminal ST is checked in step S4. At this time, if ST = H, the load is open, and if ST = L, the load is short-circuited.

When ST = L is determined in step S1, the step
If S = L is determined in S5, the load is normal, and ST = H
If it is determined that the load is open, it can be determined.

〔The invention's effect〕

As described above, according to the present invention, the power driver IC
There is an advantage that the load short circuit and the load open circuit can be distinguished and detected by using only one status terminal.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention, FIG. 2 is a flowchart of a determination process of the present invention, FIGS. 3 and 4 are configuration diagrams showing different examples of a conventional power driver IC, and FIG. It is explanatory drawing of an overcurrent open detection circuit.

Claims (1)

(57) [Claims] 1. When an external control signal applied to an input terminal (IN) reaches a predetermined level, the output terminal (OUT) outputs an external load (3).
A power switch (14) for passing a current through, and an overcurrent open detection circuit (18) for inverting the load abnormality detection output (E) when detecting that the value of the current is below or above the normal range, The inversion level (F) of the control signal and the output terminal (OU
T) level of the first gate (G ₁ ) and the second gate (G ₁ ) output (G) and the load abnormality detection output (E) is ORed. a status output circuit (19) having a G _2), and a status terminal for the output of the second gate (G ₂₎ can be detected externally (ST), said control signal turning on the power switch (14) When the status terminal (ST) reaches the load abnormality detection level at a level which is set to the above level, it is possible to determine whether the load is short-circuited or open by reversing the level of the control signal. I C.