JP2666707B2 - Screen inspection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for inspecting an optical screen which is electrically controlled and displayed, and more particularly to a screen inspection device for inspecting a display state of a liquid crystal panel displaying a dot matrix pattern.

[0002]

2. Description of the Related Art As a conventional screen inspection apparatus of this type, there is a pattern inspection apparatus as disclosed in Japanese Patent Application No. 52346/1991, for example. FIG. 3 is a schematic diagram for explaining an inspection method in a conventional screen inspection device. FIG. 3 (a)
The all-off pattern and all-on pattern shown in (b) are compared, and their difference image is detected. FIG.
As shown in the comparison pattern of (c), the position of the defect n in the all-light-off pattern has a low gray level of the image.
When converted to a value, it is detected as "0".

On the other hand, the reference pattern shown in FIG.
Patterns to be lit are formed in the effective area where the defect inspection is performed. These comparison patterns are compared with the reference pattern, and only effective defects shown in FIG. 3F are detected.

[0004]

In this conventional screen inspection apparatus, since the binarization is performed only once, there are no defective defects,
There is a problem that it is impossible to detect an over-defect defect simultaneously. Note that an over-defect defect is a defect with a low pattern contrast, and an over-density defect is a defect with a high pattern contrast.

[0005]

SUMMARY OF THE INVENTION A pattern inspection apparatus according to the present invention comprises an all-lighting-pattern generating circuit for generating an all-lighting pattern on an object to be inspected, and an all-light-off pattern generating circuit for generating an all-off pattern on the object to be inspected. A reference pattern memory circuit that generates and stores a normal all-lighting display pattern by a drive signal from the all-lighting pattern generation circuit, a photoelectric conversion scanner for imaging a pattern generated on the inspection object, An A / D conversion circuit that inputs a video signal output from a photoelectric conversion scanner and outputs a digital signal, and a digital signal from the A / D conversion circuit when the inspection object is driven by the all-lighting pattern generation circuit. An all-lighting image memory circuit for storing signals, and a digital signal from the A / D conversion circuit when the inspection object is driven by the all-off pattern generation circuit. An all-off image memory circuit that stores a signal, a comparison circuit that compares the contents of the all-on image memory circuit with the contents of the all-off image memory circuit, and a smoothing circuit that smoothes the output of the comparison circuit. Abnormal defect detection 2 for converting a smoothed image output from the smoothing circuit into a binary image at a level for detecting a defective defect, a lighting defect, and a non-light defect.
A binarization circuit for converting the smoothed image into a binary image at a level for detecting an over-density defect; an output of the binarization circuit for over- / under-defect detection; Detection 2
A defect detection / comparison circuit for comparing the output of the digitizing circuit, and an image for comparing the output of the defect detection / comparison circuit with the reference pattern memory circuit, cutting out only the dot display portion, detecting the defect, and outputting the result as an inspection result image A cutout circuit,
The apparatus includes a noise removal circuit that removes noise from the inspection result image and outputs a defect image, and a region extraction circuit that outputs a defect signal of the area and position information of the defect region extracted from the defect image.

[0006]

Next, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram of one embodiment of the present invention. FIG. 2 is a diagram for explaining the operations of the over / under defect detection binarization circuit 10, the over / under defect detection binarization circuit 11, the comparison circuit 12, and the image cutout circuit 13.

The screen inspection apparatus shown in FIG.
All lighting pattern generation circuit 1 for generating a full lighting pattern on the test object, All lighting pattern generation circuit 2 for generating the all lighting pattern on the inspection object 17, and normal full lighting by the drive signal b from the all lighting pattern generation circuit 1. A reference pattern memory circuit 3 for generating and storing a pattern display pattern, a photoelectric conversion scanner 4 for capturing an image of the pattern generated on the inspection object 17, and a video signal d output from the photoelectric conversion scanner 4 are input. A / which outputs a digital signal e
D conversion circuit 5, all-on image memory circuit 6 and all-off image memory circuit 7 for storing this digital signal e
A comparing circuit 8 for comparing the content of the all-lit image memory circuit 6 with the content of the all-lit image memory circuit 7, a smoothing circuit 9 for smoothing a comparison image h output from the comparing circuit 8, and a smoothing circuit 9 is a binarization circuit 10 for converting the smoothed image i, which is the output of No. 9, into two levels of "0" and "1" at the level of the defect detection level, 2
The binarization circuit 11 converts the density into a value. The binarization image j and the output of the binarization circuit 11 are output from the binarization circuit 10. A defect detection / comparison circuit 12 for comparing the over-defect detection binary image k;
Defect detection comparison image l which is the output of the defect detection comparison circuit 12
And an image cutout circuit 13 that cuts out only the dot display portion from the reference pattern c output from the reference pattern memory circuit 3, detects a defect, and outputs it as an inspection result image m.
A noise removal circuit 14 that removes noise from the inspection result image m and outputs a defect image n; a region extraction circuit 15 that extracts a defect region from the defect image n and outputs a defect signal o of area and position information; A determination circuit 16 which receives the signal o and determines whether it is a defect or not based on the area and position.

Next, the operation of this embodiment will be described. By adding the drive signal a from the entire lighting pattern generation circuit 1,
A full lighting pattern is generated on the inspection object 17. A normal full lighting display pattern is generated in the reference pattern memory circuit 3 by the driving signal b from the full lighting pattern generating circuit 1 and stored. The entire lighting pattern generated by the inspection object 17 is imaged by the photoelectric conversion scanner 4 and converted into a video signal d. This video signal d is converted into a digital signal e by the A / D conversion circuit 5.
Convert to The digital signal e is stored in the all-lit image memory circuit 6.

Next, a drive signal a is applied from the all-off pattern generation circuit 2 to generate an all-off pattern on the inspection object. This all-off pattern is imaged by the photoelectric conversion scanner 4 and converted into a video signal d. The video signal d is converted into a digital signal e by the A / D conversion circuit 5. The digital signal e is stored in the all-off memory circuit 7.

Next, in order to combine the defect generated in the all-lighting pattern and the defect generated in the all-light-off pattern into one image, the all-lit image f and the all-light-off output from the all-lit image memory circuit 6 are combined. The comparison circuit 8 creates a comparison image h, which is a difference image of the all-off image g output from the image memory circuit.
In order to remove high-frequency components of the comparison image h by the smoothing circuit 9, local processing is performed on the entire image using a 3 × 3 matrix operator. In order to detect a density defect, the smoothed image i output from the smoothing circuit 9 is binarized using two types of binarization thresholds. A binarization circuit 10 binarizes the smoothed image i and outputs a binarized defect detection image j. The smoothed image i is obtained by the binarization circuit 11
And outputs an over-defect-detected binary image k. Over-density defects can be detected at level 1, and over- and under-light defects and on / off defects can be detected at level 2.

[0011] Again, in order to combine the defect into one image, the defect detection / comparison circuit 12 performs an OR operation and outputs a defect detection / comparison image l. At this time, the defect position is detected as "1".

In order to separate the dot display portion from the other portions, the image cutout circuit 13 compares the reference pattern c output from the reference pattern memory circuit 3 with the defect detection comparison image l. The image cutout circuit 13 detects the logical product of the two images as the inspection result image m. Since the reference pattern c is a pattern in which the display effective area is separated for each dot, the image cutout circuit 13 can perform separation when adjacent dots are connected simultaneously with defect detection. This makes it possible to determine a defect based on an accurate area position in dot units.

In order to remove minute areas and isolated points of the inspection result image m separated by the image cutting circuit 13 for each dot, the inspection result image m is contracted and removed by the noise removing circuit 14 at the same size in the vertical and horizontal directions. The image after the noise removal is the defect image n. A region extraction circuit 15 for extracting a closed region from the defect image n
And outputs a defect signal 0 as area and position information.
Based on the area and position information, it is determined whether there is a defect or not, and the determination circuit 16 determines the quality of the display unit.

FIG. 2 is a diagram for explaining the operation of the binarization circuit 10 for detecting over / under defects, the binarization circuit 11 for over-density defects, the defect detection / comparison circuit 12, and the image cutout circuit 13 shown in FIG. It is.

FIG. 2 (a) shows a fully lit image and FIG.
The comparison with the all unlit image shown in FIG. 2B is performed by the comparison circuit 12, and the comparison image shown in FIG. 2D is detected. The level of each defective dot and normal dot in this comparative image is shown in FIG.
As shown in (i). In other words, the level of the light / dark defect is located between the light-on / light-off defect (the light-off defect or the light-off defect) and the normal dot, and the dark defect has a higher value than the normal dot level. Therefore, FIG.
By preparing level 1 and level 2 as shown in (i), it is possible to detect over- and under-defects. In order to combine the detected defect defect, excessive defect, and lighting / light-off defect in the same image, the defect defect binary image shown in FIG. 2E and the defect defect shown in FIG. The logical sum of the dark defect detection binary image is performed in the defect detection / comparison circuit 12. FIG.
As shown in (g), the density defect, the density defect, and the lighting / light-off defect have high levels and are binarized into “0” and “1”.
1 ".

Next, a logical AND of the defect detection comparison image shown in FIG. 2G and the reference pattern shown in FIG. 2C is performed by the image cutout circuit 13 to perform an inspection as shown in FIG. Obtain the result image. In the reference pattern shown in FIG. 2 (c), the dot display portion is at level "1", and the rest is at level "1".
0 ", and is an image separated for each dot.
Therefore, as shown in FIG. 2H, only the effective defects of the dot display section are detected at the level "1" in dot units.

[0017]

The screen inspection apparatus according to the present invention has an effect that it is also possible to detect a dark / dark defect by adding a binarizing circuit for detecting a dark / dark defect and a dark / dark defect detecting circuit as a binarizing circuit.

[0018]

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a diagram for explaining the operations of a binarization circuit for detecting an excessively defective defect, a binarization circuit for detecting an excessively dense defect 11, a defect detection comparison circuit 12, and an image cutout circuit 13 shown in FIG.

FIG. 3 is a schematic diagram for explaining an inspection method using a conventional screen inspection device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 All lighting pattern generation circuit 2 All lighting pattern generation circuit 3 Reference pattern memory circuit 4 Photoelectric conversion scanner 5 A / D conversion circuit 6 All lighting image memory circuit 7 All lighting image memory circuit 8 Comparison circuit 9 Smoothing circuit 10 Defects Detection binarization circuit 11 Over-defect detection binarization circuit 12 Defect detection comparison circuit 13 Image extraction circuit 14 Noise removal circuit 15 Area extraction circuit 16 Judgment circuit 17 Inspection object a Drive signal b Drive signal c Reference pattern d Video signal e Digital signal f Fully lit image g All unlit image h Comparative image i Smoothed image j Binary image of defective defect detection k Binary image of excessively defective defect l Defect detection comparative image m Inspection result image n Defect image o Defect signal

Claims (1)

(57) [Claims] 1. An all-lighting-pattern generating circuit for generating an all-lighting pattern on an object to be inspected, an all-light-off pattern generating circuit for generating an all-off light pattern on the object to be inspected, and a driving signal from the all-lighting pattern generating circuit A reference pattern memory circuit for generating and storing a normal full lighting display pattern, a photoelectric conversion scanner for capturing an image of the pattern generated on the inspection object, and a video signal output from the photoelectric conversion scanner. A / output to digital signal
A D conversion circuit, an all-on image memory circuit for storing a digital signal from the A / D conversion circuit when the inspection object is driven by the all-on pattern generation circuit, and the all-off pattern generation circuit. A /
And all off the image memory for storing the digital signal from the D conversion circuit, wherein the contents of the full lighting the image memory all
A comparison circuit for comparing the contents of the turned-off image memory circuit , a smoothing circuit for smoothing the output of the comparison circuit,
An over / under defect detection binarization circuit for converting a dark image into a binary image at a level for detecting an unlit defect, and an over-density defect detection binarization circuit for converting the smoothed image into a binary image at a level for detecting an over-density defect A defect detection / comparison circuit for comparing the output of the over / under defect detection binarization circuit with the output of the overdensity defect detection / binarization circuit; and comparing the output of the defect detection / comparison circuit with the reference pattern memory circuit. An image cutout circuit that cuts out only the dot display section to detect a defect and outputs it as an inspection result image, a noise removal circuit that removes noise from the inspection result image and outputs a defect image, and a defect extracted from this defect image A screen inspection apparatus comprising: an area extraction circuit that outputs a defect signal of area information and position information of an area.