JP2665054B2 - Semiconductor integrated circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit,
In particular, the present invention relates to a semiconductor integrated circuit having a characteristic check monitor transistor capable of measuring the characteristic from an external terminal.

[0002]

2. Description of the Related Art Conventionally, a monitor transistor for characteristic check built in a semiconductor integrated circuit (IC) chip is an IC transistor.
It is provided separately from the internal circuit inside the chip and is connected to a measurement pad. To measure the characteristics, a probe of an IC tester is applied to the measurement pad.

[0003]

With the conventional monitor transistor for checking IC characteristics, it is possible to measure a single semiconductor as a wafer or a chip. There is a problem that measurement is impossible unless a check terminal dedicated to the check transistor is prepared.

An object of the present invention is to provide a semiconductor integrated circuit capable of measuring a monitor transistor from an external terminal without a dedicated check terminal.

[0005]

A semiconductor integrated circuit according to the present invention has a plurality of pads for power supply and external terminals, a monitor transistor for checking characteristics, and an internal circuit connected to the plurality of pads. In the semiconductor integrated circuit, a switch transistor having a drain and a source inserted between the power supply and external terminal pads and the internal circuit is provided, and a gate of the monitor transistor is connected to the power supply pad. A source and a drain are inserted between the pads for the external terminal, and a control signal is input from the power supply pad to the gate of the front switching transistor to separate the monitor transistor from the internal circuit.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram of one embodiment of the present invention. In the IC, the drains and sources of P-channel transistors 6a to 6c for switching are connected between the power supply pad 1 and the external terminal pads 3a to 3b and the internal circuit, respectively, and between the GND supply terminal pad 2 and the internal circuit. N for switch
The drains and sources of the channel transistors 7a to 7c are connected, and the monitor transistor 5 for checking the P-channel characteristic and the pads 3c and 3c are connected between the external pads 3a and 3b.
The drain and source of the n-channel characteristic check monitor transistor 4 are connected between 3d.

During normal internal circuit operation, a power supply voltage is supplied from the _VDD supply terminal pad 1 and the GND supply terminal pad 2 to the internal circuit. At this time, the monitor transistors 6a to 6c and the monitor transistors 7a to 7c are turned on, the transistors 5 and 4 are turned off, and the external end pads 3a and 3b and 3c and 3d
Is independent of the internal circuit and normal internal circuit operation is performed.

When the characteristic check monitor transistor 4 or 5 is measured, the GND level is applied to the V _DD supply terminal pad 1,
By supplying the V _DD level to the GND supply terminal pad 2, the P-channel transistors 6a to 6c and the n-channel transistors 7a to 7c are turned off, the internal wirings 8a to 8f are cut off, and the V _DD supply terminal pad 1 is cut off. And GND supply end pad 2 and external end pads 3a-3
d is made independent of the internal circuit.

For example, the measurement of the monitor transistor 5 for checking the P-channel characteristic is carried out in the above-described state with the external terminals 3a and 3
b, and the measurement of the n-channel characteristic check monitor transistor 4 is performed independently of the internal circuit using the external terminals 3c and 3d.

[0010]

As described above, the present invention relates to a semiconductor IC.
Since the characteristics of the characteristic check transistor can be measured using the normal power supply terminal, the GND terminal, and the external terminal, even after the semiconductor device is completed, the characteristic check monitor transistor can be externally measured using the normal terminal. It has the effect of being able to do it. Further, since the external terminals of the internal circuit are used for the measurement, there is an effect that the characteristic measurement of the characteristic check monitor transistor can be easily and automatically measured when the internal circuit is tested.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of one embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 _VDD supply end pad 2 GND supply end pad 3a-3d External end pad 4 Monitor transistor for n-channel characteristic check 5 Monitor transistor for P-channel characteristic check 6a-6c P-channel transistor 7a-7c n-channel transistor 8a-8f Internal wiring

Claims (1)

(57) [Claims] 1. A semiconductor integrated circuit having a plurality of power supply and external end pads, a characteristic check monitor transistor, and an internal circuit connected to the plurality of pads, wherein the power supply and the external end are provided. A switch transistor having a drain and a source inserted between the pad and the internal circuit, wherein the gate of the monitor transistor is connected to the power supply pad and the source and drain are between the pads for the external end; Wherein a control signal is input from the power supply pad to the gate of the front switch transistor to disconnect the monitor transistor from the internal circuit.