JP2662738B2 - Semiconductor device with ceramic fins - Google Patents

Semiconductor device with ceramic fins

Info

Publication number
JP2662738B2
JP2662738B2 JP28632388A JP28632388A JP2662738B2 JP 2662738 B2 JP2662738 B2 JP 2662738B2 JP 28632388 A JP28632388 A JP 28632388A JP 28632388 A JP28632388 A JP 28632388A JP 2662738 B2 JP2662738 B2 JP 2662738B2
Authority
JP
Japan
Prior art keywords
semiconductor device
ceramic
thermal conductivity
semiconductor
aluminum nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP28632388A
Other languages
Japanese (ja)
Other versions
JPH02132847A (en
Inventor
伸一 岩田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TOOKIN KK
Original Assignee
TOOKIN KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TOOKIN KK filed Critical TOOKIN KK
Priority to JP28632388A priority Critical patent/JP2662738B2/en
Publication of JPH02132847A publication Critical patent/JPH02132847A/en
Application granted granted Critical
Publication of JP2662738B2 publication Critical patent/JP2662738B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【発明の詳細な説明】 イ.発明の目的 〔産業上の利用分野〕 本発明は電子装置、特に電力増幅を目的に使用する電
力増幅回路を構成する半導体装置において、放熱特性に
優れたセラミックを用い、セラミックス放熱フィンを形
成したセラミックス基板と半導体装置とを一体に構成し
たセラミックス放熱フィン付半導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION Object of the Invention [Industrial Application Field] The present invention relates to an electronic device, in particular, a semiconductor device constituting a power amplification circuit used for the purpose of power amplification. The present invention relates to a semiconductor device with ceramic radiating fins in which a substrate and a semiconductor device are integrally formed.

〔従来の技術〕[Conventional technology]

従来、発熱を伴うパワートランジスタ、MOSIC等の実
装においては、半導体装置を金属ケースに実装し、電気
絶縁材を介してアルミニウム等の放熱フィンを、コレク
タ、又はドレン側ケースに取り付けて半導体の放熱対策
が行われている。
Conventionally, when mounting power transistors, MOSICs, etc. that generate heat, the semiconductor device is mounted on a metal case, and heat dissipation fins made of aluminum or the like are attached to the collector or drain side case via an electrical insulating material to prevent heat dissipation from the semiconductor. Has been done.

従って部品点数の増大、設置面積の増大をまねく等の
問題点があり、基板の高密度実装化の妨げとなってい
た。
Therefore, there are problems such as an increase in the number of components and an increase in the installation area, which hinders high-density mounting of the substrate.

〔発明が解決しようとする課題〕 本発明は、熱伝導性が良く、且つ電気絶縁性をもつ窒
化アルミニウム、炭化珪素、酸化ベリリウムで代表され
る高熱伝導性セラミックにより放熱フィンを形成し、セ
ラミックス上に半導体装置を直接実装する構造として、
半導体装置より発生する熱を直接セラミックを介して放
熱させるよう構成したセラミックス放熱フィン付半導体
装置を提供することを目的とする。
[Problems to be Solved by the Invention] The present invention provides a heat radiation fin made of a high heat conductive ceramic represented by aluminum nitride, silicon carbide, and beryllium oxide, which has good thermal conductivity and electrical insulation. As a structure for mounting semiconductor devices directly on
It is an object of the present invention to provide a semiconductor device with ceramic radiating fins configured to radiate heat generated from the semiconductor device directly through ceramic.

ロ.発明の構成 〔課題を解決するための手段〕 上記目的を達成するために、発熱を伴う半導体素子を
実装するための配線基板として窒化アルミニウム、炭化
ケイ素、酸化バリリウムの高熱伝導性セラミックスを用
いる。
B. Configuration of the Invention [Means for Solving the Problems] In order to achieve the above object, a high thermal conductive ceramic such as aluminum nitride, silicon carbide, and barium oxide is used as a wiring board for mounting a semiconductor element that generates heat.

これらのセラミックスは熱伝導特性が200w/mK〜270w/
mK前後と熱伝導率が240w/mKの金属アルミニウムとほぼ
同等の熱の伝わり易さを示し、しかも電気絶縁体である
ことから、基板表面にそれぞれのセラミックスに適する
メタライズ手法により配線パターンを設けて半導体装置
の実装基板とし、半導体装置と外部回路へ接続するため
の接続端子を取り付け、半導体装置を樹脂により覆い保
護し、一方半導体装置を実装した基板面の反対面には多
数の放熱フィンを取り付けて直接セラミックス基板より
熱を放散するものである。
These ceramics have thermal conductivity of 200 w / mK to 270 w /
It shows almost the same ease of heat conduction as metallic aluminum with a thermal conductivity of around 240k / mK, and it is an electrical insulator.Therefore, a wiring pattern is provided on the substrate surface by a metallization method suitable for each ceramic. As a mounting board for semiconductor devices, attach connection terminals for connecting the semiconductor device and external circuits, cover and protect the semiconductor device with resin, and attach a number of radiating fins on the opposite side of the board surface on which the semiconductor device is mounted And dissipates heat directly from the ceramic substrate.

従って半導体装置と放熱フィンが一体構造となり部品
点数の削減と、基板組立て工数の簡略化と、半導体装置
全体の小型化を計ることができる。
Therefore, the semiconductor device and the radiating fins have an integrated structure, so that the number of parts can be reduced, the number of steps for assembling the substrate can be simplified, and the size of the entire semiconductor device can be reduced.

即ち本発明は 1.熱伝導性の良いセラミックスを用い放熱フィンを設け
たセラミックス基板を形成し、フィンの反対面のセラミ
ックス基板面に薄い金属層を形成し、その上に金属接合
層を介し半導体チップを密着し、ドレーン、ソース、ゲ
ート端子はセラミックス基板の4隅に設けた金属製のピ
ン端子により外部回路と接続するよう構成したことを特
徴とするセラミックス放熱フィン付半導体装置。
That is, the present invention provides: 1. A ceramic substrate provided with a radiation fin using ceramics having good thermal conductivity, a thin metal layer is formed on the ceramic substrate surface opposite to the fin, and a semiconductor layer is formed thereon via a metal bonding layer. A semiconductor device with ceramic radiating fins, wherein a chip is closely attached and drain, source, and gate terminals are connected to an external circuit by metal pin terminals provided at four corners of a ceramic substrate.

2.熱伝導性の良いセラミックスは窒化アルミニウムであ
る請求項1記載のセラミックス放熱フィン付半導体装置
である。
2. The semiconductor device according to claim 1, wherein the ceramic having good thermal conductivity is aluminum nitride.

〔作用〕[Action]

放熱フィンを持つ高熱伝導特性を持つセラミックス面
に金属層を形成し、直接金属層にシリコンの半導体を搭
載し、電極に形成後、表面は樹脂によりポッティングし
た構造とする。
A metal layer is formed on a ceramic surface having heat dissipation fins with high thermal conductivity, a silicon semiconductor is directly mounted on the metal layer, and after forming on the electrode, the surface is potted with resin.

従って半導体チップから発生する熱は金属アルミニウ
ムとほぼ同等の熱伝導性を持つセラミックスに、ほぼ10
0μ程の銅層を介し直接伝導放散するため、熱放散効果
は非常に大きなものとなり、半導体装置はより高出力の
特性が得られる。
Therefore, the heat generated from the semiconductor chip is transferred to ceramics with almost the same thermal conductivity as metallic aluminum,
Since the heat is directly dissipated and diffused through the copper layer of about 0 μm, the heat dissipating effect is extremely large, and the semiconductor device can obtain higher output characteristics.

又半導体チップマウント用金属、半導体チップを収納
する金属ケースも必要とせず半導体装置全体として安価
となる。
In addition, there is no need for a metal for mounting the semiconductor chip and a metal case for housing the semiconductor chip, and the entire semiconductor device is inexpensive.

〔実施例〕〔Example〕

実施例について図面を参照し詳細に説明する。 Embodiments will be described in detail with reference to the drawings.

第1図は本発明によるセラミックス放熱フィン付半導
体装置の正面図、第2図は本発明によるセラミックス放
熱フィン付半導体装置の半導体装置を実装した面(樹脂
を被覆せず)の平面図を示す。は高い熱伝導特性を有
するセラミックスで作られた半導体装置を実装する放熱
フィン付セラミックス基板で、本発明の実施例では径が
1μ以下の窒化アルミニウム原料粉に酸化イットリウム
3wt%を添加して混合を行い、得られた混合粉末に、通
常用いられるステアリン酸をバインダーとして添加し乾
式プレス法にて1ton/cm2の圧力で成型体を作る。成型体
を500℃で徐々に脱バインダーを行った後、非酸化性雰
囲気中で1850℃で5時間の焼成を行い放熱フィン付基板
の焼結体ブロックを得る。放熱フィンは、焼結上りで厚
さ2mm、又溝深さは20mm程迄可能であるが、溝深さは焼
結後適宜研削により深い溝を形成出来る。ついで放熱フ
ィン付半導体装置を支持し、半導体装置のピン端子6を
形成するモリブデン−マンガン系高融点メタライズ法に
よるモルブデン−マンガン金属層3aを研磨面の4隅に形
成する。モリブデン−マンガン金属層はモリブデンとマ
ンガン微粉末のペーストを窒化アルミニウム研磨面上に
印刷し、1400℃前後の温度で水素ガス中で窒化アルミニ
ウム面にモリブデン−マンガン金属層を形成する。
FIG. 1 is a front view of a semiconductor device with ceramic radiating fins according to the present invention, and FIG. 2 is a plan view of a surface of the semiconductor device with ceramic radiating fins according to the present invention on which the semiconductor device is mounted (not covered with resin). 1 is a heat dissipating ceramic substrate finned for mounting a semiconductor device made of ceramics having a high thermal conductivity, yttrium oxide to an aluminum nitride raw material powder size less 1μ in the example of the present invention
3 wt% is added and mixing is carried out, and stearic acid, which is generally used, is added as a binder to the obtained mixed powder, and a molded body is produced by a dry press method at a pressure of 1 ton / cm 2 . After the binder is gradually removed from the molded body at 500 ° C., it is baked at 1850 ° C. for 5 hours in a non-oxidizing atmosphere to obtain a sintered body block of a substrate with heat radiation fins. The radiating fin can have a thickness of 2 mm after sintering and a groove depth of up to about 20 mm, but a deep groove can be formed by grinding appropriately after sintering. Next, a molybdenum-manganese metal layer 3a formed by a molybdenum-manganese-based high-melting metallization method for supporting the semiconductor device with the radiation fin and forming the pin terminal 6 of the semiconductor device is formed at four corners of the polished surface. The molybdenum-manganese metal layer is formed by printing a paste of molybdenum and manganese fine powder on an aluminum nitride polished surface, and forming a molybdenum-manganese metal layer on the aluminum nitride surface in a hydrogen gas at a temperature of about 1400 ° C.

ついでモリブデン−マンガン金属層に電極のピン端子
6を形成する。電極のピン端子はコバール等低熱膨張金
属材料表面に金メッキを施したもので銀ろうをモリブデ
ン−マンガン金属層と電極との間にはさみ、800℃の水
素ガス中で溶接する。
Next, the pin terminals 6 of the electrodes are formed on the molybdenum-manganese metal layer. The pin terminals of the electrodes are obtained by plating the surface of a low thermal expansion metal material such as Kovar with gold. A silver solder is sandwiched between the molybdenum-manganese metal layer and the electrodes, and welded in hydrogen gas at 800 ° C.

ついで研磨した窒化アルミニウムによるフィン付基板
の面に、半導体装置の電極を形成するための導体パタ
ーン4を形成する。窒化アルミニウム基板に銅層を主層
とする導体パターン4を形成する手段は、発明者等によ
りすでに出願されている昭和63年特許願第21025号の手
法による。
Finned substrate made of polished aluminum nitride
On one surface, a conductor pattern 4 for forming an electrode of a semiconductor device is formed. Means for forming a conductor pattern 4 having a copper layer as a main layer on an aluminum nitride substrate is based on the method of Japanese Patent Application No. 21025, filed by the present inventors in 1988.

導体パターンの構成はその概要を述べると、Ni無電解
メッキ層を5μm窒化アルミニウム面に形成後、電気メ
ッキにより銅層の厚さを30μmないし200μm、本実施
例ではほぼ100μmの厚さに形成し、銅メッキ層の上に
ニッケルとボロンの合金層を数μの厚さに形成する。
The outline of the configuration of the conductor pattern is as follows. After forming a Ni electroless plating layer on a 5 μm aluminum nitride surface, a copper layer is formed by electroplating to a thickness of 30 μm to 200 μm, and in this embodiment, a thickness of approximately 100 μm. Then, an alloy layer of nickel and boron is formed on the copper plating layer to a thickness of several μm.

導体パターンは第2図に示す形状にドレン電極4a、ゲ
ート電極4b、ソース電極4cを設け、ドレイン電極4a上に
本実施例では静電誘導トランジスタの半導体チップ
接続した。
In the conductor pattern, a drain electrode 4a, a gate electrode 4b, and a source electrode 4c were provided in the shape shown in FIG. 2, and the semiconductor chip 2 of the electrostatic induction transistor in this embodiment was connected to the drain electrode 4a.

通常パワー用の半導体チップはドレン側にメタライズ
層を形成した半導体チップをモリブデン板等にろう付け
し形成されるが、本発明では導体パターン4aの上に厚さ
50μmの半田シートを半導体チップ底面と同じ大きさに
切断し、半導体チップ上から荷重を加えながら水素ガス
中で350℃でリフロー溶接を行なった。
Normally, a power semiconductor chip is formed by brazing a semiconductor chip having a metallized layer on the drain side to a molybdenum plate or the like.
A 50 μm solder sheet was cut to the same size as the bottom surface of the semiconductor chip, and reflow welding was performed at 350 ° C. in hydrogen gas while applying a load from above the semiconductor chip.

半導体チップのソース部2cからソース電極4cへリード
板7を接続する、リード板7は約1mm厚さの銅板にニッ
ケルメッキを施してあり、半導体チップ上のソース側表
面のシリコンとアルミニウムとのアルミニウム合金層に
2〜3μmのニッケルをメッキした表面と、ソース電極
4c面それぞれに半田接続する。半導体装置のゲート部2b
とゲート電極4bは径が250μmのアルミナ線を超音波ボ
ンディングにより接続する。最後に半導体チップ及びリ
ード板7、アルミニウムのボンディング線8を含み被覆
樹脂5により完全に覆い完成する。樹脂としては日本チ
バガイギー株式会社製半導体チップのコーティング樹脂
XNR5100、XNH5100等がある。
A lead plate 7 is connected from the source portion 2c of the semiconductor chip to the source electrode 4c. The lead plate 7 is formed by plating a nickel plate on a copper plate having a thickness of about 1 mm. The surface of the alloy layer plated with nickel of 2-3 μm and the source electrode
4c Solder to each side. Gate part 2b of semiconductor device
The gate electrode 4b is connected to an alumina wire having a diameter of 250 μm by ultrasonic bonding. Finally, the semiconductor chip and the lead plate 7 and the aluminum bonding wire 8 are completely covered with the covering resin 5 to complete the semiconductor chip. Coating resin for semiconductor chips manufactured by Ciba-Geigy Japan
XNR5100, XNH5100 and the like.

尚、本発明の実施例は窒化アルミニウムの例により説
明したが、熱伝導特性に優れたセラミックスである窒化
アルミニウム以外の炭化珪素、酸化ベリリウムを用い本
発明と同様なセラミックス放熱フィン付半導体装置を形
成し得ることは当然である。
Although the embodiment of the present invention has been described with reference to the example of aluminum nitride, a semiconductor device with a ceramic radiating fin similar to the present invention is formed by using silicon carbide other than aluminum nitride, which is a ceramic having excellent thermal conductivity, and beryllium oxide. Of course you can.

又、窒化アルミニウム表面に形成する金属層は薄い銅
層を例に説明したが、ニッケルメッキ、又は金属アルミ
ニウム、又は他の金属層を形成しドレーン、電極ソー
ス、ゲート電極の導体パターンを形成してもよい。
Also, the metal layer formed on the aluminum nitride surface has been described as an example of a thin copper layer, but nickel plating, metal aluminum, or another metal layer is formed, and a drain, an electrode source, and a conductor pattern of a gate electrode are formed. Is also good.

ハ.発明の効果 〔発明の効果〕 本発明は、以上に説明した様に構成されているので、
以下に記載されるような効果を奉する。
C. Effects of the Invention [Effects of the Invention] Since the present invention is configured as described above,
Serves the effects described below.

半導体チップが金属アルミニウムと同じ熱伝導特性を
セラミックスの放熱フィンと半導体チップマウント金属
ケースを介さずに一体化した構造としているため放熱効
果が大きく、同一出力の時は形状は小型となり、一方同
一寸法の時は大きな出力が得られる半導体装置とするこ
とが出来、又部品点数の大幅削減と組立て工数の簡略化
が計れる。
Since the semiconductor chip has the same thermal conductivity as metal aluminum and a structure in which the heat dissipation fins of ceramics and the semiconductor chip mount metal case are integrated without intervening, the heat dissipation effect is large, and when the output is the same, the shape is small, while the size is the same In this case, a large output can be obtained, and the number of parts can be greatly reduced and the number of assembling steps can be simplified.

【図面の簡単な説明】[Brief description of the drawings]

第1図は、本発明によるセラミックス放熱フィン付半導
体装置を示す正面図。 第2図は、第1図に於ける半導体チップ搭載面の平面
図。 ……(窒化アルミニウム)フィン付基板、……半導
体チップ、2a……ドレイン部、2b……ゲート部、2c……
ソース部、3a……モリブデン−マンガン金属層、3b……
シリコン接合ハンダ層、3c……ジャンパー線接合ハンダ
部、4……導体パターン、4a……ドレイン電極、4b……
ゲート電極、4c……ソース電極、5……被覆樹脂、6…
…ピン端子、7……リード板、8……ボンディング線。
FIG. 1 is a front view showing a semiconductor device with a ceramic heat radiation fin according to the present invention. FIG. 2 is a plan view of the semiconductor chip mounting surface in FIG. 1 ...... (aluminum nitride) finned substrate, 2 ...... Semiconductor chip, 2a ...... Drain part, 2b ...... Gate part, 2c ......
Source part, 3a ... Molybdenum-manganese metal layer, 3b ...
Silicon bonding solder layer, 3c: solder part of jumper wire connection, 4: conductor pattern, 4a: drain electrode, 4b ...
Gate electrode, 4c ... source electrode, 5 ... coating resin, 6 ...
... Pin terminal, 7 ... Lead plate, 8 ... Bonding wire.

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】熱伝導性の良いセラミックスを用い放熱フ
ィンを設けたセラミックス基板を形成し、フィンの反対
面のセラミックス基板面に薄い金属層を形成し、その上
に金属接合層を介し半導体チップを密着し、ドレーン、
ソース、ゲート端子はセラミックス基板の4隅に設けた
金属製のピン端子により外部回路とを接続するよう構成
したことを特徴とするセラミックス放熱フィン付半導体
装置。
1. A ceramic substrate provided with radiating fins made of ceramics having good thermal conductivity, a thin metal layer formed on the ceramic substrate surface opposite to the fins, and a semiconductor chip provided thereon via a metal bonding layer. The drain,
A semiconductor device having ceramic radiating fins, wherein a source and a gate terminal are configured to be connected to an external circuit by metal pin terminals provided at four corners of a ceramic substrate.
【請求項2】熱伝導性の良いセラミックスは窒化アルミ
ニウムである請求項1記載のセラミックス放熱フィン付
半導体装置。
2. The semiconductor device with ceramic radiating fins according to claim 1, wherein the ceramic having good thermal conductivity is aluminum nitride.
JP28632388A 1988-11-11 1988-11-11 Semiconductor device with ceramic fins Expired - Fee Related JP2662738B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28632388A JP2662738B2 (en) 1988-11-11 1988-11-11 Semiconductor device with ceramic fins

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28632388A JP2662738B2 (en) 1988-11-11 1988-11-11 Semiconductor device with ceramic fins

Publications (2)

Publication Number Publication Date
JPH02132847A JPH02132847A (en) 1990-05-22
JP2662738B2 true JP2662738B2 (en) 1997-10-15

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JP28632388A Expired - Fee Related JP2662738B2 (en) 1988-11-11 1988-11-11 Semiconductor device with ceramic fins

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JP (1) JP2662738B2 (en)

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US9181944B2 (en) * 2011-03-31 2015-11-10 Denso Corporation High pressure pump having unitary discharge and relief valve
JP6586931B2 (en) 2016-08-26 2019-10-09 株式会社デンソー Relief valve device and high-pressure pump using the same
JP6747482B2 (en) 2017-09-29 2020-08-26 株式会社デンソー High pressure pump
JP7148276B2 (en) * 2018-05-30 2022-10-05 京セラ株式会社 Light-emitting element mounting package and light-emitting device

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