JPH10223809A - Power module - Google Patents

Power module

Info

Publication number
JPH10223809A
JPH10223809A JP2512297A JP2512297A JPH10223809A JP H10223809 A JPH10223809 A JP H10223809A JP 2512297 A JP2512297 A JP 2512297A JP 2512297 A JP2512297 A JP 2512297A JP H10223809 A JPH10223809 A JP H10223809A
Authority
JP
Japan
Prior art keywords
power module
semiconductor chip
chip
heat
gravity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2512297A
Other languages
Japanese (ja)
Other versions
JP3419642B2 (en
Inventor
Kenji Kadota
健次 門田
Toichi Takagi
東一 高城
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denka Co Ltd
Original Assignee
Denki Kagaku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denki Kagaku Kogyo KK filed Critical Denki Kagaku Kogyo KK
Priority to JP2512297A priority Critical patent/JP3419642B2/en
Publication of JPH10223809A publication Critical patent/JPH10223809A/en
Application granted granted Critical
Publication of JP3419642B2 publication Critical patent/JP3419642B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0271Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components

Abstract

PROBLEM TO BE SOLVED: To provide a high-reliability power module, which has a full durability to damage, which is generated by a thermal shock, such as a heat shock and a heat cycle, and a thermal hysteresis, and moreover, is superior in heat dissipation property and hardly generates an insulation failure. SOLUTION: This power module is one constituted into a structure, wherein a metallic circuit is provided on at least one major surface of a ceramic board 4 and a semiconductor chip 1 is disposed on said metallic circuit. The power module is seen from the direction vertical to the board 4, a half straight line L is drawn from the center of gravity of the chip 1 to an arbitrary direction and when the distance between the end part of the chip 7 and the end part of the metallic circuit is assumed D on the half straight line L and the distance between the center of gravity of the chip and the end part of the chip is assumed W, the above chip 1 is disposed in such a way that the half straight line, which is formed on the condition of D>=W exists at least one or more. Preferably, the board 4 is formed using a sintered body of an aluminium nitride film or a silicon nitride film.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、高発熱性の半導体
チップ等の電子部品を搭載するに際し、高い信頼性、放
熱性を要するパワーモジュールに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power module which requires high reliability and heat dissipation when mounting electronic components such as semiconductor chips having high heat generation.

【0002】[0002]

【従来の技術】従来からパワーモジュールの構成部品と
して、アルミナ(Al23)、窒化アルミニウム(Al
N)、酸化ベリリウム(BeO)などのセラミックス焼
結体を基板とし、その表面に導電層として銅(Cu)等
の回路板を一体に接合した回路基板が広く使用されてい
る。
2. Description of the Related Art Conventionally, alumina (Al 2 O 3 ), aluminum nitride (Al
A circuit board is widely used in which a ceramic sintered body such as N) or beryllium oxide (BeO) is used as a substrate, and a circuit board made of copper (Cu) or the like is integrally joined as a conductive layer on the surface thereof.

【0003】アルミナ焼結体を用いた回路基板は、熱伝
導性および電気伝導性に優れたCu等の金属により回路
板を形成しているため、回路動作の遅延が少ないととも
に回路配線の寿命も永く、半田等の接合材料に対する濡
れ性が良く、セラミックス焼結体表面に半導体チップ
(IC素子)や電極板を高い接合強さで接合することが
でき、その結果、半導体チップから発生する熱の放散性
や半導体チップの動作信頼性を良好に保つことができ、
更にセラミックス基板の裏面にもCu等の金属板を接合
することにより、セラミックス基板の応力緩和および熱
変形防止の目的をも達成できるという利点を有してい
る。
In a circuit board using an alumina sintered body, a circuit board is formed of a metal such as Cu having excellent heat conductivity and electric conductivity, so that circuit operation delay is small and circuit wiring life is long. For a long time, it has good wettability to bonding materials such as solder and can bond a semiconductor chip (IC element) or an electrode plate to the surface of the ceramic sintered body with high bonding strength. As a result, heat generated from the semiconductor chip can be reduced. It is possible to maintain good radiation performance and semiconductor chip operation reliability.
Further, by joining a metal plate such as Cu to the back surface of the ceramic substrate, there is an advantage that the objects of stress relaxation and thermal deformation prevention of the ceramic substrate can also be achieved.

【0004】しかしながら、半導体チップ端部と金属回
路端部との距離は、1〜2mmと小さい場合が多く、セ
ラミックス基板の熱伝導率が小さいと熱放散性が不十分
となり、その結果熱抵抗が大きくなるために、半導体チ
ップの高出力化に対応できない問題があった。
However, the distance between the end of the semiconductor chip and the end of the metal circuit is often as small as 1 to 2 mm. If the thermal conductivity of the ceramic substrate is small, the heat dissipation becomes insufficient, resulting in a low thermal resistance. As a result, there is a problem that the semiconductor chip cannot cope with high output of the semiconductor chip.

【0005】上記理由から、熱伝導率の高いセラミック
焼結体を基板に用いることが注目を惹き、窒化アルミニ
ウム焼結体を用いたり、従来のアルミナ等のセラミック
焼結体の熱伝導率向上が図られたりしている。窒化アル
ミニウム等のセラミックス基板では、高い放熱性を得る
ために熱伝導率を大きくしようとすると、セラミックス
基板の不純物を低減させると共に、結晶粒界を少なく
し、結晶粒子の大きさを大きくする必要があるが、結晶
粒界を少なくして結晶粒子を大きくすると、セラミック
ス基板の強さが低下する問題がある。
For the above reasons, the use of a ceramic sintered body having a high thermal conductivity for the substrate has attracted attention, and the use of an aluminum nitride sintered body and the improvement of the thermal conductivity of a conventional ceramic sintered body such as alumina have been increasing. It is being planned. In the case of ceramic substrates such as aluminum nitride, in order to increase the thermal conductivity in order to obtain high heat dissipation, it is necessary to reduce impurities in the ceramic substrate, reduce crystal grain boundaries, and increase the size of crystal grains. However, when the crystal grain boundaries are reduced and the crystal grains are enlarged, there is a problem that the strength of the ceramic substrate is reduced.

【0006】特に、セラミックス基板に窒化アルミニウ
ムを用いた窒化アルミニウム回路基板においては、ヒー
トショックやヒートサイクルなどの熱衝撃や熱履歴によ
って生じる損傷に対して十分な耐久性をもたせるため、
Cu回路と窒化アルミニウム基板との間に介在させる接
合層の厚みを例えば20μm以上に厚くする例が報告さ
れている(特開平6−196828号公報参照)。しか
しながら、接合層の厚みを厚くすると後工程での不要な
ろう材の除去が困難となること、熱抵抗が大きくなるな
どの問題がある。
In particular, an aluminum nitride circuit board using aluminum nitride as a ceramic substrate has sufficient durability against damage caused by heat shock and heat history such as heat shock and heat cycle.
There has been reported an example in which the thickness of a bonding layer interposed between a Cu circuit and an aluminum nitride substrate is increased to, for example, 20 μm or more (see JP-A-6-196828). However, when the thickness of the bonding layer is increased, there are problems that it becomes difficult to remove unnecessary brazing material in a subsequent process and that thermal resistance increases.

【0007】[0007]

【発明が解決しようとする課題】本発明は、上記の状況
に鑑みてなされたものである。本発明者らは、上記課題
を解決するべくいろいろ検討し、パワーモジュール上の
半導体チップと金属回路とを特定な配置関係にするとき
に、熱伝導率や機械的強さのさほど大きくないセラミッ
クス基板を用いても、ヒートショックやヒートサイクル
などの熱衝撃や熱履歴によって生じる損傷に対して十分
な耐久性を有し、熱伝導率の大きいセラミックス基板を
用いた場合と同様の熱抵抗を持ち熱放散性に優れるパワ
ーモジュールが得られるという知見を得て、本発明に至
ったものである。
SUMMARY OF THE INVENTION The present invention has been made in view of the above situation. The present inventors have studied variously in order to solve the above-mentioned problems, and when a semiconductor chip and a metal circuit on a power module are arranged in a specific arrangement relationship, a ceramic substrate having not so large thermal conductivity and mechanical strength. Has sufficient durability against damage caused by thermal shock and thermal history such as heat shock and heat cycle, and has the same thermal resistance as a ceramic substrate with high thermal conductivity. The present invention has been made based on the finding that a power module having excellent radiation performance can be obtained.

【0008】即ち、本発明の目的は、ヒートショックや
ヒートサイクルなどの熱衝撃や熱履歴によって生じる損
傷に対して十分な耐久性を有し、しかも熱放散性に優
れ、セラミックス基板の破損等に原因する絶縁破壊等の
絶縁不良などが発生しがたい高信頼性のパワーモジュー
ルを提供することにある。
That is, an object of the present invention is to have sufficient durability against damage caused by heat shock or heat history such as heat shock or heat cycle, and excellent heat dissipating property, and to prevent breakage of a ceramic substrate. An object of the present invention is to provide a highly reliable power module in which insulation failure such as insulation breakdown is unlikely to occur.

【0009】[0009]

【課題を解決するための手段】本発明は、セラミックス
基板の少なくとも一主面上に金属回路を設け、該金属回
路上に半導体チップが配置されてなるパワーモジュール
であって、該パワーモジュールを基板に対して垂直の方
向より眺め、前記半導体チップの重心から任意の方向に
半直線Lを引き、該半直線L上で半導体チップの端部と
金属回路端部との距離をD、半導体チップの重心から端
部までの距離をWとするとき、D≧Wである半直線が少
なくとも1本以上存在するように前記半導体チップを配
置していることを特徴とするパワーモジュールである。
SUMMARY OF THE INVENTION The present invention is a power module having a metal circuit provided on at least one main surface of a ceramic substrate, and a semiconductor chip disposed on the metal circuit. When viewed from a direction perpendicular to the semiconductor chip, a half line L is drawn in an arbitrary direction from the center of gravity of the semiconductor chip, the distance between the end of the semiconductor chip and the end of the metal circuit on the half line L is D, A power module characterized in that the semiconductor chips are arranged so that at least one half line satisfying D ≧ W exists when a distance from the center of gravity to the end is W.

【0010】また、好ましくは、D≧Wである半直線が
2本以上存在するように前記半導体チップを配置してな
ることを特徴とするパワーモジュールであり、更に好ま
しくは、全ての方向でD≧Wである半直線が存在するよ
うに前記半導体チップを配置してなることを特徴とする
パワーモジュールである。
[0010] Preferably, the power supply module is characterized in that the semiconductor chips are arranged so that two or more half-lines satisfying D ≧ W are present. A power module, wherein the semiconductor chips are arranged so that a half line satisfying ≧ W exists.

【0011】更に、本発明は、セラミックス基板が窒化
アルミニウム焼結体又は窒化珪素焼結体からなることを
特徴とするパワーモジュールである。
Further, the present invention is a power module, wherein the ceramic substrate is made of an aluminum nitride sintered body or a silicon nitride sintered body.

【0012】[0012]

【発明の実施の形態】以下、本発明について図をもって
詳しく説明する。図1は、本発明のパワーモジュールの
一例を示す図で、(a)は平面図、(b)は(a)中の
点線A−A’部分での断面図である。本発明において、
半導体チップの重心Gから任意の方向に引いた半直線L
上で半導体チップの端部と金属回路端部との距離をD、
半導体チップの重心Gから該半導体の端部までの距離を
Wとするときに、D≧Wである半直線が少なくとも1本
以上存在するように半導体チップを金属回路上に配置す
ることが重要であり、本発明者らの検討によれば、前記
条件を満たすときにのみ本発明の目的を達成するパワー
モジュールを得ることができる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings. 1A and 1B are diagrams showing an example of a power module according to the present invention. FIG. 1A is a plan view, and FIG. 1B is a cross-sectional view taken along a dotted line AA ′ in FIG. In the present invention,
Half line L drawn in any direction from the center of gravity G of the semiconductor chip
The distance between the end of the semiconductor chip and the end of the metal circuit is D,
When the distance from the center of gravity G of the semiconductor chip to the end of the semiconductor is W, it is important that the semiconductor chip is arranged on the metal circuit so that at least one or more half lines satisfying D ≧ W exist. According to the study by the present inventors, a power module that achieves the object of the present invention can be obtained only when the above condition is satisfied.

【0013】この理由に付いては明かではないが、Dが
Wを下回ると金属回路の横方向への熱の流れが抑制さ
れ、放熱性が低下するためと考えられる。従って、前記
条件を満足するような半直線の数が多ければ多いほど放
熱効果が期待されるが、発明者らの検討結果では、2本
以上でその効果が顕著であり、全ての方向でD≧Wであ
る半直線が存在するように配置するときに最も放熱効果
が期待され、本発明の目的を達成するのに好適である。
特に、前記配置のしかたは、半導体チップが高出力にな
る場合に有効であり、半導体チップの発熱量が200W
を越える場合に特に有効である。
Although the reason for this is not clear, it is considered that when D is less than W, the flow of heat in the lateral direction of the metal circuit is suppressed, and the heat radiation is reduced. Therefore, the greater the number of half-lines satisfying the above condition, the more the heat radiation effect is expected. However, according to the results of the studies by the inventors, the effect is remarkable with two or more lines, and D The heat radiation effect is most expected when the arrangement is such that a half line satisfying ≧ W is present, which is suitable for achieving the object of the present invention.
In particular, the above arrangement is effective when the semiconductor chip has a high output, and the heat generation amount of the semiconductor chip is 200W.
It is particularly effective when the value exceeds.

【0014】半導体チップが複数個搭載するパワーモジ
ュールについては、最も大きな発熱量を呈する半導体チ
ップの金属回路上の配置が前記条件を満足すれば良い
が、その使用状況に応じて複数の半導体チップが前記条
件を満足するように配置すれば良いし、勿論全数の半導
体チップについて前記条件を満足する配置とすれば一層
良い。特に、発熱量が200Wを越える半導体チップを
2つ以上搭載する場合には、その何れのチップについて
も上記配置構造を満足することがことさらに望ましい。
For a power module having a plurality of semiconductor chips mounted thereon, the arrangement of the semiconductor chips exhibiting the largest amount of heat on the metal circuit may satisfy the above-described conditions. The arrangement may be such that it satisfies the above conditions, and it is of course better if the arrangement satisfies the above conditions for all the semiconductor chips. In particular, when two or more semiconductor chips having a heating value of more than 200 W are mounted, it is further desirable that any of the chips satisfies the above arrangement structure.

【0015】なお、一つの金属回路上に複数の半導体チ
ップを搭載する場合、個々の半導体チップの充分な放熱
性を確保するためには、半導体チップ相互の間隔は、例
えば2個の隣り合う半導体チップ各々の重心から当該半
導体の端部までの距離をそれぞれWa、Wbとすると、
(Wa+Wb)以上になるように配置すれば良い。即ち、
(Wa+Wb)を前記Dと読み代えて配置すれば良い。
When a plurality of semiconductor chips are mounted on one metal circuit, the spacing between the semiconductor chips is, for example, two adjacent semiconductor chips in order to ensure sufficient heat dissipation of each semiconductor chip. Assuming that the distances from the center of gravity of each chip to the end of the semiconductor are Wa and Wb, respectively.
What is necessary is just to arrange so that it may become (Wa + Wb) or more. That is,
(Wa + Wb) may be replaced with the above D and arranged.

【0016】本発明のセラミックス焼結体としては、ア
ルミナ、ムライト、窒化珪素、窒化アルミニウム、酸化
ベリリウムなどの電気絶縁性で耐熱性に優れる材料であ
ればいずれを用いても良く、その材料特性についても特
に制限はない。しかし、良好な放熱性を示すためには熱
伝導率が60W/mK以上のものが好適であるし、回路
基板形成後の強さを確保するためには350MPa以上
の曲げ強さを有するセラミックス焼結体が好適である。
As the ceramic sintered body of the present invention, any material having electrical insulation and excellent heat resistance, such as alumina, mullite, silicon nitride, aluminum nitride, and beryllium oxide, may be used. There is no particular limitation. However, a material having a thermal conductivity of 60 W / mK or more is preferable in order to exhibit good heat dissipation, and a ceramic firing material having a bending strength of 350 MPa or more is required to secure strength after forming a circuit board. Consolidation is preferred.

【0017】これらセラミックス焼結体のうち、窒化ア
ルミニウム焼結体は熱伝導率が高いので、高出力パワー
モジュールに用いて有効であり、窒化珪素焼結体は熱伝
導率はやや小さいものの曲げ強さが大きいので有効であ
る。とりわけ、窒化珪素焼結体は窒化アルミニウム焼結
体を初めとするセラミックス焼結体に比べて熱膨張率が
小さいので、得られるパワーモジュールは熱衝撃に対す
る抵抗が強く一層信頼性に優れるので、好適である。
Among these ceramics sintered bodies, aluminum nitride sintered bodies have high thermal conductivity and are therefore effective for use in high-output power modules, while silicon nitride sintered bodies have slightly lower thermal conductivity but higher bending strength. It is effective because it is large. In particular, a silicon nitride sintered body has a smaller coefficient of thermal expansion than a ceramic sintered body such as an aluminum nitride sintered body, so that the obtained power module has a higher resistance to thermal shock and is more excellent in reliability. It is.

【0018】本発明の接合層としては、ろう材ペースト
を用いて形成されたものが一般的である。前記ろう材ペ
ーストは、例えば金属回路板又は金属放熱板の材質がC
uである場合、AgもしくはAgとCuを含むろう材で
あり、好ましくはTi、Zr、Hf等の活性金属を含む
前記ろう材である。
The bonding layer of the present invention is generally formed using a brazing material paste. The brazing material paste is, for example, a material of a metal circuit board or a metal radiator plate is C
In the case of u, it is a brazing material containing Ag or Ag and Cu, preferably the above-mentioned brazing material containing an active metal such as Ti, Zr, and Hf.

【0019】セラミックス基板に形成される金属回路板
と金属放熱板の材質については、銅、ニッケル、アルミ
ニウム、モリブデン、タングステン等の金属もしくは前
記金属を主成分とする合金を用いる事が出来る。
As the material of the metal circuit board and the metal radiator formed on the ceramics substrate, metals such as copper, nickel, aluminum, molybdenum, and tungsten or alloys containing the above metals as main components can be used.

【0020】本発明のパワーモジュールの製造方法につ
いて一例をもって説明する。先ず、セラミックス基板
(最大表面粗さ10μm以下程度に加工した焼結体)の
表面全体にAgとCu及び活性金属としてTiを含むろ
う材ペーストを塗布し、次いでそのペースト面を覆うに
十分な広さのベタ金属板(Cu)を接触配置する。ベタ
金属板の配置されたセラミックス基板を熱処理して両者
の接合体を製造する。
The manufacturing method of the power module according to the present invention will be described by way of an example. First, a brazing material paste containing Ag, Cu, and Ti as an active metal is applied to the entire surface of a ceramic substrate (a sintered body processed to have a maximum surface roughness of about 10 μm or less), and then has a sufficient width to cover the paste surface. Then, a solid metal plate (Cu) is placed in contact. The ceramic substrate on which the solid metal plate is arranged is heat-treated to produce a joined body of the two.

【0021】このようにして製造された接合体の金属板
上にエッチングレジストを用いて回路パターンをスクリ
ーン印刷し、レジスト回路パターンを形成させる。この
ときの回路パターン構造は本請求項1及び/又は2に従
う。
A circuit pattern is screen-printed on the metal plate of the joined body manufactured as described above using an etching resist to form a resist circuit pattern. The circuit pattern structure at this time conforms to claims 1 and / or 2.

【0022】次いで、エッチング処理してパターン外の
不要な金属やろう材等を除去した後、エッチングレジス
ト膜を除去して金属回路を有するセラミックス回路基板
とする。その後、金属回路の酸化と腐食を防止するた
め、必要に応じてNiメッキ等により選択的に金属回路
上に保護膜を形成する。
Next, after an unnecessary metal or brazing material outside the pattern is removed by etching, the etching resist film is removed to obtain a ceramic circuit board having a metal circuit. Thereafter, in order to prevent oxidation and corrosion of the metal circuit, a protective film is selectively formed on the metal circuit by Ni plating or the like as necessary.

【0023】次に、半田レジストを付けたヒートシンク
にクリーム半田を塗布し、先の回路基板を載せて加熱し
接合する。更に、クリーム半田を塗った半導体チップを
所定の位置に置き、熱処理を行い接合した後、半導体チ
ップにリードワイヤーを接合する。電極を埋め込んだ樹
脂ケースの電極にクリーム半田を塗布してヒートシンク
にかぶせ、熱処理を行い接合する。最後に樹脂封止を行
いパワーモジュールとする。
Next, cream solder is applied to a heat sink to which a solder resist has been attached, and the above-mentioned circuit board is placed and heated to be joined. Further, the semiconductor chip coated with the cream solder is placed at a predetermined position, and is subjected to heat treatment and joined, and then a lead wire is joined to the semiconductor chip. Cream solder is applied to the electrodes of the resin case in which the electrodes are embedded, covered with a heat sink, and heat-treated to be joined. Finally, resin sealing is performed to form a power module.

【0024】以下、実施例に基づいて、本発明を更に詳
細に説明する。
Hereinafter, the present invention will be described in more detail with reference to examples.

【0025】[0025]

【実施例】【Example】

〔実施例1〜4、比較例1、2〕熱伝導率130W/m
K、厚み0.635mmで大きさ50×60mmの窒化
アルミニウム焼結体の両面にスクリーン印刷法により活
性金属(Ti)含有のAg−Cu系ろう材ペーストを塗
布し乾燥した後、厚さ0.3mmの金属回路用Cu板と
厚さ0.15mmの金属放熱用Cu板を接触配置させ、
真空中830℃で30分間熱処理を行い窒化アルミニウ
ム基板とCu板の接合体を得た。
[Examples 1 to 4, Comparative Examples 1 and 2] Thermal conductivity 130 W / m
K, an Ag-Cu-based brazing material paste containing active metal (Ti) is applied to both sides of a sintered aluminum nitride body having a thickness of 0.635 mm and a size of 50 x 60 mm by a screen printing method, dried, and then dried. A 3 mm metal circuit Cu plate and a 0.15 mm thick metal heat dissipation Cu plate are placed in contact with each other,
Heat treatment was performed at 830 ° C. for 30 minutes in a vacuum to obtain a joined body of the aluminum nitride substrate and the Cu plate.

【0026】前記接合体のCu板上に紫外線硬化型エッ
チングレジストをスクリーン印刷法により回路パターン
を印刷し硬化させた。この時の回路パターンは、24×
42mm、32×42mm或いは24×30mmとし
た。この後、塩化第2鉄溶液でパターン以外の不要なC
uを除去した。次いで、フッ化水素アンモニウムと過酸
化水素を含む水溶液で、Cu回路パターン間の不要ろう
材を除去した後、レジストを除去した。更に、無電解N
iメッキによりCu回路の所定位置に選択的にNi保護
膜を形成させた。
An ultraviolet-curable etching resist was printed on a Cu plate of the joined body by a screen printing method and cured. The circuit pattern at this time is 24 ×
42 mm, 32 × 42 mm or 24 × 30 mm. After that, unnecessary ferrous chloride solution other than the pattern
u was removed. Next, the unnecessary brazing material between the Cu circuit patterns was removed with an aqueous solution containing ammonium hydrogen fluoride and hydrogen peroxide, and then the resist was removed. In addition, electroless N
A Ni protective film was selectively formed at a predetermined position of the Cu circuit by i-plating.

【0027】上記操作に従い、表1の実施例1、2及び
比較例1に示す窒化アルミニウム回路基板を完成させ
た。実施例3、4及び比較例2の試料については、セラ
ミックス基板として熱伝導率70W/mK、厚み0.3
5mmで大きさの60×50mmの窒化珪素焼結体を用
いた以外は上記に示す方法で試料を得た。
According to the above operation, the aluminum nitride circuit boards shown in Examples 1 and 2 and Comparative Example 1 in Table 1 were completed. For the samples of Examples 3 and 4 and Comparative Example 2, the ceramic substrate had a thermal conductivity of 70 W / mK and a thickness of 0.3.
A sample was obtained by the method described above except that a silicon nitride sintered body having a size of 5 mm and a size of 60 × 50 mm was used.

【0028】これらの回路基板の金属回路の中央表面に
は底面積16×20mmのトランジスタを発熱源として
装着し、裏面には厚み2.5mmのCu板をヒートシン
クとしてハンダ付けしてパワーモジュールを作製した。
この時、トランジスタの位置は、トランジスタの重心か
ら任意の方向に引いた半直線Lのうちトランジスタ端部
と金属回路端部との距離Dがトランジスタの重心からト
ランジスタの端部までの距離Wに比べて最も大きい半直
線(即ちD/Wが最大の半直線、複数有る場合には任意
の一本を選択する)を半直線L1とし、半時計方向に9
0度(半直線L2)、180度(半直線L1’)、270
度(半直線L2’)の角をなす半直線を引き、半直線L1
上のD(D1)及びW(W1)と半直線L1’上のD(D
1’)及びW(W1’)において、D1=D1’、W1=W
1’になるように配置し、同様にD2=D2’、W2=W
2’になるように配置した。作成したモジュールの熱抵
抗を測定した結果を表1に示す。
A power module is manufactured by mounting a transistor having a bottom area of 16 × 20 mm as a heat source on the center surface of the metal circuit of these circuit boards and soldering a 2.5 mm thick Cu plate as a heat sink on the back surface. did.
At this time, the position of the transistor is such that the distance D between the end of the transistor and the end of the metal circuit in the half-line L drawn in an arbitrary direction from the center of gravity of the transistor is smaller than the distance W from the center of gravity of the transistor to the end of the transistor. The largest half line (ie, the half line having the largest D / W, and if there is more than one, select any one line) is defined as the half line L1,
0 degree (half line L2), 180 degree (half line L1 '), 270
Draw a half line at the angle of degree (half line L2 ') and draw the half line L1
D (D1) and W (W1) above, and D (D
1 ′) and W (W1 ′), D1 = D1 ′, W1 = W
1 ′, and similarly D2 = D2 ′, W2 = W
Arranged to be 2 '. Table 1 shows the results of measuring the thermal resistance of the prepared module.

【0029】[0029]

【表1】 [Table 1]

【0030】表1に示す結果から明らかなように、実施
例1〜4に係るパワーモジュールは、放熱性に優れ、高
い信頼性を有する。また、実施例1と2を比較すると実
施例2の方が放熱性が優れていることが明らかである。
また、実施例3と4を比較すると実施例4の方が放熱性
が優れている。一方、比較例1及び2に係る回路基板を
用いたパワーモジュールは、充分な放熱性が得られない
ため、半導体の高集積化、高出力化に対応できない。
As is evident from the results shown in Table 1, the power modules according to Examples 1 to 4 have excellent heat dissipation and high reliability. Further, when Examples 1 and 2 are compared, it is clear that Example 2 has better heat dissipation.
Further, when comparing Examples 3 and 4, Example 4 is superior in heat dissipation. On the other hand, the power modules using the circuit boards according to Comparative Examples 1 and 2 do not provide sufficient heat dissipation, and thus cannot cope with high integration and high output of semiconductors.

【0031】[0031]

【発明の効果】本発明によれば、ことさらに熱伝導率の
高いセラミック基板を用いる必要がなく、ヒートショッ
クやヒートサイクルなどの熱衝撃、熱履歴によって生じ
る損傷に対して十分な耐久性を有し、しかも熱放散性に
優れ、セラミックス基板の破損等に原因する絶縁破壊等
の絶縁不良などが発生しがたい高信頼性のパワーモジュ
ールを容易に提供できる。
According to the present invention, it is not necessary to use a ceramic substrate having a particularly high thermal conductivity, and it has sufficient durability against damage caused by heat shock and heat history such as heat shock and heat cycle. In addition, it is possible to easily provide a highly reliable power module that has excellent heat dissipation and is unlikely to cause insulation failure such as insulation breakdown due to breakage of the ceramic substrate.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のパワーモジュールの一例を示す図で、
(a)が平面図、(b)が(a)中のA−A’での断面
図。
FIG. 1 is a diagram showing an example of a power module according to the present invention;
(A) is a plan view, (b) is a cross-sectional view taken along AA 'in (a).

【符号の説明】[Explanation of symbols]

1:半導体チップ 2:半田 3:金属板 4:セラミックス基板 5:ヒートシンク 6:封止樹脂 L:半導体チップの重心を通る半直線の一例 D:半導体チップ端部と金属回路端部との距離 W:半導体チップの重心から端部までの距離 G:半導体チップの重心 1: Semiconductor chip 2: Solder 3: Metal plate 4: Ceramic substrate 5: Heat sink 6: Sealing resin L: An example of a half line passing through the center of gravity of the semiconductor chip D: Distance between the end of the semiconductor chip and the end of the metal circuit W : Distance from the center of gravity of the semiconductor chip to the end G: Center of gravity of the semiconductor chip

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 セラミックス基板の少なくとも一主面上
に金属回路を設け、該金属回路上に半導体チップを配置
してなるパワーモジュールであって、該パワーモジュー
ルを基板に対して垂直の方向より眺め、前記半導体チッ
プの重心から任意の方向に半直線を引き、該半直線上で
半導体チップの端部と金属回路端部との距離をD、半導
体チップの重心から端部までの距離をWとするとき、D
≧Wである半直線が少なくとも1本以上存在するように
前記半導体チップを配置してなることを特徴とするパワ
ーモジュール。
1. A power module having a metal circuit provided on at least one main surface of a ceramic substrate and a semiconductor chip disposed on the metal circuit, wherein the power module is viewed from a direction perpendicular to the substrate. Draw a half-line in an arbitrary direction from the center of gravity of the semiconductor chip, D represents the distance between the end of the semiconductor chip and the metal circuit end on the half-line, and W represents the distance from the center of gravity of the semiconductor chip to the end. When D
A power module, wherein the semiconductor chips are arranged so that at least one or more semi-straight lines satisfying ≧ W exist.
【請求項2】 D≧Wである半直線が2本以上存在する
ように前記半導体チップを配置してなることを特徴とす
る請求項1記載のパワーモジュール。
2. The power module according to claim 1, wherein the semiconductor chips are arranged so that two or more half-lines satisfying D ≧ W exist.
【請求項3】 全ての方向でD≧Wである半直線が存在
するように前記半導体チップを配置してなることを特徴
とする請求項1記載のパワーモジュール。
3. The power module according to claim 1, wherein the semiconductor chips are arranged so that a half line satisfying D ≧ W exists in all directions.
【請求項4】 セラミックス基板が窒化アルミニウム焼
結体又は窒化珪素焼結体からなることを特徴とする請求
項1、請求項2または請求項3記載のパワーモジュー
ル。
4. The power module according to claim 1, wherein the ceramic substrate is made of an aluminum nitride sintered body or a silicon nitride sintered body.
JP2512297A 1997-02-07 1997-02-07 Power module Expired - Fee Related JP3419642B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2512297A JP3419642B2 (en) 1997-02-07 1997-02-07 Power module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2512297A JP3419642B2 (en) 1997-02-07 1997-02-07 Power module

Publications (2)

Publication Number Publication Date
JPH10223809A true JPH10223809A (en) 1998-08-21
JP3419642B2 JP3419642B2 (en) 2003-06-23

Family

ID=12157144

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2512297A Expired - Fee Related JP3419642B2 (en) 1997-02-07 1997-02-07 Power module

Country Status (1)

Country Link
JP (1) JP3419642B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106488648A (en) * 2016-09-26 2017-03-08 广东小天才科技有限公司 A kind of circuit board cooling structure and electronic equipment
WO2020105734A1 (en) 2018-11-22 2020-05-28 デンカ株式会社 Ceramic-copper composite, method for producing ceramic-copper composite, ceramic circuit board, and power module
WO2020138283A1 (en) 2018-12-28 2020-07-02 デンカ株式会社 Ceramic-copper composite, ceramic circuit board, power module, and method for manufacturing ceramic-copper composite
WO2020203787A1 (en) 2019-03-29 2020-10-08 デンカ株式会社 Silicon nitride substrate, silicon nitride-metal complex, silicon nitride circuit board, and semiconductor package

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106488648A (en) * 2016-09-26 2017-03-08 广东小天才科技有限公司 A kind of circuit board cooling structure and electronic equipment
WO2020105734A1 (en) 2018-11-22 2020-05-28 デンカ株式会社 Ceramic-copper composite, method for producing ceramic-copper composite, ceramic circuit board, and power module
WO2020138283A1 (en) 2018-12-28 2020-07-02 デンカ株式会社 Ceramic-copper composite, ceramic circuit board, power module, and method for manufacturing ceramic-copper composite
WO2020203787A1 (en) 2019-03-29 2020-10-08 デンカ株式会社 Silicon nitride substrate, silicon nitride-metal complex, silicon nitride circuit board, and semiconductor package

Also Published As

Publication number Publication date
JP3419642B2 (en) 2003-06-23

Similar Documents

Publication Publication Date Title
JP4207896B2 (en) Semiconductor device
JP4015023B2 (en) ELECTRONIC CIRCUIT MEMBER, ITS MANUFACTURING METHOD, AND ELECTRONIC COMPONENT
JP2592308B2 (en) Semiconductor package and computer using the same
US20050258550A1 (en) Circuit board and semiconductor device using the same
JP2008041752A (en) Semiconductor module, and radiation board for it
JP4893095B2 (en) Circuit board and semiconductor module using the same
JP2007299974A (en) Circuit board and semiconductor module employing it
JP4683043B2 (en) Manufacturing method of semiconductor device
JP2006100640A (en) Ceramic circuit board and power semiconductor module using same
JP5370460B2 (en) Semiconductor module
JP2004022973A (en) Ceramic circuit board and semiconductor module
JP2004356625A (en) Semiconductor device and method for manufacturing the same
JP2002064169A (en) Heat radiating structure
JP2003168770A (en) Silicon nitride circuit board
JP2012074591A (en) Circuit board and electronic divice
JP3599517B2 (en) Circuit board for power module
JP3419642B2 (en) Power module
JP2007096252A (en) Liquid-cooling circuit substrate and liquid cooling electronic device
JPH10247763A (en) Circuit board and manufacture thereof
JP2018006377A (en) Composite substrate, electronic device, and electronic module
JPH10200219A (en) Circuit board
JPH10167804A (en) Ceramic substrate, circuit board using same and its production
JP2004343035A (en) Heat radiating component, circuit board, and semiconductor device
JP3583019B2 (en) Joint structure of heat dissipation wiring board
CN216389353U (en) Power module with step pad formed on ceramic substrate

Legal Events

Date Code Title Description
S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080418

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090418

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090418

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100418

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100418

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110418

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130418

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140418

Year of fee payment: 11

LAPS Cancellation because of no payment of annual fees