JP2644590B2 - Voltage fluctuation compensator - Google Patents

Voltage fluctuation compensator

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Publication number
JP2644590B2
JP2644590B2 JP1189195A JP18919589A JP2644590B2 JP 2644590 B2 JP2644590 B2 JP 2644590B2 JP 1189195 A JP1189195 A JP 1189195A JP 18919589 A JP18919589 A JP 18919589A JP 2644590 B2 JP2644590 B2 JP 2644590B2
Authority
JP
Japan
Prior art keywords
voltage
reactive power
compensator
circuit
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1189195A
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Japanese (ja)
Other versions
JPH0356035A (en
Inventor
吉成 古川
満寿夫 山田
亮 松井
喜裕 馬場
正俊 竹田
剛 熊谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chubu Electric Power Co Inc
Mitsubishi Electric Corp
Original Assignee
Chubu Electric Power Co Inc
Mitsubishi Electric Corp
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Filing date
Publication date
Application filed by Chubu Electric Power Co Inc, Mitsubishi Electric Corp filed Critical Chubu Electric Power Co Inc
Priority to JP1189195A priority Critical patent/JP2644590B2/en
Publication of JPH0356035A publication Critical patent/JPH0356035A/en
Application granted granted Critical
Publication of JP2644590B2 publication Critical patent/JP2644590B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は配電系統の電圧変動を防止するための電圧
変動補償装置に関するものである。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage fluctuation compensating device for preventing a voltage fluctuation in a distribution system.

〔従来の技術〕[Conventional technology]

第5図は例えば三菱電機技報Vo1.62,No.6,1988,P15〜
20論文「アクティブフィルタとその応用」に開示された
従来の電圧変動補償装置を示す回路図である。図におい
て(1)は電源、(2)および(3)は電源系統に存在
するそれぞれ抵抗RおよびリアクタンスX、(4)は負
荷側母線で、その電圧Vが補償すべき対象の負荷電圧で
ある。(5)はその電力が変動する負荷、そして(6)
が負荷(5)と並列に負荷側母線(4)に接続された無
効電力補償装置、(7)は負荷検出手段である変流器
(8)および変成器(9)からの検出出力をもとに無効
電力補償装置(6)の出力無効電力−jQcを制御する制
御装置である。
FIG. 5 shows, for example, Mitsubishi Electric Technical Report Vo1.62, No. 6, 1988, p.
FIG. 10 is a circuit diagram showing a conventional voltage fluctuation compensator disclosed in 20 papers “Active filters and their applications”. In the figure, (1) is a power supply, (2) and (3) are resistors R and reactance X existing in the power supply system, and (4) is a load-side bus, whose voltage V is a load voltage to be compensated. . (5) the load whose power fluctuates, and (6)
Is a reactive power compensator connected in parallel with the load (5) to the load-side bus (4), and (7) also detects detection outputs from the current transformer (8) and the transformer (9) as load detecting means. a controller for controlling the output reactive power -JQ c of the reactive power compensator (6) and.

上記無効電力補償装置(6)は例えば第6図に示すよ
うに自動式インバータを用いたアクティブフィルタで構
成される。第6図はアクティブフィルタの回路構成を示
す図であり(10a)〜(10c)はリアクトル、(11a)〜
(11f)はトランジスタスイッチ、(12)はコンデン
サ、(13a)と(13b)はアクティブフィルタの出力電力
を検出するための変流器である。また、制御装置(7)
は次の回路で構成される。(14)は変成器(9)で検出
された電圧VAと変流器(8)で検出された電流IAを入力
し負荷の有効電力Pと無効電力Qを検出する検出回路、
(15)は検出回路(14)の出力値を基準信号とし、変流
器(13)で検出された電流ICをフィードバック信号とし
て出力電流を制御する電流制御回路、(16)は電流制御
回路(15)の出力信号を変調するためのPWM回路であ
り、その出力はトランジスタスイッチ(11a)〜(11f)
のON−OFF信号としてアクティブフィルタ(6)へ与え
られる。
The reactive power compensator (6) is composed of, for example, an active filter using an automatic inverter as shown in FIG. FIG. 6 is a diagram showing the circuit configuration of the active filter, where (10a) to (10c) are reactors, and (11a) to
(11f) is a transistor switch, (12) is a capacitor, and (13a) and (13b) are current transformers for detecting the output power of the active filter. The control device (7)
Is composed of the following circuits. (14) a detection circuit which receives the voltage VA detected by the transformer (9) and the current IA detected by the current transformer (8), and detects active power P and reactive power Q of the load;
(15) is a current control circuit that controls the output current using the output value of the detection circuit (14) as a reference signal and the current IC detected by the current transformer (13) as a feedback signal, and (16) is a current control circuit ( 15) is a PWM circuit for modulating the output signal, and the output is a transistor switch (11a) to (11f)
Is supplied to the active filter (6) as an ON-OFF signal.

次に動作について説明する。第6図においてコンデン
サ(12)に充電されている直流電圧Edはトランジスタス
イッチ(11a)〜(11f)によりPWM変調され、VIなる交
流電圧に変換される。
Next, the operation will be described. DC voltage Ed which is charged in the capacitor (12) in Figure 6 is PWM-modulated by the transistor switch (11a) ~ (11f), is converted to V I becomes the alternating voltage.

この電圧VIはリアクトル(10)を介して負荷側母線
(4)に供給される。従って、アクティブフィルタ
(6)の動作は第7図の等価回路で表わすことができ、
第8図(a)に示すようにアクティブフィルタの出力電
圧VIを負荷母線電圧Vより大きくすると進相無効電力を
アクティブフィルタに流し、また、同図(b)に示すよ
うにアクティブフィルタの出力電圧VIを負荷母線電圧V
より小さくすると遅相無効電力をアクティブフィルタに
流すように動作する。
The voltage V I is supplied to the reactor (10) via the load side bus (4). Therefore, the operation of the active filter (6) can be represented by the equivalent circuit of FIG.
When the output voltage V I of the active filter as shown in FIG. 8 (a) larger than the load bus voltage V phase lead flowing a reactive power to the active filter, The output of the active filter as shown in FIG. (B) the voltage V I load bus voltage V
If it is smaller, it operates so that the late-phase reactive power flows through the active filter.

次に無効電力補償装置(6)による電圧変動補償方法
について説明する。第9図は負荷電圧V、補償無効電力
QC及び電源側無効電力QOの時間経過を示したタイムチャ
ート図である。今、電源系統の抵抗をR(%)(10MVA
ベース)、リアクタンスをX(%)(10MVAベース)と
し、時刻T=T1まで無負荷であったものが、時刻T=T1
で有効電力P(KW)、無効電力Q(KVAR)の負荷が投入
されたとする。この負荷投入により、負荷電圧Vは次式
で示すΔVだけ降下する。(第9図(a)) ΔV=(R・P+X・Q)×10-4 制御装置(7)はこの負荷のPとQ検出回路(14)に
より検出して直ちに電流制御回路(15)及びPWM制御回
路(16)を調整し、上記電圧降下ΔVを零にするように
次式で求まる進相無効電力QC(KVAR)を時刻T2以降に無
効電力補償装置(6)に流す。(第9図(b)) ΔV={R・P+X・(Q−QC)}×10-4=0 従って、 この結果、電源側に流れる無効電力QOは進相の となり電源側力率は時間T=T2以降進みとなって継続す
る。(第9図(c)) そしてこの進みはR/Xの値が大きくなるほど大きくな
り、電源側力率が悪化することになる。
Next, a voltage fluctuation compensation method by the reactive power compensator (6) will be described. Fig. 9 shows the load voltage V and the reactive reactive power
Is a time chart showing the time course of Q C and the power supply-side reactive power Q O. Now, set the resistance of the power system to R (%) (10MVA
Base), reactance X (%) (those 10MVA base), and was unloaded to a time T = T 1 is time T = T 1
Suppose that a load of active power P (KW) and reactive power Q (KVAR) is applied. With this load application, the load voltage V drops by ΔV shown in the following equation. (FIG. 9 (a)) ΔV = (RP + XQ) × 10 -4 The control device (7) detects the P and Q detection circuits (14) of this load and immediately controls the current control circuit (15) and adjust the PWM control circuit (16), flow to the leading phase reactive power Q C (KVAR) reactive power compensator to the time T 2, after the which is obtained by the following equation so as to zero the voltage drop [Delta] V (6). (Figure 9 (b)) ΔV = {R · P + X · (Q-Q C)} × 10 -4 = 0 Therefore, As a result, the reactive power Q O flowing to the power supply side Next power supply power factor continues becomes time advance T = T 2 later. (FIG. 9 (c)) This progress increases as the value of R / X increases, and the power factor on the power supply side deteriorates.

〔発明が解決しようとする課題〕[Problems to be solved by the invention]

従来の電圧補償装置は以上のように構成されているの
で、負荷電圧を一定に保とうとすると、電源側の抵抗分
Rによる電圧降下をも補償する必要があるために進相無
効電力を過補償する必要があり、電源側の力率が悪化さ
せると共に電源インピーダンスによる電力損失を増加さ
せるという課題があった。
Since the conventional voltage compensator is configured as described above, if the load voltage is to be kept constant, it is necessary to compensate also for the voltage drop due to the resistance R on the power supply side. Therefore, there is a problem that the power factor on the power supply side deteriorates and the power loss due to the power supply impedance increases.

この発明は以上のような課題を解消するためになされ
たもので、電源側の力率の悪化を防止し、かつ負荷電圧
の変動を補償することができる電圧補償装置を得ること
を目的とする。
The present invention has been made in order to solve the above problems, and an object of the present invention is to provide a voltage compensating device capable of preventing a power factor on a power supply from deteriorating and compensating for a change in load voltage. .

〔課題を解決するための手段〕[Means for solving the problem]

この発明に係る電圧補償装置は無効電力補償装置に加
えて電源の配電線路側に線路電圧の大きさを検出して自
動的に負荷電圧の変動を補償する電圧調整装置を備えた
ものであり、負荷電力変動による電圧変動のうち有効成
分によるものは上記電圧調整装置で補償し、無効成分に
よるものは上記無効電力補償装置で補償するようにした
ものである。
The voltage compensator according to the present invention includes, in addition to the reactive power compensator, a voltage adjuster that detects the magnitude of the line voltage on the distribution line side of the power supply and automatically compensates for the fluctuation of the load voltage, Among the voltage fluctuations due to the load power fluctuation, those due to the effective component are compensated by the voltage regulator, and those due to the reactive component are compensated by the reactive power compensator.

〔作用〕[Action]

この発明における電圧補償装置は負荷の過渡的な変化
による電圧変動分は速応性を有する無効電力補償装置で
全領域を補償するようにし、定常状態に達すると無効電
力補償装置の補償領域を徐々に減じていき問題のない範
囲で電源電圧変動を少し生じさせることにより電圧調整
装置の動作を誘導するようにして定常的には有効成分に
よる電圧変動は電圧調整装置で、また無効成分による電
圧変動は無効電力補償装置により補償できるようにした
ものである。
According to the voltage compensator of the present invention, the voltage fluctuation due to the transient change of the load is compensated over the entire area by the reactive power compensator having a quick response, and when the steady state is reached, the compensation area of the reactive power compensator is gradually increased. In order to induce the operation of the voltage regulator by generating a small amount of power supply voltage fluctuation within a range where there is no problem, the voltage fluctuation due to the effective component is normally the voltage regulator, and the voltage fluctuation due to the invalid component is steadily reduced. This can be compensated by a reactive power compensator.

〔発明の実施例〕(Example of the invention)

以下、この発明の一実施例を図について説明する。第
1図において、(17)はタップ切替器、(18)は電圧変
成器、(19)はタップ制御回路、(20)は(17)〜(1
9)で構成される電圧調整器である。また、(21)は負
荷(5)の無効電力を検出する負荷側無効電力検出回
路、(22)は負荷(5)の有効電力を検出する負荷側有
効電力検出回路、(23)は電源側の電流を検出する電流
変成器、(24)は電源側の無効電力を検出する電源側無
効電力検出回路、(25)は積分回路、(26)は補償容量
演算回路、(27)は補償容量演算回路(26)の出力値を
基準信号とし、変流器(13)で検出された電流ICをフィ
ードバック信号として出力電流を制御する電流制御回路
である。また、(28)は電流制御回路(27)の出力信号
を変調するためのPWM回路であり、その出力はトランジ
スタスイッチ(11a)〜(11f)のON−OFF信号としてア
クティブフィルタ(6)へ与えられる。
An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, (17) is a tap changer, (18) is a voltage transformer, (19) is a tap control circuit, and (20) is (17) to (1).
This is a voltage regulator consisting of 9). Also, (21) is a load-side reactive power detection circuit that detects the reactive power of the load (5), (22) is a load-side active power detection circuit that detects the active power of the load (5), and (23) is a power supply side. (24) is a power supply side reactive power detection circuit that detects reactive power on the power supply side, (25) is an integration circuit, (26) is a compensation capacity calculation circuit, and (27) is a compensation capacity. the output value of the arithmetic circuit (26) as a reference signal, a current control circuit for controlling the output current of the current I C which is detected by the current transformer (13) as a feedback signal. Reference numeral (28) denotes a PWM circuit for modulating an output signal of the current control circuit (27), the output of which is provided to the active filter (6) as ON-OFF signals of the transistor switches (11a) to (11f). Can be

次に動作について説明する。従来の装置との動作の違
いを説明するために第9図と同様のタイムチャートを用
いて第2図で説明する。第2図において時刻T=T1まで
無負荷であったもので時刻T=T1で有効電力P(KW)、
無効電力Q(KVAR)の負荷が投入されると時刻T2以降に
負荷側無効電力(21)により無効電力Qを検出し、負荷
側有効電力検出回路(22)により有効電力Pを検出す
る。
Next, the operation will be described. FIG. 2 is a timing chart similar to FIG. 9 for explaining the difference in operation from the conventional apparatus. Active power P at time T = T 1 in what was unloaded to a time T = T 1 in FIG. 2 (KW),
Detecting the reactive power Q by the reactive power Q load reactive power to the load is being the time T 2, after introduction of (KVAR) (21), for detecting the active power P by the load-side active power detection circuit (22).

一方、無効電力補償装置(6)の接点より電源側の電
流を検出する電流変成器(23)を介して検出した電流を
入力として電源側無効電力検出回路(24)で電源側無効
電力QOを求める。電源側無効電力検出回路(24)の出力
QOは次段の積分回路(25)へ入力され、時定数TIで積分
された後、積分出力QIを補償容量演算回路(26)へ入力
する。
On the other hand, reactive power compensator (6) power supply side reactive power Q O a current transformer for detecting the power supply side of the current from the contact power supply side reactive power detection circuit detects the current through (23) as an input (24) of Ask for. Output of the power supply side reactive power detection circuit (24)
Q O is input to the integration circuit (25) of the next stage, and after being integrated by the time constant T I , the integrated output Q I is input to the compensation capacity calculation circuit (26).

補償容量演算回路(26)では次式の演算を行う。 The compensation capacity calculation circuit (26) performs the following calculation.

この補償容量演算回路の出力QMは電流基準信号として
次段の電流制御回路(26)へ入力され、電流制御回路
(26)とPWM回路(27)により無効電力補償装置(6)
にQMに等しい無効電力−jQcを流すように制御するのは
第5図に示す従来の無効電力補償装置と同様である。
The output Q M of the compensation capacity calculation circuit is input as a current reference signal to the next stage of the current control circuit (26), reactive power compensator by PWM circuit and a current control circuit (26) (27) (6)
Is the same as that of the conventional reactive power compensation apparatus shown in FIG. 5 to control such flow of reactive power -JQ c equal to Q M in.

時間T2の直後においては時定数の関係で積分回路(2
5)はまだその出力QIがほとんど0の状態になっている
ので、T2直後の補償容量演算回路(25)の出力は を出力することになり、従って無効電力補償装置の出力
QCも第2図(b)のように を出力することになる。この結果、負荷(5)のPとQ
による電圧降下を0に抑えるように動作することは従来
の無効電力補償装置と同様である。
Integrating circuit in relation to the time constant immediately after the time T 2 (2
5) still because the output Q I becomes almost zero, the output of the compensation capacity calculation circuit immediately after T 2 (25) is And therefore the output of the reactive power compensator
Q C is also as shown in Fig. 2 (b). Will be output. As a result, P and Q of the load (5)
The operation that suppresses the voltage drop due to the above to zero is the same as the conventional reactive power compensator.

第2図(c)に示すように、この場合には電源側の無
効電力QOとなるが、この無効電力QOは電源側無効電力検出回路
(23)で検出され積分回路(23)において、時定数TI
積分されるため、積分回路(23)の出力QIは補償容量演
算回路(25)において、減算され次式のような演算を行
う。
In this case, as shown in FIG. 2 (c), the reactive power Q O on the power supply side is However, since this reactive power Q O is detected by the power supply side reactive power detection circuit (23) and integrated by the integration circuit (23) with a time constant T I , the output Q I of the integration circuit (23) is compensated. In the capacity calculation circuit (25), the subtraction is performed and the calculation as in the following equation is performed.

従って時刻T2以降で積分回路(23)の出力QIが時定数
TIで増加してくるにつれ徐々にQMが減少し、無効電力補
償装置(6)の出力QCは徐々に低下してくることにな
る。この結果、第2図(a)に示すように負荷電圧Vも
QCの低下に伴って徐々に下がってくるが、負荷電圧Vの
低下は電圧調整器(20)の電圧変成器(18)により検出
されタップ制御回路(19)に入力される。タップ切替え
の下限値VLに達した時にタップ制御回路(19)はタップ
切替え器(17)にタップ上昇信号を出力し、時刻T3にお
いてタップを一段上げるように動作する。この結果、負
荷電圧Vは第2図に示すように時刻T3においてタップ上
昇分ΔVsだけ上昇する。時刻T3以降さらに無効電力補償
装置(6)の出力QCが減少してくると再び負荷電圧Vは
時刻T4においてタップ切替えの下限値VLに達すると再び
もう一段タップを上げて電圧をΔVSだけ更に持上げるよ
うに動作する。このようにして無効電力補償装置の出力
QCを徐々に減少させそれによる電圧の低下分を電圧調整
器(20)のタップを上げることにより負荷電圧は一定範
囲内に入るように動作することになる。無効電力補償装
置(6)の出力QCを減少させていくと電源側の無効電力
QOは徐々に低下して来、定常的にはQOが0になった時に
積分回路(25)は積分動作を停止するため無効電力補償
装置(6)の出力QCはそれ以上は減少せず、電源側の無
効電力QOを0にした状態で落ちつくことになる。従っ
て、定常的には無効電力補償装置(6)の出力はQC=QL
となり、また電源側の無効電力QO=0となる。この結
果、電源インピーダンスによる電圧降下のうちリアクタ
ンス分Xによる電圧降下X・Qは無効電力補償装置QC
より補償し、抵抗分Rによる電圧降下R・Pは電圧調整
装置(20)で補償できることになる。
Time constant output Q I of thus time T 2, after the integration circuit (23)
Q M is reduced gradually as the coming increase in T I, the output Q C of the reactive power compensator (6) gradually becomes to come reduced. As a result, as shown in FIG.
Although come down gradually with a decrease in Q C, reduction of the load voltage V is input to tap control circuit is detected (19) by the voltage regulator the voltage transformer (20) (18). Outputs a tap-up signal to the tap control circuit (19) is tapped switcher (17) when it reaches the lower limit value V L of the switching taps, operates to increase one step the tap at time T 3. As a result, the load voltage V increases by tapping increment [Delta] V s at time T 3 as illustrated in Figure 2. Time T 3 after further var compensator output Q C is the voltage raising reduced come again load voltage V the time T 4 again another stage tap reaches the lower limit value V L of the switching taps in the (6) further work to lift only [Delta] V S. Thus, the output of the reactive power compensator
By gradually decreasing Q C and increasing the tap of the voltage regulator (20) to reduce the voltage drop, the load voltage operates so as to fall within a certain range. Gradually decreases the output Q C of the reactive power compensator (6) When the reactive power of the power supply side
Q O gradually decreases, and when Q O becomes 0 normally, the integration circuit (25) stops the integration operation. Therefore, the output Q C of the reactive power compensator (6) further decreases. Instead, the power becomes calm when the reactive power Q O on the power supply side is set to zero. Therefore, the output of the reactive power compensator (6) is normally Q C = Q L
And the reactive power Q O = 0 on the power supply side. As a result, the voltage drop X · Q by reactance X of the voltage drop due to the power source impedance is compensated by the reactive power compensator Q C, a voltage drop across R · P due to the resistance component R in can be compensated by the voltage regulator (20) Become.

上述の第1の実施例では無効電力補償装置(6)の出
力QCを減少させる時定数は積分回路(25)の時定数TI
より決まり、もし、電圧調整器(20)のタップ切替えに
要する時間遅れが上記時定数TIに比べて長いような場合
にはタップの切替えのための応答時間が無効電力補償装
置(6)の出力QCの低下の時定数に追いつかず、その結
果、負荷電圧Vを必要以上に低下させてしまう可能性が
ある。これを解決したのがこの発明の第2の実施例であ
り、第2の実施例を示す回路図を第3図に示す。
The time constant for reducing the output Q C of the reactive power compensator in the first embodiment described above (6) is determined by the constant T I of the integrating circuit (25), if the switching taps of the voltage regulator (20) time delay required is not keep up with the time constant of decrease in the output Q C response time var compensator (6) for switching the tap when such long compared to the time constant T I, as a result, There is a possibility that the load voltage V may be reduced more than necessary. The second embodiment of the present invention solves this problem. FIG. 3 is a circuit diagram showing the second embodiment.

第3図では第1図の第1の実施例に加えて電圧変動検
出回路(29)、変換回路(30)、リミッタ回路(31)、
減算回路(32)及び積分回路(33)が追加されている。
In FIG. 3, in addition to the first embodiment of FIG. 1, a voltage fluctuation detection circuit (29), a conversion circuit (30), a limiter circuit (31),
A subtraction circuit (32) and an integration circuit (33) are added.

以下この動作について説明する。第4図の時刻T1で負
荷が投入されると、まず負荷無効電力検出回路(21)と
負荷有効電力検出回路(22)が動作し、無効電力補償装
置の出力QCは時刻T2の直後において となり負荷(5)のPとQによる電圧降下を0に抑える
ように動作する。この後、電源側の無効電力QOが電源側
無効電力検出回路(24)で検出され積分回路(25)にお
いて時定数TIで積分される。
Hereinafter, this operation will be described. When the load is turned at time T 1 of the FIG. 4, first, the load reactive power detection circuit (21) and the load active power detection circuit (22) operates, the output Q C of the reactive power compensator is the time T 2, Immediately after And operates to suppress the voltage drop due to P and Q of the load (5) to zero. After that, the reactive power Q O on the power supply side is detected by the reactive power detection circuit (24) on the power supply side and integrated by the integration circuit (25) with the time constant T I.

積分回路(25)の出力QIは補償容量演算回路(26)に
おいて の演算を行うことにより時刻T2以降で積分回路(25)の
出力QIが時定数TIで増加してくるにつれて徐々にQMが減
少し、無効電力補償装置(6)の出力QCは第4図(b)
のように徐々に低下してくる。この結果、第4図(a)
のように負荷電圧VはQCの低下に伴って徐々に下ってく
るが、この負荷電圧Vの低下分は電圧変動検出回路(2
9)で検出され、その検出値VDは次段の変換回路(31)
へ入力され、VDに相当した無効電力量QD に変換される。一方、電源側無効電力検出回路(24)の
出力QOはリミッタ回路(31)へ入力され、その出力QNは QO≧QLIMITの時はQN=+QLIMIT +QLIMIT>QO>QLIMITの時はQN=QO −QLIMIT>QOの時はQN=−QLIMIT となるようにQOの上限値と下限値に制限が与えられる。
Output Q I of the integrator circuit (25) in the compensation capacity calculation circuit (26) Output Q C of the integrating circuit at time T 2, after by performing the calculation of gradual Q M decreases, the reactive power compensation device as the output Q I come increased by the time constant T I (25) (6) Is FIG. 4 (b)
It gradually decreases like. As a result, FIG.
Load the voltage V is coming down gradually with a decrease in Q C, decrement the voltage variation detecting circuit of the load voltage V as shown in (2
Detected in 9), the detected value V D is the next stage of the conversion circuit (31)
Are input to the reactive power was equivalent to V D amount Q D Is converted to On the other hand, the output Q O of the power-supply-side reactive power detection circuit (24) is input to the limiter circuit (31), and the output Q N is Q N = + Q LIMIT + Q LIMIT > Q O > Q when Q O ≧ Q LIMIT when lIMIT is given a Q N = Q O -Q lIMIT> Q upper limit of Q O such that Q N = -Q lIMIT when the O and limiting the lower limit value.

ここでQOの制限値QLIMITは次のように決定される。Here, the limit value Q LIMIT of Q O is determined as follows.

ΔVLIMIT=X・QLIMIT 但し、ΔVLIMITは負荷電圧Vの許容変動巾、Xは配電
線のリアクタンス分、リミッタ回路(31)の出力QNは次
段の減算回路(32)において変換回路(30)の出力QD
減衰され、減算回路(30)の出力(QN−QD)が積分回路
(33)において時定数TVで積分される。積分回路(33)
の出力QVは補償容量演算回路(26)に入力され なる演算を行われる。無効電力補償装置(6)では上式
のQMに相当した無効電力QCを出力することは前述の第1
の実施例と同様である。
ΔV LIMIT = X · Q LIMIT However, [Delta] V LIMIT is allowable variation width of the load voltage V, X is the reactance component of the distribution line, the output Q N conversion circuit in the next stage of the subtracting circuit (32) of the limiter circuit (31) ( attenuated output Q D of 30), the output of the subtracting circuit (30) (Q N -Q D) is integrated in the constant T V time in the integration circuit (33). Integrator (33)
The output Q V of the input to the compensation capacity calculation circuit (26) Is performed. Var compensator (6) first to output the reactive power Q C which corresponds to Q M of the above formula described above in
This is the same as the embodiment.

このように負荷電圧Vの電圧変動VDを検出し、電圧変
動の許容値ΔVLIMITに相当する。QLIMITからVDに相当す
る無効電力QDを差引いたものを積分演算しているため無
効電力補償装置(6)の出力QCを徐々に低下するに伴な
い負荷電圧Vが低下してくるがVLIMITより低くなろうと
すると積分回路(33)の入力((QN−QD)が負になり、
積分回路(33)の出力QVはそれ以上補償容量QCを低下さ
せないように動作するため電圧変動許容値を超える電圧
の低下は防止される。一方、電圧調整器(20)のタップ
切替え下限値はVLIMITを超えない範囲で設定しているの
でタップ制御回路の応答が追いついた時点でタップが上
昇し負荷電圧Vが補償されていくのは第1の実施例と同
様である。
Thus to detect a voltage variation V D of the load voltage V, corresponding to the allowable value [Delta] V LIMIT of the voltage fluctuation. Accompanied with no load voltage V is lowered to gradually reduce the output Q C of the reactive power compensator (6) for the Q LIMIT are integral operation using minus the reactive power Q D corresponding to V D Is going to be lower than V LIMIT, the input ((Q N −Q D ) of the integrator (33) becomes negative,
Output Q V of the integrating circuit (33) decrease in the voltage exceeding the allowable voltage fluctuation to operate so as not to reduce the more compensation capacitor Q C is prevented. On the other hand, the tap switching lower limit of the voltage regulator (20) is set within the range not exceeding V LIMIT , so the tap rises and the load voltage V is compensated when the response of the tap control circuit catches up. This is the same as the first embodiment.

なお、上記実施例では無効電力補償装置としてアクテ
ィブフィルタを用いた場合について示したが、サイリス
タスイッチでコンデンサやリアクトルを制御する方式の
無効電力補償装置であっても良い。また、電圧調整器と
してはタップ切替え方式に限らず、他の電圧を制御する
手段であっても良く、上記実施例と同様の効果を奏す
る。
In the above embodiment, the case where an active filter is used as the reactive power compensating device has been described. However, a reactive power compensating device in which a thyristor switch controls a capacitor or a reactor may be used. Further, the voltage regulator is not limited to the tap switching method, but may be a unit for controlling another voltage, and has the same effect as the above embodiment.

〔発明の効果〕〔The invention's effect〕

以上のように、この発明によれば負荷の変動により生
じる電圧変動のうち配電線のリアクタンス分により生じ
るものは無効電力補償装置により補償し、また、配電線
の抵抗分により生じるものは電圧調整器により補償する
ように構成したので電源側の力率を改善でき、配電線の
抵抗分で消費する損失を低減することができるという効
果がある。
As described above, according to the present invention, of the voltage fluctuations caused by the load fluctuations, those caused by the reactance of the distribution line are compensated by the reactive power compensator, and those caused by the resistance of the distribution line are compensated by the voltage regulator. Therefore, the power factor on the power supply side can be improved, and the loss consumed by the resistance of the distribution line can be reduced.

【図面の簡単な説明】[Brief description of the drawings]

第1図はこの発明の第1の実施例による電圧変動補償装
置を示す回路図、第2図(a)(b)(c)は上記第1
の実施例の動作を示す動作タイムチャート、第3図はこ
の発明の第2の実施例による電圧変動補償装置を示す回
路図、第4図(a)(b)(c)は上記第2の実施例の
動作を示す動作タイムチャート、第5図は従来の電圧変
動補償装置を示す回路図、第6図は無効電力補償装置の
構成図、第7図はアクティブフィルタの等価回路、第8
図(a)(b)はアクティブフィルタの出力関係を示す
波形図、第9図(a)(b)(c)は従来の電圧変動補
償装置の動作を示す動作タイムチャートである。 (1)は電源、(2)は抵抗、(3)はリアクタンス、
(4)は負荷側母線、(5)は負荷、(6)は無効電力
補償装置、(7)は制御装置、(8)は変流器、(9)
は変成器、(10)はリアクトル、(11)はトランジスタ
スイッチ、(12)はコンデンサ、(13)は変流器、(1
4)は検出回路、(15)は電流制御回路、(16)はPWM回
路、(17)はタップ切替器、(18)は電圧変成器、(1
9)はタップ制御回路、(20)は(17)〜(19)で構成
される電圧調整器、(21)は負荷側無効電力検出回路、
(22)は負荷側有効電力検出回路、(23)は電流変成
器、(24)は電源側無効電力検出回路、(25)は積分回
路、(26)は補償容量演算回路、(27)は電流制御回
路、(28)はPWM回路、(29)は電圧変動検出回路、(3
0)は変換回路、(31)はリミッタ回路、(32)は減算
回路、(33)は積分回路。 なお、図中、同一符号は同一、又は相当部分を示す。
FIG. 1 is a circuit diagram showing a voltage fluctuation compensator according to a first embodiment of the present invention, and FIGS. 2 (a), 2 (b) and 2 (c) show the first embodiment.
FIG. 3 is a circuit diagram showing a voltage fluctuation compensating apparatus according to a second embodiment of the present invention, and FIGS. 4 (a), (b) and (c) show the operation of the second embodiment. FIG. 5 is a circuit diagram showing a conventional voltage fluctuation compensator, FIG. 6 is a block diagram of a reactive power compensator, FIG. 7 is an equivalent circuit of an active filter, FIG.
9A and 9B are waveform diagrams showing the output relationship of the active filter, and FIGS. 9A, 9B and 9C are operation time charts showing the operation of the conventional voltage fluctuation compensator. (1) is power supply, (2) is resistance, (3) is reactance,
(4) load side bus, (5) load, (6) reactive power compensator, (7) controller, (8) current transformer, (9)
Is a transformer, (10) is a reactor, (11) is a transistor switch, (12) is a capacitor, (13) is a current transformer, (1)
4) is a detection circuit, (15) is a current control circuit, (16) is a PWM circuit, (17) is a tap changer, (18) is a voltage transformer, (1)
9) is a tap control circuit, (20) is a voltage regulator composed of (17) to (19), (21) is a load-side reactive power detection circuit,
(22) is a load-side active power detection circuit, (23) is a current transformer, (24) is a power supply-side reactive power detection circuit, (25) is an integration circuit, (26) is a compensation capacity calculation circuit, and (27) is Current control circuit, (28) PWM circuit, (29) voltage fluctuation detection circuit, (3
0) is a conversion circuit, (31) is a limiter circuit, (32) is a subtraction circuit, and (33) is an integration circuit. In the drawings, the same reference numerals indicate the same or corresponding parts.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 馬場 喜裕 愛知県名古屋市瑞穂区西ノ割町3丁目21 番地 (72)発明者 竹田 正俊 兵庫県神戸市兵庫区和田崎町1丁目1番 2号 三菱電機株式会社神戸製作所内 (72)発明者 熊谷 剛 兵庫県神戸市兵庫区和田崎町1丁目1番 2号 三菱電機株式会社神戸製作所内 (56)参考文献 特開 昭56−159936(JP,A) 特開 昭61−98126(JP,A) ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshihiro Baba 3-21 Nishinowari-cho, Mizuho-ku, Nagoya-shi, Aichi (72) Inventor Masatoshi Takeda 1-1-1, Wadazaki-cho, Hyogo-ku, Kobe-shi, Hyogo Mitsubishi Electric Corporation Kobe Works (72) Inventor Tsuyoshi Kumagai 1-1-2 Wadazakicho, Hyogo-ku, Kobe City, Hyogo Prefecture Mitsubishi Electric Corporation Kobe Works (56) References JP-A-56-159936 (JP, A) JP-A-61-98126 (JP, A)

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】電源から母線を経て負荷に電力を供給する
系統にあって、 前記母線に接続され前記系統の無効電力を補償する無効
電力補償装置と、 この無効電力補償装置の母線との接続点より電源側に接
続され母線電圧の変動を補償する電圧調整器と、 前記負荷の有効成分および無効成分の変化を検出して前
記無効電力補償装置の出力を制御する第1の制御回路
と、 前記無効電力補償装置の電源側の無効電力を検出し、こ
の無効電力を一定値にするよう前記無効電力補償装置の
出力を制御する第2の制御回路と、 前記母線の電圧の変化を一定範囲内に抑制するように前
記電圧調整器を制御する電圧制御回路とを備え、 負荷が変化すると前記第1の制御回路により前記無効電
力補償装置の出力を母線の電圧が変動しないように制御
すると共に、 電源側の無効電力を前記第2の制御回路により所望の値
に制御するようにし、 電源側の無効電力を前記所望値に制御する結果生じる母
線の電圧変動を前記電圧制御回路により前記電圧調整器
を制御して電圧変動を補償するようにしたことを特徴と
する電圧変動補償装置。
1. A system for supplying power from a power source to a load via a bus, the system comprising: a reactive power compensator connected to the bus for compensating reactive power of the system; and connection of the reactive power compensator to the bus. A voltage regulator connected to a power supply side from a point and compensating for a change in bus voltage; a first control circuit that detects a change in an effective component and an invalid component of the load and controls an output of the reactive power compensator; A second control circuit that detects reactive power on the power supply side of the reactive power compensator and controls an output of the reactive power compensator so that the reactive power is set to a constant value; And a voltage control circuit for controlling the voltage regulator so as to suppress the output of the reactive power compensator when the load changes. The reactive power on the power supply side is controlled to a desired value by the second control circuit, and the voltage regulation of the bus resulting from controlling the reactive power on the power supply side to the desired value is controlled by the voltage regulator by the voltage control circuit. A voltage fluctuation compensating device, wherein the voltage fluctuation is compensated by controlling the voltage fluctuation.
【請求項2】前記第1項の電圧変動補償装置に、母線電
圧を検出する母線電圧検出回路と、 母線電圧が一定値を超えたときに、前記第2の制御回路
の動作を制限するように作用する無効電力制限回路とを
備え、 負荷が変化すると、前記第1の制御回路により前記無効
電力補償装置の出力を母線の電圧が変動しないように制
御すると共に、 電源側の無効電力を前記第2の制御回路により所望の値
に制御するようにし、 その際生じる母線の電圧変動が一定値を超えると前記無
効電力制限回路で前記第2の制御回路の動作を制限する
ようにしたことを特徴とする電圧変動補償装置。
2. A voltage fluctuation compensating apparatus according to claim 1, wherein a bus voltage detecting circuit for detecting a bus voltage, and an operation of said second control circuit when the bus voltage exceeds a predetermined value. The first control circuit controls the output of the reactive power compensator so that the bus voltage does not fluctuate when the load changes, and reduces the reactive power on the power supply side. The second control circuit controls the voltage to a desired value, and the reactive power limiting circuit limits the operation of the second control circuit when the resulting voltage fluctuation of the bus exceeds a certain value. Characteristic voltage fluctuation compensator.
JP1189195A 1989-07-21 1989-07-21 Voltage fluctuation compensator Expired - Lifetime JP2644590B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1189195A JP2644590B2 (en) 1989-07-21 1989-07-21 Voltage fluctuation compensator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1189195A JP2644590B2 (en) 1989-07-21 1989-07-21 Voltage fluctuation compensator

Publications (2)

Publication Number Publication Date
JPH0356035A JPH0356035A (en) 1991-03-11
JP2644590B2 true JP2644590B2 (en) 1997-08-25

Family

ID=16237112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1189195A Expired - Lifetime JP2644590B2 (en) 1989-07-21 1989-07-21 Voltage fluctuation compensator

Country Status (1)

Country Link
JP (1) JP2644590B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08103025A (en) * 1994-09-30 1996-04-16 Mitsubishi Electric Corp Load management controller

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56159936A (en) * 1980-05-09 1981-12-09 Sanken Electric Co Ltd Method of controlling electric power
JPS6198126A (en) * 1984-10-19 1986-05-16 株式会社東芝 Voltage controller

Also Published As

Publication number Publication date
JPH0356035A (en) 1991-03-11

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