JPH0356035A - Voltage fluctuation compensator - Google Patents

Voltage fluctuation compensator

Info

Publication number
JPH0356035A
JPH0356035A JP18919589A JP18919589A JPH0356035A JP H0356035 A JPH0356035 A JP H0356035A JP 18919589 A JP18919589 A JP 18919589A JP 18919589 A JP18919589 A JP 18919589A JP H0356035 A JPH0356035 A JP H0356035A
Authority
JP
Japan
Prior art keywords
voltage
reactive power
power
compensator
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18919589A
Other languages
Japanese (ja)
Other versions
JP2644590B2 (en
Inventor
Yoshinari Furukawa
古川 吉成
Masuo Yamada
山田 満寿夫
Akira Matsui
亮 松井
Yoshihiro Baba
馬場 喜裕
Masatoshi Takeda
正俊 竹田
Takeshi Kumagai
剛 熊谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chubu Electric Power Co Inc
Mitsubishi Electric Corp
Original Assignee
Chubu Electric Power Co Inc
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chubu Electric Power Co Inc, Mitsubishi Electric Corp filed Critical Chubu Electric Power Co Inc
Priority to JP1189195A priority Critical patent/JP2644590B2/en
Publication of JPH0356035A publication Critical patent/JPH0356035A/en
Application granted granted Critical
Publication of JP2644590B2 publication Critical patent/JP2644590B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Supply And Distribution Of Alternating Current (AREA)

Abstract

PURPOSE:To improve a power factor of a power source side by compensating a voltage variation generated by reactance of a power distribution line of a voltage fluctuation generated due to a fluctuation of a load by a reactive power compensator and a voltage variation generated by resistance of the line by a voltage regulator. CONSTITUTION:When a load 5 is connected, a load side reactive power Q is detected in a CT 8 by a detector 21, a load side effective power P is detected in the CT 8 and a PT 9 by a detector 22, and input to a compensating capacity calculator 26. On the other hand, a reactive power Q0 of a power source side is detected from a CT 23 by a detector 24, integrated by a time constant TI to become QI, which is input to the calculator 26. The calculator 26 obtains a current reference signal QM from the data P, Q, Q0, drives a PWM circuit 28 through a current controller 27, its output compensates the reactive power by a compensator 6, and a reactive power -jQC equal to the reference QM is supplied. When the output QI is increased by the constant TI, the signal QM is lowered, the power QC is lowered, a load voltage V is also lowered, but it is compensated by switching the tap of a voltage regulator 20. Thus, the power factor of a power source side is improved, and a loss due to a resistance is reduced.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は配電系統の電圧変動を防止するための電圧変
動補償装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a voltage fluctuation compensator for preventing voltage fluctuations in a power distribution system.

〔従来の技術〕[Conventional technology]

第5図は例えば三菱電機技報Vo 1. 62,隔6,
 1988,?15〜20  論文「アクティブフィル
タとその応用」に開示された従来の電圧変動補償装置を
示す回路図である。図において(1)は電源、(2)お
よび(3)は電源系統に存在するそれぞれ抵抗Rおよび
リアクタンスX,(4)は負荷側母線で、その電圧Vが
補償すべき対象の負荷電圧である。(5)はその電力が
変動する負荷、そして(6)が負荷(5)と並列に負荷
側母線(4)に接続された無効電力補償装置、(7)は
負荷検出手段である変流器(8)および変成器(9)か
らの検出出力をもとに無効電力補償装置(6)の出力無
効電力−jQcを制御する制御装置である。
FIG. 5 shows, for example, Mitsubishi Electric Technical Report Vol. 1. 62, interval 6,
1988,? 15-20 is a circuit diagram showing a conventional voltage fluctuation compensator disclosed in the paper "Active filter and its application". In the figure, (1) is the power supply, (2) and (3) are the resistance R and reactance X present in the power supply system, respectively, and (4) is the load side bus, whose voltage V is the load voltage to be compensated. . (5) is a load whose power fluctuates, (6) is a reactive power compensator connected to the load side bus (4) in parallel with load (5), and (7) is a current transformer that is a load detection means. This is a control device that controls the output reactive power -jQc of the reactive power compensator (6) based on the detection outputs from the transformer (8) and the transformer (9).

上記無効電力補償装置(6)は例えば第6図に示すよう
に自動式インバータを用いたアクティブフィルタで構成
される。第6図はアクティブフィルタの回路構成を示す
図であり(10a)〜(IOC)はりアクトル、(11
a)〜(llf)はトランジスタスイッチ、(6)はコ
ンデンサ、(13a)と(13b)はアクティブフィル
タの出力電力を検出するための変流器である。また、制
御装11(7)は次の回路で構成される。a<は変或器
(9)で検出された電圧■と変流器(8)で検出された
電流挾を入力し負荷の有効電力Pと無効電力Qを検出す
る検出回路、Q5は検出回路a<の出力値を基準信号と
し、変流器μsで検出された電流ICをフィードバック
信号として出力電流を制御する電流制御回路、CIQは
電流制御回路四の出力信号を変調するためのPWM回路
であり、その出力はトランジスタスイッチ(11a)〜
(1lf)のON − OFF信号としてアクティブフ
ィルタ(6)へ与えられる。
The reactive power compensator (6) is composed of an active filter using an automatic inverter, as shown in FIG. 6, for example. FIG. 6 is a diagram showing the circuit configuration of the active filter, with beam actors (10a) to (IOC), (11
a) to (llf) are transistor switches, (6) is a capacitor, and (13a) and (13b) are current transformers for detecting the output power of the active filter. Further, the control device 11 (7) is composed of the following circuit. a< is a detection circuit that inputs the voltage detected by the transformer (9) and the current detected by the current transformer (8) to detect the active power P and reactive power Q of the load, and Q5 is the detection circuit A current control circuit uses the output value of a< as a reference signal and uses the current IC detected by the current transformer μs as a feedback signal to control the output current. CIQ is a PWM circuit for modulating the output signal of the current control circuit 4. Yes, the output is from the transistor switch (11a)
(1lf) is applied to the active filter (6) as an ON-OFF signal.

次に動作について説明する。第6図においてコンデンサ
(転)に充電されている直流電圧Edはトランジスタス
イッチ(IXa)〜(llf)によりPWM変調され、
v!なる交流電圧に変換される。
Next, the operation will be explained. In FIG. 6, the DC voltage Ed charged in the capacitor (transistor) is PWM modulated by transistor switches (IXa) to (llf),
v! It is converted into an AC voltage.

この電圧■はリアクトルClOを介して負荷側母線(4
)に供給される。従って、アクティブフィルタ(6)の
動作は第7図の等価回路で表わすことができ、第8図(
a)に示すようにアクティブフィルタの出力庫圧Vxを
負荷母.il91[圧Vより大きくすると進相無効電力
をアクティブフィルタに流し、また、同図(b)に示す
ようにアクティブフィルタの出力電圧Vxを負荷母線電
圧Vより小さくすると遅相無効電力をアクティブフィル
タに流すように動作する。
This voltage ■ is applied to the load side bus (4) via the reactor ClO.
). Therefore, the operation of the active filter (6) can be expressed by the equivalent circuit shown in FIG.
As shown in a), the output chamber pressure Vx of the active filter is set to the load mother. il91 [If the voltage is greater than V, the leading phase reactive power will flow to the active filter, and as shown in the same figure (b), if the output voltage Vx of the active filter is smaller than the load bus voltage V, the lagging reactive power will flow to the active filter. It works as if it were flowing.

次に無効電力補償装置(6)による電圧変動補償方法に
ついて説明する。第9図は負荷電圧V、補償無効電力Q
O及び電源側無効電力Qoの時間経過を示したタイムチ
ャート図である。今、電源系統の抵抗をR(%)(1o
MVAベース)、リアクタンスをX(%)(1oMVA
ベース)とし、時刻T = T1まで無負荷であったも
のが、時刻’r=’r,で有効電力P(KW)、無効電
力Q(KVAR)の負荷が投入されたとする。この負荷
投入により、負荷電圧Vは次式で示すΔVだけ降下する
。(第9図(a))ΔV=CR−P+X−Q)x 10
−’制御装置(7)はこの負荷のPとQ検出回路αΦに
より検出して直ちに電流制御回路α9及びPWM制御回
路QQを調整し、上記電圧降下△Vを零にするように次
式で求まる進相無効電力Qo (KVAR)を時刻T,
以降に無効電力補償装置(6)に流す。(第9図中)) △V= [R−P+X・(Q−QC)l ×lQ−’=
Q従って、 R QC=Q十X−P (KVAR) この結果、電源側に流れる無効電力Qoは進相となって
継続する。(第9図(C)) そしてこの進みはR/Xの値が大きくなるほど大きくな
り、電源側力率が悪化することになる。
Next, a voltage fluctuation compensation method using the reactive power compensator (6) will be explained. Figure 9 shows load voltage V, compensation reactive power Q
FIG. 2 is a time chart diagram showing the passage of time of O and power supply side reactive power Qo. Now, set the resistance of the power supply system to R (%) (1o
MVA base), reactance as X (%) (1o MVA
It is assumed that a load of active power P (KW) and reactive power Q (KVAR) is applied at time 'r='r, which was unloaded until time T = T1 (base). By applying this load, the load voltage V drops by ΔV expressed by the following equation. (Figure 9(a)) ΔV=CR-P+X-Q)x 10
-'The control device (7) detects this load using the P and Q detection circuit αΦ and immediately adjusts the current control circuit α9 and PWM control circuit QQ, and calculates the above voltage drop △V to zero using the following equation. Phase leading reactive power Qo (KVAR) at time T,
Thereafter, it is passed to the reactive power compensator (6). (in Figure 9)) △V= [R-P+X・(Q-QC)l ×lQ-'=
Q Therefore, R QC=Q1X-P (KVAR) As a result, the reactive power Qo flowing to the power supply side continues to advance in phase. (FIG. 9(C)) This advance increases as the value of R/X increases, and the power factor on the power source side deteriorates.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来の電圧補償装置は以上のように構成されているので
、負荷電圧を一定に保とうとすると、電源側の抵抗分R
による電圧降下をも補償する必要があるために進相無効
電力を過補償する必要があり、電源側の力率が悪化させ
ると共に電源インピーダンスによる電力損失を増加させ
るという課題があった。
Since the conventional voltage compensator is configured as described above, when trying to keep the load voltage constant, the resistance R on the power supply side
Since it is necessary to also compensate for the voltage drop caused by the power source, it is necessary to overcompensate for the phase-advancing reactive power, which poses a problem of deteriorating the power factor on the power source side and increasing power loss due to power source impedance.

この発明は以上のような課題を解消するためになされた
もので、電源側の力率の悪化を防止し、かつ負荷電圧の
変動を補償することができる電圧補償装置を得ることを
目的とする。
This invention was made to solve the above-mentioned problems, and its purpose is to obtain a voltage compensator that can prevent deterioration of the power factor on the power source side and compensate for fluctuations in load voltage. .

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係る電圧補償装置は無効電力補償装置に加え
て電源の配電線路側に線路電圧の大きさを検出して自動
的に負荷電圧の変動を補償する電圧調整装置を備えたも
のであり、負荷電力変動による電圧変動のうち有効成分
によるものは上記電圧調整装置で補償し、無効成分によ
るものは上記無効電力補償装置で補償するようにしたも
のである。
In addition to the reactive power compensator, the voltage compensator according to the present invention is equipped with a voltage regulator on the distribution line side of the power supply that detects the magnitude of the line voltage and automatically compensates for fluctuations in the load voltage, Among voltage fluctuations due to load power fluctuations, those due to active components are compensated by the voltage regulator, and those due to reactive components are compensated by the reactive power compensator.

〔作用〕[Effect]

この発明における電圧補償装置は負荷の過渡的な変化に
よる電圧変動分は速応性を有する無効電力補償装置で全
領域を補償するようにし、定常状態に達すると無効電力
袖償装置の補償領域を徐々に減じていき問題のない範囲
で電′g電圧変動を少し生じさせることにより電圧調整
装置の動作を誘導するようにして定常的には有効成分に
よる電圧変動は電圧調整装置で、また無効成分による電
圧変動は無効電力補償装置により補償できるようにした
ものである。
The voltage compensator in this invention uses a reactive power compensator to compensate for voltage fluctuations caused by transient changes in the load over the entire range, and when a steady state is reached, the compensation range of the reactive power compensator is gradually increased. In order to induce the operation of the voltage regulator by causing a small voltage fluctuation within a range that does not cause any problems, the voltage fluctuation due to the active component is constantly controlled by the voltage regulator, and the voltage fluctuation due to the reactive component is constantly controlled by the voltage regulator. Voltage fluctuations can be compensated for by a reactive power compensator.

〔発明の実施例〕[Embodiments of the invention]

以下、この発明の一実施例を図について説明する。第1
図において、Q7)はタップ切替器、(ト)は電圧変成
器、α0はタップ制御回路、(1)はQ7)〜α9で構
成される電圧調整器である。また、Cυは負荷(5)の
無効電力を検出する負荷側無効電力検出回路、@は負荷
(5)の有効電力を検出する負荷側有効電力検出回路、
(至)は電源側の電流を検出する電流変成器、(至)は
電源側の無効電力を検出する電源側無効電力検出回路、
(至)は積分回路、(ホ)は補償容量演算回路、(イ)
は補償容量演算回路(至)の出力値を基準信号とし、変
流器αJで検出された電流Icをフィードバック信号と
して出力電流を制御する電流制御回路である。
An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, Q7) is a tap changer, (G) is a voltage transformer, α0 is a tap control circuit, and (1) is a voltage regulator composed of Q7) to α9. In addition, Cυ is a load-side reactive power detection circuit that detects the reactive power of the load (5), @ is a load-side active power detection circuit that detects the active power of the load (5),
(To) is a current transformer that detects the current on the power supply side, (To) is a power supply side reactive power detection circuit that detects reactive power on the power supply side,
(To) is an integration circuit, (E) is a compensation capacitance calculation circuit, (A)
is a current control circuit that uses the output value of the compensation capacitance calculation circuit (to) as a reference signal and controls the output current using the current Ic detected by the current transformer αJ as a feedback signal.

また、(至)は電流制御回路のの出力信号を変調するた
めのPWM回路であり、その出力はトランジスタスイッ
チ(11a)〜(11f)のON−OFF信号としてア
クティブフィルタ(りへ与えられる。
Further, (to) is a PWM circuit for modulating the output signal of the current control circuit, and its output is given to the active filter as ON-OFF signals of the transistor switches (11a) to (11f).

次に動作について説明する。従来の装置との動作の違い
を説明するために第9図と同様のタイムチャートを用い
て第2図で説明する。第2図において時刻T = T1
まで無負荷であったもので時刻T”Ttで有効電力P(
KW)、無効電力−(KVAR)の負荷が投入されると
時刻1゛2以降に負荷側無効電カリυにより無効電力q
を検出し、負荷側有効電力検出回路@により有効電力P
を検出する。
Next, the operation will be explained. In order to explain the difference in operation from the conventional device, explanation will be given with reference to FIG. 2 using a time chart similar to that of FIG. 9. In Fig. 2, time T = T1
The active power P(
KW), reactive power - (KVAR) is turned on, and after time 1゛2, the reactive power q is increased by the reactive power potency υ on the load side.
is detected, and the active power P is detected by the load side active power detection circuit @
Detect.

一方、無効電力袖償装置(6)の接点より電源側の電流
を検出する電流変成器のを介して検出した電流を入力と
して電源側無効電力検出回路(ハ)で電源側無効電力Q
oを求める。電源側無効電力検出回路例の出力QOは次
段の徐分回路四へ入力され、時定数Ttで積分された後
、積分出力Qlを補償容量演算回路(ホ)へ入力する。
On the other hand, the power supply side reactive power Q
Find o. The output QO of the example of the power supply side reactive power detection circuit is input to the next stage gradual dividing circuit 4, and after being integrated with a time constant Tt, the integrated output Ql is input to the compensation capacitance calculation circuit (E).

補償容量演算回路(至)では次式の演算を行う。The compensation capacitance calculation circuit (to) calculates the following equation.

この補償容量演算回路の出力QMは電流基準信号として
次段の電流制御回路@へ入力され、電流制御回路(4)
とPWM回路のにより無効電力補償装置(6)にQMに
等しい無効1K力一jQcを流すように制御するのは第
5図に示す従来の無効電力補償装置と同様である。
The output QM of this compensation capacitance calculation circuit is input as a current reference signal to the current control circuit @ of the next stage, and the current control circuit (4)
This is similar to the conventional reactive power compensator shown in FIG. 5, and the PWM circuit controls the reactive power compensator (6) so that a reactive 1K force jQc equal to QM flows through the reactive power compensator (6).

時間T2の直後においては時定数の関係で積分回路(至
)はまだその出力QIがほとんどOの状態になっている
ので、T2直後の補償容量演算回路1浦の出力は R Q M = Q +( x ) P を出力することになり、従って無効電力補償装置の出力
QOも第2図(b)のように を出力することになる。この結果、負荷(5)のPとQ
による電圧降下をOに抑えるように動作することは従来
の無効電力補償装置と同様である。
Immediately after time T2, the output QI of the integrating circuit (to) is still almost O due to the time constant, so the output of compensation capacitance calculation circuit 1 immediately after T2 is R Q M = Q + (x)P, and therefore the output QO of the reactive power compensator will also be as shown in FIG. 2(b). As a result, P and Q of load (5)
It is similar to the conventional reactive power compensator that it operates so as to suppress the voltage drop due to the voltage drop to O.

第2図(C)に示すように、この場合には電源側の無効
電力QOは となるが、この無効電力Qoは電源側無効電力検出回路
@で検出され積分回路@において、時定数TIで積分さ
れるため、積分回路@の出力QIは補償容量演算回路(
ニ)において、減算され次式のような演算を行う。
As shown in Fig. 2 (C), in this case, the reactive power QO on the power supply side becomes .This reactive power Qo is detected by the power supply side reactive power detection circuit @, and is processed by the time constant TI in the integration circuit @. Since it is integrated, the output QI of the integration circuit @ is output by the compensation capacitance calculation circuit (
In (d), subtraction is performed and the following calculation is performed.

従って時刻T2以降で積分回路@の出力QIが時定数T
xで増加してくるにつれ徐々にQMが減少し、無効電力
補償装置(6)の出力QCは徐々に低下してくることに
なる。この結果、第2図(a)に示すように負荷電圧V
もQcの低下に伴って徐々に下がってくるが、負荷電圧
Vの低下は電圧調整器四の電圧変成器(1呻により検出
されタップ制御回路αりに入力される。タップ切替えの
下限値VLに達した時にタップ制御回路四はタップ切替
え器αカにタップ上昇信号を出力し、時刻T,において
タップを一段上げるように動作する。この結果、負荷電
圧Vは第2図に示すように時刻T,においてタップ上昇
分ΔVsだけ上昇する。時刻T3以降さらに無効電力補
償装置(6)の出力Qoが減少してくると再び負荷電圧
Vは時刻T4においてタップ切替えの下限値VLに達す
ると再びもう一段タップを上げて電圧をΔVsだけ更に
持上げるように動作する。このようにして無効電力補償
装置の出力QOを徐々に減少させそれによる電圧の低下
分を電圧調整器(1)のタップを上げることにより負荷
電圧は一定範囲内に入るように動作することになる。無
効電力補償装置(6)の出力QOを減少させていくと電
源側の無効電力Qoは徐々に低下して来、定常的にはQ
oが0になった時に積分回路(ニ)は積分動作を停止す
るため無効電力補償装置(6)の出力QOはそれ以上は
減少せず、Wl源側の無効電力Qoを0にした状態で落
ちつくことになる。従って、定常的には無効電力補償装
置(6)の出力はQo = Qt.となり、また電源側
の無効電力Qo=oとなる。この結果、電源インピーダ
ンスによる電圧降下のうちリアクタンス分Xによる電圧
降下X.Qは無効竃力袖償装置Qaにより補償し、抵抗
分Rによる電圧降下R−Pは電圧調整装@四で補償でき
ることになる。
Therefore, after time T2, the output QI of the integrating circuit @ is the time constant T.
As x increases, QM gradually decreases, and the output QC of the reactive power compensator (6) gradually decreases. As a result, the load voltage V
also gradually decreases as Qc decreases, but the decrease in load voltage V is detected by the voltage transformer (1) of the voltage regulator and is input to the tap control circuit α.The lower limit value VL of the tap switching When the tap reaches T, the tap control circuit 4 outputs a tap increase signal to the tap changer α, and operates to raise the tap by one step at time T. As a result, the load voltage V increases at the time as shown in FIG. At time T, the load voltage V increases by the tap increase amount ΔVs.After time T3, the output Qo of the reactive power compensator (6) further decreases, and when the load voltage V reaches the lower limit value VL for tap switching at time T4, it increases again. It operates to raise the voltage by ΔVs by raising the tap one step.In this way, the output QO of the reactive power compensator is gradually decreased, and the tap of the voltage regulator (1) is raised to compensate for the resulting voltage drop. As a result, the load voltage is operated to be within a certain range.As the output QO of the reactive power compensator (6) is decreased, the reactive power Qo on the power supply side gradually decreases and becomes steady. Q
When o becomes 0, the integrating circuit (d) stops the integrating operation, so the output QO of the reactive power compensator (6) does not decrease any further, and the reactive power Qo on the Wl source side is set to 0. It will calm down. Therefore, on a steady basis, the output of the reactive power compensator (6) is Qo = Qt. In addition, the reactive power Qo on the power supply side is equal to o. As a result, the voltage drop due to the reactance X out of the voltage drop due to the power source impedance is X. Q is compensated by the reactive power compensation device Qa, and the voltage drop RP due to the resistance R can be compensated by the voltage regulator @4.

上述の第1の実施例では無効電力補償装@(6)の出力
QOを減少させる時定数は積分回路@の時定数TXによ
り決まり、もし、電圧調整器(7)のタップ切替えに要
する時間遅れが上記時定数TIに比べて長いような場合
にはタップの切替えのための応答時間が無効電力補償装
置(6)の出力QCの低下の時定数に追いつかず、その
結果、負荷電圧■を必要以上に低下させてしまう可能性
がある。これを解決したのがこの発明の第2の実施例で
あり、第2の実施例を示す回路図を第3図に示す。
In the first embodiment described above, the time constant for reducing the output QO of the reactive power compensator @ (6) is determined by the time constant TX of the integrating circuit @, and if the time delay required for tap switching of the voltage regulator (7) is longer than the above time constant TI, the response time for tap switching cannot catch up with the time constant of the drop in the output QC of the reactive power compensator (6), and as a result, the load voltage ■ There is a possibility that it may be lowered by more than that. A second embodiment of the present invention solves this problem, and a circuit diagram showing the second embodiment is shown in FIG.

第3図では第1図の第1の実施例に加えて電圧変動検出
回路囚、変換回路(1)、リミッタ回路則、減算回路■
及び積分回路(至)が追加されている。
In addition to the first embodiment shown in Fig. 1, Fig. 3 shows a voltage fluctuation detection circuit, a conversion circuit (1), a limiter circuit rule, and a subtraction circuit.
and an integration circuit (to) have been added.

以下にこの動作について説明する。第4図の時刻T1で
負荷が投入されると、まず負荷無効電力検出回till
)と負荷有効電力検出回路のが動作し、無効電力補償装
置の出力Qoは時刻T2の直後において となり負荷(5)のPとQによる電圧降下を0に抑える
ように動作する。この後、電源側の無効電力Qoが電源
側無効電力検出回路ので検出され積分回路(至)におい
て時定数Ttで積分される。
This operation will be explained below. When the load is turned on at time T1 in FIG. 4, first the load reactive power detection circuit till
) and the load active power detection circuit operate, and the output Qo of the reactive power compensator becomes immediately after time T2, and operates so as to suppress the voltage drop due to P and Q of the load (5) to zero. Thereafter, the reactive power Qo on the power source side is detected by the power source side reactive power detection circuit and integrated with the time constant Tt in the integrating circuit (to).

積分回路@の出力QIは補償容量演算回路(ホ)におい
て ?演算を行うことにより時刻T,以降で積分回路■■■
の出力QIが時定数TIで増加してくるにつれて徐々に
QMが減少し、無効電力補償装置(6)の出力吻は第4
図(b)のように徐々に低下してくる。この結果、第4
図(a)のように負荷屯圧■はQOの低下に伴って徐々
に下ってくるが、この負荷電圧Vの低下分は電圧変動検
出回路四で検出され、その検出値VDは次段の変換回路
C+υへ入力され、VDに相当した無効電力量QD (
但しQD=X−VD)に変換される。一方、電源側無効
電力検出回路(ハ)の出力Qoはリミッタ回路0υへ入
力され、その出力QNは Qo≧+QLIMITの時はQN=+QLIMIT+Q
LIMIT >QO >QLIMIT(D時はQN =
 Qo−QLIMIT>QOの時はQN:−QLIMI
TとなるようにQoの上限値と下限値に制限が与えられ
る。
What is the output QI of the integrating circuit @ in the compensation capacitance calculation circuit (e)? By performing the calculation, the integral circuit is formed at time T and thereafter.■■■
As the output QI of the var.
It gradually decreases as shown in Figure (b). As a result, the fourth
As shown in Figure (a), the load pressure ■ gradually decreases as the QO decreases, but this decrease in the load voltage V is detected by the voltage fluctuation detection circuit 4, and the detected value VD is used in the next stage. The reactive power QD (
However, it is converted to QD=X-VD). On the other hand, the output Qo of the power supply side reactive power detection circuit (c) is input to the limiter circuit 0υ, and its output QN is QN=+QLIMIT+Q when Qo≧+QLIMIT
LIMIT >QO >QLIMIT (QN = when D
When Qo-QLIMIT>QO, QN:-QLIMI
A limit is given to the upper limit value and lower limit value of Qo so that T.

ここでQoの制限値QLIMITは次のように決定され
る。
Here, the Qo limit value QLIMIT is determined as follows.

ΔVtrMtr = X−QLIMIT但し、ΔVLI
MITは負荷電圧■の許容変動巾、Xは配電線のりアク
タンス分、リミツタ回路6節の出力QNは次段の減算回
路■において変換回路囚の出力QDと減算され、減算回
路(1)の出力(QN−QD)が積分回路(至)におい
て時定数Tvで積分される。
ΔVtrMtr = X-QLIMIT However, ΔVLI
MIT is the permissible fluctuation width of the load voltage (■), X is the distribution line actance, and the output QN of the limiter circuit No. 6 is subtracted from the output QD of the converter circuit in the next stage subtraction circuit (■), and the output of the subtraction circuit (1) is (QN-QD) is integrated by the time constant Tv in the integrating circuit (to).

積分回路一の出力Qvは補償容量演算回路(ホ)に入力
され R QM=Q+(X)・P−Ql−Qv なる演算を行われる。無効電力補償装置(6)では上式
のQMに相当した無効電力QOを出力することは前述の
第1の実施例と同様である。
The output Qv of the integrating circuit 1 is input to the compensation capacitance calculation circuit (e) and is subjected to the calculation RQM=Q+(X)·P-Ql-Qv. The reactive power compensator (6) outputs reactive power QO corresponding to QM in the above equation, as in the first embodiment described above.

このように負荷電圧■の電圧変動VDを検出し、電圧変
動の許容値ΔVLIMIT に相当する。QLIMIT
からVDに相当する無効電力QDを差引いたものを積分
演算しているため無効電力補償装置(6)の出力QOを
徐々に低下するに伴ない負荷電圧Vが低下してくるがV
LIMITより低くなろうとすると積分回路ρの入力(
 QN− QD )が負になり、積分回路(至)の出力
Qvはそれ以上補償容量QOを低下させないように動作
するため電圧変動許容値を超える電圧の低下は防止され
る。一方、電圧調整器(7)のタップ切替え下限値はV
LIMITを超えない範囲で設定しているのでタップ制
御回路の応答が追いついた時点でタップが上昇し負荷電
圧Vが補償されていくのは第1の実施例と同様である。
In this way, the voltage fluctuation VD of the load voltage (■) is detected and corresponds to the permissible voltage fluctuation value ΔVLIMIT. QLIMIT
Since the integral calculation is performed after subtracting the reactive power QD corresponding to VD from
When trying to go below LIMIT, the input of the integrating circuit ρ (
QN-QD) becomes negative and the output Qv of the integrating circuit (to) operates so as not to further reduce the compensation capacitance QO, thereby preventing the voltage from dropping beyond the voltage fluctuation tolerance. On the other hand, the tap switching lower limit value of the voltage regulator (7) is V
Since it is set within a range that does not exceed LIMIT, the tap increases and the load voltage V is compensated when the response of the tap control circuit catches up, as in the first embodiment.

なお、上記実施例では無効電力補償装置としてアクティ
ブフィルタを用いた場合について示したが、サイリスタ
スイッチでコンデンサやりアクトルを制御する方式の無
効電力補償装置であっても良い。また、電圧調整器とし
てはタップ切替え方式に限らず、他の電圧を制御する手
段であっても良く、上記実施例と同様の効果を奏する。
In the above embodiment, an active filter is used as the reactive power compensator, but a reactive power compensator using a thyristor switch to control a capacitor or an actuator may also be used. Furthermore, the voltage regulator is not limited to the tap switching type, and may be any other means for controlling voltage, and the same effects as in the above embodiments can be achieved.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば負荷の変動により生じ
る電圧変動のうち配電線のりアクタンス分により生じる
ものは無効電力補償装置により補償し、また、配電線の
抵抗分により生じるものは電圧調整器により補償するよ
うに構成したので電源側の力率を改善でき、配電線の抵
抗分で消費する損失を低減することができるという効果
がある。
As described above, according to the present invention, among the voltage fluctuations caused by load fluctuations, those caused by the actance of the distribution line are compensated by the reactive power compensator, and the voltage fluctuations caused by the resistance of the distribution line are compensated for by the voltage regulator. Since the structure is configured to compensate for this, it is possible to improve the power factor on the power source side, and there is an effect that the loss consumed by the resistance of the distribution line can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の第1の実施例による電圧変動補償装
置を示す回路図、第2図(a) (b) (C)は上記
第1の実施例の動作を示す動作タイムチャート、第3図
はこの発明の第2の実施例による電圧変動補償装置を示
す回路図、第4図(a) (b)(C)は上記第2の実
施例の動作を示す動作タイムチャート、第5図は従来の
電圧変動補償装置を示す回路図、第6図フィルタの出力
関係を示す波形図、第9図(a) (b) (C)は従
来の電圧変動補償装置の動作を示す動作タイムチャート
である。 (1)は電源、(2)は抵抗、(3)はりアクタンス、
(4)は負荷側母線、(5)は負荷、(6)は無効電力
補は装置、(7)は制御装置、(8)は変流器、〈9)
は変成器、αOはりアクトル、aυはトランジスタスイ
ッチ、亜はコンデンサ、αJは変流器、α◆は検出回路
、αiは電流制御回路、Clt9はPWM回路、αカは
タップ切替器、O榎は電圧変成器、Qlはタップ制御回
路、翰は(17)〜α0で構成される電圧調整器、C1
)は負荷側無効電力検出回路、@は負荷側有効電力検出
回路、四は電流変成器、(ニ)は電源側無効電力検出回
路、四は積分回路、(7)は補償容量演算回路、(5)
は電流制御回路、@はPWM回路、翰は電圧変動検出回
路、■は変換回路、0υはリミッタ回路、働は減算回路
、■は積分回路。 なお、図中、同一符号は同一、又は相当部分を示す。
FIG. 1 is a circuit diagram showing a voltage fluctuation compensator according to a first embodiment of the present invention, and FIGS. 3 is a circuit diagram showing a voltage fluctuation compensator according to a second embodiment of the present invention, FIGS. 4(a), (b), and (C) are operation time charts showing the operation of the second embodiment, and FIG. The figure is a circuit diagram showing a conventional voltage fluctuation compensator, Figure 6 is a waveform diagram showing the output relationship of the filter, and Figure 9 (a), (b), and (C) are operating times showing the operation of a conventional voltage fluctuation compensator. It is a chart. (1) is the power supply, (2) is the resistance, (3) the beam actance,
(4) is the load side bus, (5) is the load, (6) is the reactive power supplementary device, (7) is the control device, (8) is the current transformer, <9)
is a transformer, αO beam actor, aυ is a transistor switch, A is a capacitor, αJ is a current transformer, α◆ is a detection circuit, αi is a current control circuit, Clt9 is a PWM circuit, α is a tap changer, Oen is A voltage transformer, Ql is a tap control circuit, and a voltage regulator consisting of (17) to α0 is C1.
) is the load side reactive power detection circuit, @ is the load side active power detection circuit, 4 is the current transformer, (d) is the power supply side reactive power detection circuit, 4 is the integrating circuit, (7) is the compensation capacity calculation circuit, ( 5)
is a current control circuit, @ is a PWM circuit, 翺 is a voltage fluctuation detection circuit, ■ is a conversion circuit, 0υ is a limiter circuit, work is a subtraction circuit, and ■ is an integration circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (2)

【特許請求の範囲】[Claims] (1)電源から母線を経て負荷に電力を供給する系統に
あって、 前記母線に接続され前記系統の無効電力を補償する無効
電力補償装置と、 この無効電力補償装置の母線との接続点より電源側に接
続され母線電圧の変動を補償する電圧調整器と、 前記負荷の有効成分および無効成分の変化を検出して前
記無効電力補償装置の出力を制御する第1の制御回路と
、 前記無効電力補償装置の電源側の無効電力を検出し、こ
の無効電力を一定値にするよう前記無効電力補償装置の
出力を制御する第2の制御回路と、前記母線の電圧の変
化を一定範囲内に抑制するように前記電圧調整器を制御
する電圧制御回路とを備え、 負荷が変化すると前記第1の制御回路により前記無効電
力補償装置の出力を母線の電圧が変動しないように制御
すると共に、 電源側の無効電力を前記第2の制御回路により所望の値
に制御するようにし、 電源側の無効電力を前記所望値に制御する結果生じる母
線の電圧変動を前記電圧制御回路により前記電圧調整器
を制御して電圧変動を補償するようにしたことを特徴と
する電圧変動補償装置。
(1) In a system that supplies power from a power source to a load via a bus, a reactive power compensator that is connected to the bus and compensates for the reactive power of the system, and a connection point between this reactive power compensator and the bus. a voltage regulator connected to a power supply side to compensate for fluctuations in bus voltage; a first control circuit for detecting changes in active and reactive components of the load to control the output of the reactive power compensator; a second control circuit that detects reactive power on the power source side of the power compensator and controls the output of the reactive power compensator so as to maintain the reactive power at a constant value; a voltage control circuit that controls the voltage regulator so as to suppress the voltage regulator, and when the load changes, the first control circuit controls the output of the reactive power compensator so that the bus voltage does not fluctuate; The reactive power on the power source side is controlled to a desired value by the second control circuit, and the voltage fluctuation of the bus bar that occurs as a result of controlling the reactive power on the power source side to the desired value is controlled by the voltage control circuit to control the voltage regulator. A voltage fluctuation compensator characterized in that the voltage fluctuation is controlled and compensated for.
(2)前記第1項の電圧変動補償装置に、母線電圧を検
出する母線電圧検出回路と、 母線電圧が一定値を超えたときに、前記第2の制御回路
の動作を制限するように作用する無効電力制限回路とを
備え、 負荷が変化すると、前記第1の制御回路により前記無効
電力補償装置の出力を母線の電圧が変動しないように制
御すると共に、 電源側の無効電力を前記第2の制御回路により所望の値
に制御するようにし、 その際生じる母線の電圧変動が一定値を超えると前記無
効電力制限回路で前記第2の制御回路の動作を制限する
ようにしたことを特徴とする電圧変動補償装置。
(2) The voltage fluctuation compensator of item 1 above includes a bus voltage detection circuit that detects the bus voltage, and a bus voltage detection circuit that acts to limit the operation of the second control circuit when the bus voltage exceeds a certain value. and a reactive power limiting circuit that controls the output of the reactive power compensator by the first control circuit so that the bus voltage does not fluctuate when the load changes, and controls the reactive power on the power supply side to the second control circuit. The second control circuit controls the second control circuit to a desired value, and when the bus voltage fluctuation that occurs exceeds a certain value, the reactive power limiting circuit limits the operation of the second control circuit. voltage fluctuation compensator.
JP1189195A 1989-07-21 1989-07-21 Voltage fluctuation compensator Expired - Lifetime JP2644590B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1189195A JP2644590B2 (en) 1989-07-21 1989-07-21 Voltage fluctuation compensator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1189195A JP2644590B2 (en) 1989-07-21 1989-07-21 Voltage fluctuation compensator

Publications (2)

Publication Number Publication Date
JPH0356035A true JPH0356035A (en) 1991-03-11
JP2644590B2 JP2644590B2 (en) 1997-08-25

Family

ID=16237112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1189195A Expired - Lifetime JP2644590B2 (en) 1989-07-21 1989-07-21 Voltage fluctuation compensator

Country Status (1)

Country Link
JP (1) JP2644590B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5798634A (en) * 1994-09-30 1998-08-25 Mitsubishi Denki Kabushiki Kaisha Load management and control apparatus

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56159936A (en) * 1980-05-09 1981-12-09 Sanken Electric Co Ltd Method of controlling electric power
JPS6198126A (en) * 1984-10-19 1986-05-16 株式会社東芝 Voltage controller

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56159936A (en) * 1980-05-09 1981-12-09 Sanken Electric Co Ltd Method of controlling electric power
JPS6198126A (en) * 1984-10-19 1986-05-16 株式会社東芝 Voltage controller

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5798634A (en) * 1994-09-30 1998-08-25 Mitsubishi Denki Kabushiki Kaisha Load management and control apparatus
EP0704953A3 (en) * 1994-09-30 1999-11-24 Mitsubishi Denki Kabushiki Kaisha Load management and control apparatus

Also Published As

Publication number Publication date
JP2644590B2 (en) 1997-08-25

Similar Documents

Publication Publication Date Title
US20120092894A1 (en) System For Regulating A Load Voltage In Power Distribution Circuits And Method For Regulating A Load Voltage In Power Distribution Circuits
JP2007020306A (en) Method of controlling alternating voltage in electric power system by power converter or reactive power compensator
US10840813B2 (en) Power conversion system
JP6964731B1 (en) Power converter
JP6220438B1 (en) Voltage fluctuation compensation device and operation method of power transmission / distribution system
JPH11289666A (en) Voltage adjuster
JPH0356035A (en) Voltage fluctuation compensator
JPWO2007108427A1 (en) Voltage regulator
JP5115730B2 (en) PWM converter device
KR20210048262A (en) Apparatus and method for controlling extinction angle of lcc hvdc system
KR100756006B1 (en) A apparatus of automatic ac voltage regulator by using serial transformer
KR20220061224A (en) uninterruptible power supply
JPH04317523A (en) Voltage fluctuation compensator
JP4569552B2 (en) Instantaneous voltage drop compensation device
JP3404620B2 (en) Inverter control method and inverter device
JPH03230207A (en) Voltage variation compensator
JP2005354756A (en) Uninterruptible power supply apparatus
JPH0715875A (en) Controller for reactive power compensator
JP2019122144A (en) Reactive power compensation device and control circuit therefor
JPH0965574A (en) Control of self-excited reactive power compensating device
JP6967812B1 (en) AC voltage control system
JPS629414A (en) Instantaneous reactive and effective power compensating device
JPH04248371A (en) Overcurrrent protector for three-phase inverter
JP2001005541A (en) Automatic voltage adjusting device
JPH0284029A (en) Inverter control method

Legal Events

Date Code Title Description
S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313115

R371 Transfer withdrawn

Free format text: JAPANESE INTERMEDIATE CODE: R371

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313115

R371 Transfer withdrawn

Free format text: JAPANESE INTERMEDIATE CODE: R371

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313115

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080502

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090502

Year of fee payment: 12

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100502

Year of fee payment: 13

EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100502

Year of fee payment: 13