JP2643584B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device using a narrow gap dry etching method.

[Conventional technology]

Conventionally, for example, as a method of dry etching for forming a mask with a photoresist film on an interlayer insulating film on a Si substrate on which a semiconductor element is formed and forming a contact hole, C _n H _{2 (n + 1) -m} F _m , (N is an integer satisfying 1 ≦ n ≦ 3, m is 1 ≦
A gas such as m ≦ 2 (n + 1)) and a mixed system thereof and a mixed system of an inert gas (Ar, He, etc.) are introduced into the parallel plate electrode type reaction chamber, and the electrode interval is set to 5 to 5. 20mm, 1
A so-called narrow gap type dry etching method by applying a high frequency power of 00 KHz to 20 MHz to the upper electrode or the lower electrode or both is used. In such a dry etching method, an etching reaction and a formation reaction of a polymer formed from the reactive species itself, that is, a deposition reaction, usually proceed competitively on the reaction surface.

Conventionally has it is common practice to introduce the excess reactive gas into the reaction system to the required amount for improving the stability of the etching rate for the reactive species amounts, for example 60scc the CF ₄
m, CHF ₃ flows at 60 sccm, and Ar flows at 800 sccm.In this case, the etching gas is the total flow rate.
13%, exceeding 10%.

[Problems to be solved by the invention]

As described above, in the conventional narrow-gap dry etching method, an excessive amount of reactive species is introduced with respect to the amount of reactive species originally required. However, as shown in FIG.
Some reactive species cause the polymer 4 to adhere to the pattern side wall during etching, causing deterioration of the characteristics of the semiconductor device itself.

In addition, some of the reactive species stay in the reaction chamber, causing deposition in various parts of the reaction chamber, generating dust in the apparatus, causing an increase in dust adhering to the wafer, and being activated again by plasma in continuous processing to react as reactive species. Acts on the system to cause fluctuations in the etching rate.

[Means for solving the problem]

The present invention provides a method for manufacturing a semiconductor device, comprising the steps of: forming a silicon oxide film on a single crystal Si substrate and then forming an opening in the silicon oxide film by a narrow gap dry etching method; The method is to dilute the reaction gas obtained by mixing C ₂ F ₆ and CHF ₃ to 3% or more and 10% or less with Ar gas,
The etching is performed by introducing into a 20 mm parallel plate electrode type reaction chamber.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a cross-sectional view of a semiconductor chip when an interlayer insulating film is formed on a single-crystal Si substrate (hereinafter simply referred to as a Si substrate) 1 and a contact hole is opened as an embodiment of the present invention.

C ₂ F ₆ 5 sccm to the semiconductor chip mask of photoresist film 3 by forming a silicon oxide film 2 is formed by chemical vapor deposition as an interlayer insulating film on the Si substrate 1 formed with the semiconductor element, CHF ₃ A gas system consisting of 10 sccm and 500 sccm Ar was introduced into a reaction chamber consisting of parallel plate electrodes with an electrode spacing of 10 mm, the reaction pressure was maintained at 500 mTorr, and 13.56 MHz to the anode side.
By applying the high-frequency power of 500 W, a contact hole free of polymer can be formed on the side wall of the opening of the silicon oxide film 2.

Figure 2 is a characteristic diagram showing the selectivity of index of etch rate of the etch rate index and a silicon oxide film Si substrate of the silicon oxide film to the reaction gas flow rate / total gas flow rate, as the reaction gas C ₂ F ₆ This shows a case where CHF ₃ is mixed at a ratio of 1: 2, Ar is used as a diluent gas, the interval between parallel plate electrodes is 10 mm, and 500 W of 13.56 MHz high frequency power is applied to the anode. The reaction chamber pressure was 500 mTorr. The above embodiment corresponds to the area a in FIG. Although the etching rate is about 60% of the conventional example, the selectivity is improved to about 3.5 times.

FIG. 3 is a characteristic diagram showing the relationship between the etching rate index of the silicon oxide film, the index of the amount of dust adhering to the wafer, and the number of treatments in one embodiment. About 50% of cases have been improved.

When the present invention is applied to an etch-back for forming a side wall (silicon oxide) provided on a gate electrode at the time of forming an LDD type MOS transistor, the selectivity is good, so that Si
Damage to the substrate can be reduced, and the yield is improved.

In the present invention, if the reaction gas is diluted to less than 3%, the etching rate is greatly reduced, which is not practical. Conventional example
At 13%, the selectivity index is smaller than 2, and at 10%, it is larger than 2, indicating a clear difference from the conventional example.

Parallel plate electrode spacing is 5-20mm, frequency 100KHz-20MH
The same effect can be obtained by applying a high frequency of z to one or both of the upper electrode and the lower electrode.

〔The invention's effect〕

As described above, according to the present invention, the reactive species (C ₂ F ₆ and CHF ₃ ) participating in the reaction are diluted with Ar gas and introduced into the reaction system to perform dry etching, whereby excess polymer in the reaction system is obtained. Since the generation is reduced, there are effects such as a reduction in contamination in a semiconductor device manufacturing process, an improvement in stability of a dry etching reaction, and a reduction in the amount of dust adhering to a wafer. Also,
Depending on the conditions, an improvement in the selectivity between the insulating film and the underlying substrate can be expected.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor chip for explaining an embodiment of the present invention, and FIG. 2 is a diagram showing a reaction gas flow rate / total gas flow rate and an etching rate of a silicon oxide film.
FIG. 3 is a characteristic diagram showing the relationship between the selectivity of the etching rate of the Si substrate and FIG. 3 is a graph showing the change in the etching rate of the silicon oxide film and the number of treatments of the dust adhering to the wafer as compared with the conventional example in order to explain the effect of the present invention. FIG. 4 is a sectional view of a conventional semiconductor chip. 1 ... Si substrate, 2 ... Silicon oxide film, 3 ... Photoresist film, 4 ... Polymer.

Claims (2)

(57) [Claims] A method of manufacturing a semiconductor device, comprising the steps of: forming a silicon oxide film on a single crystal Si substrate; and then forming an opening in the silicon oxide film by a narrow gap dry etching method. The etching method is to dilute the reaction gas obtained by mixing C ₂ F ₆ and CHF ₃ to 3% or more and 10% or less with Ar gas,
A method for manufacturing a semiconductor device, wherein the semiconductor device is introduced into a 20 mm parallel plate electrode type reaction chamber and etched. 2. A reaction gas comprising C ₂ F ₆ gas and CHF ₃ gas in a volume ratio of 1:
2. The method for manufacturing a semiconductor device according to claim 1, wherein the electrodes are mixed in the step (2) and the electrode interval is 10 mm.