JP2613915B2 - Micro computer - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a microcomputer.

[Conventional technology]

The input port of the conventional microcomputer capable of setting the inverted input level has only one set of storage means for setting the inverted input level, and must be realized by a program in order to provide the input characteristic with the hysteresis characteristic. there were.

Further, the input port having the hysteresis characteristic has a fixed hysteresis characteristic in terms of a circuit, so that the hysteresis characteristic cannot be arbitrarily obtained.

[Problems to be solved by the invention]

The above-mentioned input port of the conventional microcomputer capable of setting the inverted input level has only one set of storage means for setting the inverted input level. Therefore, in order to provide a hysteresis characteristic, the storage means is used when the input logical value changes. It was necessary to change the data stored in the memory and to change the inverted input level.

For this reason, the program must monitor the change of the input logical value, judge the input logical value, and change the data set in the storage means, which has a disadvantage that the load on the program increases.

In addition, the input port having the hysteresis characteristic has a characteristic that the hysteresis characteristic is fixed in terms of a circuit, and there is a disadvantage that any input port cannot have any hysteresis characteristic.

An object of the present invention is to provide a microcomputer that can set two types of inverted input levels, can switch between the two types of inverted input levels according to input logical values, and can arbitrarily set and change the hysteresis characteristics by a program. is there.

[Means for solving the problem]

A microcomputer according to the present invention includes an input port capable of setting an inverted input level for logically inverting an output level, and an input logic value of the input port itself or an inverted logic corresponding to the input logic value on a one-to-one basis in time. Selecting means for selecting any one of the two sets of storage means by a signal; and means for setting an inverted input level of the input port based on data stored in the set of storage means selected by the selection means. It is comprised including.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

 FIG. 1 is a circuit diagram showing one embodiment of the present invention.

The register 6 and the register 7 are two sets of storage means, and the register 6 has the input logic signal itself of the input port or
The data for determining the inverted input level from “0” to “1” of the input logic value, which is an inverted logic signal corresponding to the input logic value at a 1: 1 time, is stored in the register 7 in the input logic value. Data for determining the inversion level of the value from “1” to “0” is stored.

Comparator 2, external signal input terminal 1, inverted input level 5
Is an input port for which an inverted input level can be set. The input logic value 8 and the register selection circuit 10 select one of the registers 6 and 7 according to the input logic value.

The multiplexer 3 and the ladder resistor 4 set the inverted input level according to the data stored in the selected register. The internal bus 9 of the CPU is used to set data stored in two sets of registers by a program.

The comparator 2 compares the external signal input terminal 1 with the inverted input level 5 and outputs an input logical value 8. The register selection circuit 10 selects the register 6 if the logical value is "0" and the register 7 if the logical value is "1", based on the theoretical value of the input logical value 8.

The register on the selected side supplies the stored data to the multiplexer 3. The multiplexer 3 selects a voltage value by the ladder resistor 4 according to the applied data, and outputs the selected voltage value to the inverted input level 5.

〔The invention's effect〕

As described above, according to the present invention, an arbitrary hysteresis characteristic can be given to the input port only by storing arbitrary data in two sets of storage means. The hysteresis characteristic can be selected, and the hysteresis characteristic can be dynamically changed with a change in the noise environment.

Thus, the use environment of the microcomputer can be realized by the program, and the load on the program can be reduced.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a graph showing a hysteresis characteristic of an input port of the microcomputer shown in FIG. 1 ... external signal input terminal, 2 ... comparator, 3 ...
Multiplexer, 4 ... Ladder resistance, 5 ... Inverted input level, 6 ... Register, 7 ... Register, 8 ... Input logic value, 9 ... CPU internal bus, 10 ... Register selection circuit, 11 ... Input logical value, 12 ... input voltage, 13 ... hysteresis curve, 14 ... inverted input level determined by data stored in register A, 15 ... inverted input determined by data stored in register B level.

Claims (1)

(57) [Claims] An input port capable of setting an inverted input level for logically inverting an output level, and an input logic value of the input port itself or an inverted logic signal corresponding to the input logic value on a one-to-one basis. Selecting means for selecting any one of the sets of storage means; and means for setting an inverted input level of the input port based on data stored in the set of storage means selected by the selection means. A microcomputer characterized by the above-mentioned.