JP2594972B2 - Wiring forming method and apparatus - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring forming method and a device suitable for identifying and repairing a partially defective portion of a semiconductor device.

[Conventional technology]

2. Description of the Related Art Semiconductor devices have been miniaturized and highly integrated with the aim of achieving higher performance and higher speed. As a result, the development of the semiconductor device has become difficult, and the development period has been lengthened. Such a situation indicates that a circuit fabrication technique such as cut and try is required even for LSI design. That is, the defective part on the chip that does not operate sufficiently with the conventional design is specified, the wiring existing in the part is cut, the wiring is laid at an arbitrary position, the defective circuit is repaired, and provisionally. If a semiconductor device capable of obtaining a complete operation is manufactured, subsequent characteristic evaluation and design change can be quickly performed. As a technique for applying wiring to arbitrary places,
Extended Abstracts of the 17th Conferen on Solid Tate Devices and Materials (1985) 193 to 196
ce on Solid State Devices and Materials, TOKYO, 198
5, PP193-196)
A technique for forming a Mo wiring on a Si substrate coated with SiO ₂ using the D technique is disclosed. However, in order to lay wiring on an actual semiconductor device, it is necessary to form a wiring material having sufficiently low resistance at a high speed. Not applicable.

Even if wiring can be laid at a realistic speed, it is required that the adhesion strength between the wiring and the base be sufficient, and that a wiring having a sufficient cross-sectional area to obtain low resistance be obtained. You.

According to the above prior art, it is possible to increase the film thickness of a wiring material to be formed by increasing a CVD source gas pressure, increasing a laser output, and decreasing a relative scanning speed of laser light irradiation. There is a description. However, according to the experiments performed by the inventors of the present application, the laser CV
It was clarified that when the film thickness of the wiring formed in D was increased, the wiring was peeled or cracked. In addition, increasing the laser output not only heats the underlayer, especially the diffusion layer and the junction, deteriorating the characteristics, but also partially reduces the heat capacity due to the structure of the underlayer, for example, the presence of Al wiring and the thickness of the passivation film. It has also been found that, because of the difference, the film thickness and the wiring width of the wiring material to be formed change significantly. Unless such problems are solved, it is impossible to lay wiring on the semiconductor device.

Further, as another prior art, for example, Japanese Patent Application Laid-Open No. Sho 60-2362
No. 14, JP-A-60-236215, a thin film having a thickness of 100 mm or less is formed as a nucleus for absorbing laser light, and then laser light is irradiated to perform CVD. There is a technology for forming a wiring material. However, according to the experiments performed by the inventors of the present application, a thin film having a thickness of 100 mm or less has insufficient adhesion strength between the wiring material and the base, absorbs laser light insufficiently, overheats the base, and deteriorates the characteristics. It has been shown to cause degradation.

[Problems to be solved by the invention]

The above prior art does not consider the following points, and therefore has a problem in that it is not possible to specify or repair a defective portion of a semiconductor device.

(1) If the thickness of the wiring formed by laser CVD is increased, the wiring may peel off or crack from the surface of the semiconductor device.
Only a wiring having a small thickness, that is, a wiring having a high resistance can be formed.

(2) If the width of the wiring is increased to solve the above (1), a short circuit is likely to occur if the wiring or its lead-out part is close to the already laid wiring or its lead-out part.
Wiring cannot be laid at high density.

(3) Since the process of depositing the wiring by laser irradiation depends on the heat capacity of the lower layer, it is difficult to keep the width and thickness of the wiring uniform, and a high-resistance wiring is formed partially.

(4) The laser beam at the time of forming the wiring overheats the lower diffusion layer and the junction, thereby deteriorating the characteristics of the semiconductor device.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method and an apparatus for forming a wiring in which a wiring laid by laser CVD can connect an arbitrary part of a semiconductor device without causing the above problem.

[Means for solving the problem]

The above purpose is to form a new wiring film to be connected to the wiring film below the exposed insulating film by removing a part of the insulating film on the surface of the semiconductor device and to add it to the insulating film by CVD reaction using laser light In this method, a new wiring film to be additionally formed on the insulating film is formed by providing a portion having a width wider than the width of the wiring film in a portion located above the diffusion layer or the junction of the semiconductor device. Is done.

The above object is also achieved by removing a part of the insulating film on the surface of the semiconductor device and exposing a new wiring film connected to a wiring film below the insulating film by a CVD reaction using laser light. In the method of forming a wiring to be additionally formed on the insulating film, a portion of the new wiring film to be additionally formed on the insulating film is provided with a portion having a width wider than the width of the portion of the wiring film connected to a portion where a part of the insulating film is removed It is achieved by forming.

Further, the above object is to provide a buffer film forming means for forming a buffer film on a semiconductor device in which a plurality of small holes are formed in an insulating film on a surface and wirings formed under the insulating film are exposed, Wiring forming means for irradiating a laser beam on the conductive film to deposit a conductive film by CVD and electrically connecting the wirings, and diffusion of the semiconductor device into the conductive film deposited on the buffer film by controlling the wiring forming means. A control means for providing a portion wider than the width of the conductive film in a portion located above the layer or the junction portion to form the conductive film, and a removing means for removing an unnecessary portion of the buffer film are provided. Is achieved by the wiring forming apparatus described above.

[Action]

When laying wiring on a semiconductor device by laser CVD,
Irradiation is performed while laser light having a variable focusing size using aperture projection is relatively scanned. At this time, in the case where there is a diffusion layer or a bonding portion immediately below or very close to the irradiated portion, or in the case where already laid wiring is nearby, irradiation is performed with a reduced light converging dimension. The resulting wiring width is smaller,
Since short-circuiting with other laid wiring can be prevented, high-density wiring can be laid. In addition, since heat diffusion to the surroundings is also reduced, it is possible to prevent characteristics of the semiconductor device from deteriorating due to thermal influence.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings. First
FIG. 2 is a configuration diagram showing an embodiment of a wiring forming apparatus according to the present invention, FIG. 2 is a power density distribution comparison diagram between an aperture projection type laser beam and a spot irradiation type laser beam used in the above embodiment, FIG. (A)-(f) is a figure explaining the wiring formation process, respectively.

In FIG. 1, the load / lock chamber 11 is a gate valve.
The chambers 11 and 13 can be evacuated via valves 16 and 17 by vacuum pumps 14 and 15, respectively, and the degree of vacuum can be confirmed by vacuum gauges 18 and 19, respectively. Load lock room 1 above
A transfer mechanism 20 is attached to 1, and a sample table 22 on which a semiconductor device 1 in a wafer or chip state is mounted is mounted on a transfer arm 21, and a lower electrode 23 in the load lock chamber 11 is moved from the main chamber 13 to the main chamber 13. The lower electrode 24, or X, Y, Z,
The semiconductor device 1 is transported together with the sample stage 22 to a stage 25 movable in the θ direction. Further, the load / lock chamber 11 is provided with an upper electrode 26 at a position facing the lower electrode 23, a high frequency power supply 27 is connected to the lower electrode 23 via a switch 28, and the upper electrode 26 is connected to the ground level. It is connected to the. An Ar gas cylinder 30 is connected to the load lock chamber 11 via a valve 29. on the other hand,
The main chamber 13 is provided with an upper electrode 32 to which a target 31 which is a buffer film material is attached at a position facing the lower electrode 24, and is connected to a high-frequency power supply 27 via a switch 28. Connected to earth level. Further, an Ar gas cylinder 30 and a CVD material gas cylinder 35 are connected via valves 33 and 34, and a chamber 13 facing the stage 25 is connected.
A window 36 for observation and laser irradiation is provided on the upper surface of the. Gate valve 12 and valves 16, 17, 29, 3 above
3,34 opening and closing, receiving measurement data from vacuum gauges 18,19,
The transport mechanism 20, ON / OFF of the high-frequency power supply 27, and the switch 28 are controlled by a controller 37, respectively. Main Chaba
Above 13 is provided an optical system for filling a wiring exposed portion (contact hole) of the semiconductor device with a conductive substance and forming a wiring. The laser beam 39 emitted from the laser oscillator 38 has its beam diameter expanded by the beam expander 41 only when the shutter 40 is open, and is adjusted to an appropriate power by the transmittance variable filter 42.
The light reaches the dichroic mirror 43, which has a characteristic of reflecting at 39 wavelengths and transmitting at other wavelengths. The laser beam 39 that has reached the dichroic mirror 43 has its optical path bent, reaches a rectangular opening slit 45 whose opening size is arbitrarily variable by a driving mechanism 44, and the beam is formed in a rectangular shape. After passing through the half mirrors 46 and 47, the objective lens 4
The laser light 39 reduced to the magnitude of 1 / M of the reciprocal of the lens magnification M by 8 is irradiated onto the semiconductor device 1 as a rectangular aperture projection image.

At this time, the power density distribution of the laser light 39 irradiated onto the semiconductor device 1 has a shape close to a trapezoid as shown in FIG. Therefore, by setting the power to an appropriate value, the region below the threshold for decomposing the CVD gas can be reduced, and the influence of heat on the surroundings can be reduced. On the other hand, when the laser beam 39 emitted from the laser oscillator 38 is condensed by the objective lens 48 without using the aperture projection, the power density distribution becomes a Gaussian distribution as shown in FIG. 2 (b). . The region below the threshold for decomposing the CVD gas is significantly larger than in the case of the above-described aperture projection. Therefore, the influence of heat on the surroundings also increases.

The reference light source 49 is for knowing the size and the irradiation position of the rectangular aperture projection image of the laser light 39. The reference light emitted from the reference light source 49 passes through the dichroic mirror 43, Similarly, a rectangular aperture slit 45 is formed in a rectangular shape, the light passes through the half mirrors 46 and 47 at a constant rate of light, and the same size and the same position as the projected image of the laser light 39 on the semiconductor device 1 by the objective lens 48. Is irradiated. The reflected light passes through the objective lens 48 and the half mirror 47 at a fixed rate, and is reflected by the half mirror 46 at a fixed rate, and enters the camera 51 as a reflected image. Illumination light source 50
Is used for observation of the semiconductor device 1, and the illumination light source 50
The optical path of the illumination light emitted from the semiconductor device 1 is bent by the half mirror 47 and is condensed and irradiated on the semiconductor device 1 by the objective lens 48. Then, the reflected light passes through the objective lens 48 and the half mirror 47 at a fixed rate, is reflected by the half mirror 46 at a fixed rate, and enters the camera 51 as a reflected image, as in the case of the reference light. The reflected images of the reference light and the illumination light captured by the camera 51 are image-processed by the controller 52 and displayed on the monitor 53. The controller 52 performs opening and closing of the shutter 40, control of the transmittance variable filter 42, adjustment of the opening size of the rectangular opening slit 45, and control of the stage 25, in addition to the image processing described above, based on data from the main controller 54. The main controller 54 is a magnetic medium
From 55, data such as design data of the semiconductor device 1, cleaning conditions, buffer film formation conditions, position data for wiring formation, laser CVD conditions, and unnecessary buffer film removal conditions are taken in. Then, the data is sent to the controller 37 or 52.

FIGS. 3 (a) to 3 (f) are views showing steps of a wiring forming method according to the present invention, and each procedure will be described below using the apparatus shown in the above embodiment.

In FIG. 3, contact holes 8a and 8a are previously formed in interlayer insulating film 5 and passivation film 7 of semiconductor device 1.
When the contact holes 8a and 8b are exposed to the air while exposing the Al wirings 4 and 6 to be connected,
The surfaces of the wirings 4 and 6 are oxidized, and contaminants 9 such as moisture and dust in the air adhere to the surface of the semiconductor device 1 as shown in FIG. The surface oxide films of the Al wirings 4, 6 increase the contact resistance with the wiring by CVD, and the contaminants 9 (9a, 9b, 9c) increase the adhesion between the surface of the semiconductor device 1 and the buffer film formed in the next step. Lower. Therefore, first, the oxide film and the contaminant 9 of the Al wirings 4 and 6 are removed. In the above procedure, the semiconductor device 1 is placed on the sample stage 22, the valve 16 is opened, and the inside of the load lock chamber 11 is evacuated to about 1 × 10 ⁻⁷ Torr. Then valve
29 is opened, and Ar gas is introduced from the Ar gas cylinder 30 so that the inside of the load lock chamber 11 becomes 5 to 10 mTorr. In this state, high-frequency power is applied to the sample table 22 from the high-frequency power supply 27.
At this time, the upper electrode 26 is kept at the ground level. Ar plasma is generated between the sample table 22 and the upper electrode 26 by applying high-frequency power, and Ar ⁺ ions sputter the surface of the semiconductor device, and Al wirings 4 and 6 in the contact holes 8a and 8b are formed.
The oxide film and the contaminant 9 are removed as shown in FIG. 3 (b). After that, stop applying high frequency power and
After closing 29, the Ar gas in the load lock chamber 11 is exhausted to about 10 ^-7 Torr. In the above-described cleaning step, O ₂ gas is introduced before introducing Ar gas, and O plasma is generated between the sample table 22 and the upper electrode 26 in the same manner as in the case of Ar plasma generation. After removing the contaminant 9 made of ash by ashing, the contaminant 9 made of an inorganic substance and the oxide film on the surface of the Al wirings 4 and 6 may be removed by sputtering with the above Ar ⁺ ions.

Next, the gate valve 12 is opened, and the semiconductor device 1 is placed together with the sample table 22 on the lower electrode 24 of the main chamber 13 which has been evacuated to a high vacuum in advance by the transfer mechanism 20. The valve 33 is opened, Ar gas is introduced from the Ar gas cylinder 30, and the Ar gas pressure in the above-mentioned may chamber 13 is adjusted to 5 to 10 mTorr. Then, high-frequency power is applied to the upper electrode 32 on which the target 31 is installed, and the target 31 and the sample stage are mounted.
An Ar plasma is generated between the target and the target 22, and the target 31 is sputtered by Ar ⁺ ions. In this manner, the atoms of the material constituting the target jump out of the target 31 and adhere to the surface of the semiconductor device 1 to form the buffer film 10 into the third layer.
It is formed as shown in FIG. The target 31 for forming the buffer film 10 is a metal such as Ni, Ti, Mo, Cr, W,
Alternatively, they are made of silicide, which is an alloy of these metals and Si. The thickness required for the buffer film 10 is slightly different depending on the material of the buffer film, the material of the additional wiring, and the like.
The effect can be obtained at about 30 nm.

When the buffer film 10 is formed to a predetermined thickness (several tens to 100 nm), the application of the high frequency power is stopped, the valve 33 is closed, and the Ar gas in the main chamber 13 is exhausted. Then, the gate valve 12 is opened, and the semiconductor device 1 is moved by the transfer mechanism 20 to the sample stage.
After mounting the semiconductor device 1 on the stage 25 and closing the gate valve 12, the main chamber 13 is evacuated to about 1 × 10 ⁻⁷ Torr and the stage 25 is moved.
Is located directly below the window 36. Objective lens 4 through window 36
8. Using the illumination light source 50, the TV camera 51, and the monitor 53, match the reference position (for example, a target mark) of the semiconductor device 1 with a marker (for example, an intersection of an electronic line) on the monitor 53. After that, the design data of the semiconductor device 1 is read from the magnetic medium 55 or the like by the main controller 54 and sent to the controller 52. The stage 25 is moved based on the above data, and the center of the contact hole 8 is matched with the marker on the monitor 53. The marker indicates the condensing position when the laser light 39 is irradiated, and is the center of the aperture projected image formed by the slit 45. Then, based on the design data, the opening size of the slit 45 is adjusted by using the driving mechanism 44 so that the projected image of the opening of the reference light source 49 enters the contact hole 8. A variable transmittance filter such that the power density distribution of the laser beam 39 passing through the opening dimension exceeds the threshold value for decomposing the CVD gas as shown in FIG.
Adjust the transmittance of 42.

Close the valve 17 and open the valve 34 to set the CVD gas cylinder 35
More CVD gas is introduced into the main champer 13. When the CVD gas pressure in the main chamber 13 reaches a predetermined value, the valve 34
Close. The CVD gas used here is Mo (Co) ₆ , W
Metal carbonyls such as (Co) ₆ , Ni (Co) ₄ and MoF ₆ , WF ₆
And the like. These are sublimable but have low vapor pressure at room temperature. Therefore, it is only a short time if a heater is provided in the cylinder 35, the valve 34, and the piping while heating them when introducing the CVD gas.

After the introduction of the gas, the shutter 40 is opened, and the laser light 39 is irradiated into the contact hole 8a. By the irradiation of the laser light 39, the buffer film 10 formed on the Al wiring 6 in the contact hole 8a absorbs the laser light 39 and generates heat. The CVD gas floating near the heating position is decomposed by the heat energy, and the conductive substance 56 is deposited and deposited. The conductive substance obtained by the CVD gas decomposition is Mo for Mo (Co) ₆ or MoF ₆ and W for W (Co) ₆ or WF ₆ . After completely burying the inside of the contact hole 8a, the shutter 40
Is closed to stop the irradiation of the laser beam 39. Next, the stage 25 is moved by the controller 52 so that the contact hole 8b, which forms a pair with the contact hole 8a, matches the marker. After the alignment and the adjustment of the opening size of the slit 45, the shutter 40 is opened and the laser light 39 is irradiated, and the inside of the contact hole 8b is filled with a conductive substance 56 as shown in FIG. 3 (d). When making connections at a plurality of locations, the above operations are repeated, and all the contact holes 8 are filled with the conductive substance 56.

Next, connection between the filled contact holes 8, that is, wiring formation is performed. First, the stage 25 is moved to make one of the contact holes 8a coincide with the marker on the monitor 53, and then the opening size of the slit 45 is adjusted. 1-3
Double the size. While opening the shutter 40 and irradiating the laser light 39, the stage 25 is moved at a constant speed according to a preset route, and the wiring 57 is laid. The wiring 57 is formed up to the other contact hole 8b, and upon reaching the contact hole 8b, the shutter 40 is closed to stop the irradiation of the laser light 39 (FIG. 3 (e)). When laying a plurality of wires 57, the above operation is repeated. Via the laying of the wiring 57, the break point of the wiring 57, the position data of the diffusion layer and the junction in the semiconductor device 1 are taken into the main controller 54 from the magnetic medium 55, and the wiring 57 is thinly laid by the controller 54. The section to be performed is determined, and the section and the coordinates of the break point of the wiring 57 are sent to the controller 52. The section in which the wiring 57 is thinly laid is a section in which the wiring 57 is close to the other wiring 57 or a lead-out portion (filled contact hole 8) thereof, and if the wiring width is increased, there is a risk of short-circuiting with the other wiring 57. ,
There is a diffusion layer or a junction just under or immediately near the laser irradiation part, and there is a possibility that the semiconductor characteristics may be degraded by the heat of the laser irradiation. In the cases other than the above, the wiring width is formed large to reduce the wiring resistance. When the resistance needs to be further reduced, the laser beam 39 is irradiated again to follow the same laying path as the wiring 57. By doing so, a new wiring is superimposed on the wiring 57,
The film thickness increases and the wiring resistance decreases.

After laying all wiring 57, open valve 17 and open CV
Exhaust D gas. After evacuation to about 10 ^-7 Torr, the gate valve 12 is opened, and the semiconductor device 1 is moved to the sample stage by the transfer mechanism 20.
It is placed on the lower electrode 23 of the load lock chamber 11 together with 22. The gate valve 12 is closed, the valve 29 is opened, and Ar gas is introduced from the Ar gas cylinder 30. After that, the high-frequency power is applied to the lower electrode 23 by switching the contact of the switch 28 to generate Ar plasma, and the surface of the semiconductor device 1 is sputtered with Ar ⁺ ions. Thus, the unnecessary buffer film 10 (the buffer film other than under the wiring 57) formed on the surface of the semiconductor device 1 is removed as shown in FIG. 3 (f). Note that the wiring 57 formed by laser CVD is naturally also removed by the above-described sputtering, but since the film thickness of the wiring 57 is usually about 0.2 to 2 μm, if the sputtering is to remove the buffer film 10 of about several tens to 100 nm, There is no particular problem.

By the above-described processing, the wiring required on the semiconductor device 1 can be laid without adversely affecting the characteristics of the semiconductor device.

The laser oscillator 38 used in this embodiment can be used as long as the laser light 39 emitted from the oscillator 38 can be converted into heat by being absorbed by the buffer film 10. However, since the semiconductor device 1 is generally composed of a fine pattern, it is desirable to emit a laser beam 39 having a wavelength of about 1 μm or less in order to cope with this. Further, continuous oscillation laser light is more desirable than pulse oscillation from the viewpoint of wiring uniformity.
Laser, Kr laser, YAG laser (including high frequency oscillation)
Etc. are suitable.

In this embodiment, a rectangular projection image is formed using a rectangular aperture slit. However, the present invention is not limited to this, and a disk having circular pinholes of different sizes may be used, or a dimensional variable The same effect as in the above embodiment can be obtained even if a stop capable of producing a circular pinhole is used.

〔The invention's effect〕

As described above, the wiring forming method and apparatus according to the present invention include:
In a portion that is easily affected by heat, the condensing dimension of the laser beam is narrowed to reduce the heat effect on the lower layer and the periphery, so that the wiring can be formed without deteriorating the characteristics of the semiconductor device.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a wiring forming apparatus according to the present invention, and FIGS. 2 (a) and 2 (b) show an aperture projection type laser beam and a spot irradiation type laser beam used in the above embodiment. 3 (a) to 3 (f) are diagrams for explaining the wiring forming process. 1 ... Semiconductor device, 4,6 ... Al wiring, 5 ... Interlayer insulating film, 7 ...
… Passivation film, 10… Buffer film, 11… Load lock chamber, 12… Gate valve, 13… Main chamber, 20
…… Transport mechanism, 23,24 …… Lower electrode, 25 …… Stage, 26,3
2 …… Top electrode, 27 …… High frequency power supply, 30 …… Ar gas cylinder,
31 ... Target, 35 ... CVD gas cylinder, 37,52 ... Controller, 38 ... Laser oscillator, 39 ... Laser light, 45 ...
Slit rectangular opening, 51… TV camera, 54… Main controller, 56… Conductive substance.

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Takahiko Takahashi 2326 Imai, Ome-shi, Tokyo Inside Device Development Center, Hitachi, Ltd. (72) Inventor Takashi Uemura 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Hitachi (56) References JP-A-59-119853 (JP, A) JP-A-61-237446 (JP, A) JP-A-60-27130 (JP, A) JP-A-61-245164 ( JP, A) JP-A-56-21347 (JP, A)

Claims (8)

(57) [Claims] An insulating film on a surface of a semiconductor device is partially removed and a new wiring film connected to a wiring film below the insulating film, which is exposed, is formed on the insulating film by a CVD reaction using laser light. A wiring portion having a width wider than the width of the wiring film in a portion located above a diffusion layer or a junction of the semiconductor device in a new wiring film additionally formed on the insulating film. Forming a wiring. 2. The wiring forming method according to claim 1, wherein said new wiring film is formed on a buffer film formed on said insulating film. 3. The semiconductor device according to claim 1, wherein the new wiring film is formed by repeatedly irradiating the laser beam with respect to the semiconductor device while repeatedly moving the laser beam.
3. The wiring forming method according to item 1. 4. A new wiring film connected to a wiring film below the insulating film, which is exposed by removing a part of the insulating film on the surface of the semiconductor device, is formed on the insulating film by a CVD reaction using laser light. A width of a portion of the wiring film wider than the width of a portion connected to a portion where a part of the insulating film is removed in a new wiring film additionally formed on the insulating film. Forming a wiring. 5. The wiring forming method according to claim 4, wherein said new wiring film is formed on a buffer film formed on said insulating film. 6. The semiconductor device according to claim 4, wherein said new wiring film is formed by repeatedly irradiating said laser beam with said laser beam being moved relatively to said semiconductor device.
3. The wiring forming method according to item 1. 7. A buffer film forming means for forming a buffer film on a semiconductor device in which a plurality of small holes are formed in an insulating film on a surface and a wiring formed under the insulating film is exposed, and the buffer film is formed. Wiring forming means for irradiating a laser beam thereon to deposit a conductive film by CVD and electrically connecting the wirings, and controlling the wiring forming means to deposit the conductive film on the buffer film. A control unit for forming a conductive film by providing a portion wider than the conductive film in a portion located above the diffusion layer or the junction of the semiconductor device; and a removing unit for removing an unnecessary portion of the buffer film. A wiring forming apparatus comprising: 8. The buffer film forming means includes a target portion and a plasma generating portion, and the buffer film is formed on the semiconductor device by sputtering the target with plasma generated by the plasma generating portion. 8. The wiring forming apparatus according to claim 7, wherein: