JP3185320B2 - Semiconductor device wiring correction method and device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the formation of connection wiring suitable for identifying or repairing a defective part or cause partially present in, for example, a prototyped semiconductor device, and more particularly, to forming a fine wiring pattern in multiple layers. The present invention relates to a method and an apparatus for correcting a wiring (circuit change) in a formed semiconductor device.

[0002]

2. Description of the Related Art In recent years, as semiconductor devices have become more sophisticated,
The pattern miniaturization of wirings and the like and the increase in the number of wiring layers are remarkable, and the difficulty of development is increasing. for that reason,
It takes a long time from the basic study stage to realization as an actual device. Particularly in the later stage of development, a test element is mounted and inspection such as operation confirmation is performed, and operation confirmation is performed again after correction (circuit change) of a wiring route and the like according to the result.
Normally, trial production, operation confirmation, and circuit change are repeated several times. Conventional circuit changes include a change in an exposure mask for manufacturing a semiconductor device, and a subsequent re-production of the element itself through a series of element production steps. Therefore, in order to shorten the development period of the semiconductor device, a technology for realizing the above-described circuit change in a short time is essential.

As a technology for realizing a circuit change in a short period of time,
Laser Society Newsletter Vol.12, No.2 (April 1987) No.1
There are methods discussed on pages 6-6. This method uses laser removal processing and laser CVD (Chemical Vapor).
The circuit is changed by directly processing the wiring itself in the defective semiconductor device using Deposition (chemical vapor deposition). Specifically, an ultraviolet laser beam (wavelength 266 nm, pulse width 10 n) is applied to an insulating film on the Al wiring in the semiconductor device to be connected.
s) is applied to form a connection hole to expose the Al wiring.
Next, Ar is inserted into the connection hole in a Mo (CO) ₆ gas atmosphere.
The circuit is modified by irradiating laser light to bury Mo, making ohmic contact with the Al wiring, and then scanning with the Ar laser light to form Mo wiring between the connection holes. Then, they are trying to correct a semiconductor device that is actually under development. The modified semiconductor device has two Al wiring layers, a 1 μm-thick SiN interlayer insulating film formed between both wiring layers, and has no passivation film (protective film), and the upper wiring is exposed. . After irradiating the SiN film with an ultraviolet laser beam to form a connection hole, the upper and lower Al wirings are connected by Mo formed by laser irradiation of about 0.5 W. Although the total connection resistance is not described, it is stated that the contact resistance of the connection hole is about 10Ω.

The above-mentioned prior art can be applied to a semiconductor device having a very simple structure without a protective film as described above. However, as shown in FIG. 11A, the cross-sectional shape of the connection hole according to the prior art is a sliver-like shape having a larger opening diameter than the diameter of the hole bottom. This is considered to be because the power density distribution of the ultraviolet laser beam 62 in the processed portion is a Gaussian distribution and reflects this power density distribution. Therefore, even if the wiring 101 in the lower layer portion of the semiconductor device 100 in which the wiring layer 101 has been miniaturized and multilayered is to be exposed by laser processing, the connection hole 1 is connected to the other wiring 10 as shown in FIG.
It is very difficult to obtain a connection hole 1 having a high aspect ratio (= hole depth / hole diameter).

Further, the protective film 105 and the insulating film 104 may be formed of a material having good absorption of the laser beam 62, such as a SiN film. However, the ordinary semiconductor device 100 can sufficiently emit ultraviolet light up to about 180 nm. The most commonly used is SiO ₂ that is transmitted through. This SiO ₂
Ablation processing does not occur even when the film is irradiated with the ultraviolet laser light 62, and the film passes through the SiO ₂ film and is absorbed by the Al wiring 101. And Si is generated by the force generated by the boiling of the Al wiring 101.
The O ₂ film is removed. Therefore, it is difficult to control the cross-sectional shape of the connection hole 1, and the opening size thereof is larger than the shape shown in FIG. In addition, the method cannot be applied to the wiring 101 in the lower layer of the semiconductor device 100 having a multilayer structure.

Further, in the above conventional example, the Al wiring exposed in the formation of the connection hole is irradiated with an Ar laser in a Mo (CO) ₆ gas atmosphere, and the heat is used to decompose the material gas to directly form the Mo wiring. However, according to experiments by the inventors of the present application, when a Mo film is formed directly on an Al wiring by thermal CVD,
It has become clear that easily generates the high-resistance alloys, such as MoAl ₁₂ in the interface unit. If such a high resistance portion exists at the interface, the contact resistance naturally increases. This is why the contact resistance is not as low as about 10Ω in the above conventional example. If the contact resistance is high, a logic LSI or the like that performs high-speed processing delays signal transmission and the like and cannot operate normally.

In addition to the above prior art, Japanese Patent Application Laid-Open Nos. 63-164240 and 64-7171 disclosed by the inventors of the present application.
There is a technique described in Japanese Patent Publication No. 149. In these techniques, a connection hole is formed in a semiconductor device in the same manner as in the conventional example, and the laser CV
The correction is performed by filling the connection hole with a conductive substance (filling the hole) and forming the wiring in D. As processing before filling the hole and forming the wiring by laser CVD, cleaning of the surface of the semiconductor device and formation of a buffer film are performed. This is an essential process. And
The steps from the cleaning step to the wiring forming step by laser CVD are performed in a high-vacuum atmosphere to achieve low-resistance connection and high reliability of repair.

In the above-mentioned JP-A-63-164240, a connection hole is formed by irradiating a focused ion beam between the cleaning step and the buffer film forming step. The focused ion beam is applied to the NA (Numeri) by an electrostatic lens.
Even if the cal aperture is small, a fine spot diameter of 0.5 μm or less can be easily obtained. Further, the focused ion beam processing is a sputtering processing in which only the portion irradiated with the ion beam 55 is sequentially removed from the surface as shown in FIG. And almost straight connection holes 1 having a high aspect ratio as shown in FIG. 12B can be formed.

In Japanese Patent Application Laid-Open No. 64-71149, a hole is filled or a wiring is formed by using a laser spot shaped by a rectangular aperture slit or a pinhole of variable size. According to this method, only the film forming portion can be efficiently laser-heated, so that the thermal influence on the periphery can be reduced,
In addition to good filling of holes and formation of uniform wiring, wiring from fine to wide can be arbitrarily formed.

The above cleaning is a step of removing water and the like on the surface of the semiconductor device by using Ar ion sputtering or the like, and can improve adhesion to a buffer film formed in the next step.

The buffer film is formed by sputtering a metal target such as Cr with Ar ions and attaching the metal atoms to the surface of the semiconductor device. As a result, the adhesiveness with the wiring laid by the laser CVD is improved, and the irradiation energy of the laser beam at the time of filling the hole and forming the wiring is reduced.
It is possible to reduce the influence of heat on the lower layer and to speed up the formation of wiring.

Further, it has been clarified by experiments by the inventors of the present application that the buffer film also contributes to a reduction in contact resistance between the Al wiring and the Mo film. FIG. 13 shows the result. The result shown in FIG. 13 shows that the semiconductor device 100 having the Al wiring 101 formed in four layers was □ 5 μm × 6 μm deep by using a focused ion beam.
After forming a connection hole having a thickness of m on the Al wiring 101, it is formed by changing the thickness of Cr as the buffer film 43, and then filling it with a conductive material (Mo) 3 by laser CVD. The resistance was measured. In the figure, it can be seen that the contact resistance is as high as 17 to 90Ω when the Cr film thickness = 0 (no buffer film), but decreases as the Cr film thickness increases. This is because, as described above, when the Cr film thickness is 0, a high-resistance alloy such as MoAl ₁₂ is formed at the interface between the Al wiring 101 and the Mo film 3, and the Cr film 43 is formed of the high-resistance alloy. This is because it works as a barrier film for preventing From this result, it can be seen that in order to obtain a low resistance connection of 1 Ω or less, the Cr film 43 should be formed with a thickness of 20 nm or more.

Further, in Japanese Patent Application Laid-Open No. 1-257351, a connection hole is formed by a focused ion beam as in the second prior art (Japanese Patent Application Laid-Open No. 63-164240), and then the connection hole and a wiring route are laid. A method and means for irradiating a focused ion beam in a CVD material gas atmosphere to form a buffer film, filling holes by laser CVD, and forming wiring on the buffer film are disclosed.

[0014]

Considering the future circuit change of the semiconductor device in which the wiring structure is further miniaturized and multilayered, the first prior art is difficult to apply due to the processing shape of the connection hole as described above. It is.

[0015] The second and third prior arts also have practical limitations. That is, although the buffer film is formed by sputtering, as the aspect ratio of the connection hole is further increased by the above miniaturization and multilayering, the ratio of the thickness of the buffer film formed on the hole bottom and the semiconductor device surface ( Coverage = film thickness at the bottom of the hole / film thickness at the surface). For this reason,
If the bottom of the hole is formed thick enough to prevent the formation of a high-resistance alloy, the film thickness on the surface will be considerable, and the time required to remove the unnecessary buffer film by sputtering at the end of the repair process will increase. Causes a decrease in throughput and a decrease in the thickness of the Mo wiring formed on the surface of the semiconductor device (= increase in resistance)
And other problems. Further, in the second prior art, a buffer film is formed after forming a connection hole and cutting a wiring, and an unnecessary portion of the buffer film is removed by performing etching by Ar ion sputtering after forming the wiring by laser CVD. However, as shown in FIG.
Is perpendicularly incident on the surface of the semiconductor device 100, for example, the buffer film 43 attached to the inner surface of the wiring cut hole 2 cannot be completely removed, and the cut wires 101 are short-circuited due to the remaining buffer film 43. May be. This tendency is remarkable in the case of fine and deep holes. In the second conventional example, the wet
It also states that unnecessary portions of the buffer film are removed by etching, but the opening diameter of the hole is about 2 to 3 μm and the depth is 10 μm.
It is difficult for the etchant to enter the fine deep hole described above, and the buffer film attached to the bottom of the hole and the inner periphery of the hole may not be completely removed as in the case of the etching by sputtering.

Regarding the buffer film, in the fourth prior art (JP-A-1-257351), a focused ion beam CVD (FIB-CVD: Focused Ion Beam-C) is used to form the buffer film.
Since VD) is used, a buffer film having a desired film thickness can be formed even in a fine deep hole. However, since the buffer film is formed by the technique also on the wiring laying route by laser CVD,
When a large number of long-distance wirings are laid, the buffer film formation time is lengthened and the throughput is reduced.

In order to satisfactorily embed the conductive material into the connection hole by laser CVD, the laser light is not applied to the opening or side wall of the connection hole, but is applied only to the bottom of the hole to deposit the conductive material from the portion.・ It is important to deposit. Therefore, an objective lens having a large depth of focus and capable of obtaining a fine spot is indispensable for a fine connection hole having a high aspect ratio. It can be said that embedding in a fine deep hole is difficult in the second prior art described above. On the other hand, in the third prior art (JP-A-64-71149), as shown in FIG. 15, the luminous flux diameter of the laser beam 62 is changed from D _{0 by} a rectangular aperture slit 66 or a pinhole of variable size. After finely shaping the laser light 62 into the objective lens 53, the laser beam 62 is reduced and projected onto the bottom of the hole by the lens 53.
A. is reduced, and it becomes possible to bury the fine deep holes as compared with the second conventional technique. However, it is easy to set the reduced projection image of the laser beam 62 radiated into the connection hole 1 to be smaller than the opening diameter of the connection hole 1 from the configuration of the prior art, but the projected image plane substantially coincides with the hole bottom. There are difficulties in doing so. If the projected image plane of the laser light is greatly shifted above the bottom of the hole, the side wall of the hole is also irradiated with the laser light, and a conductive material is deposited from the side wall of the connection hole, and the conductive material is deposited from the bottom of the hole. In some cases, good connection cannot be obtained due to hindering precipitation or forming cavities. Conversely, if the projected image plane of the laser light is greatly shifted below the bottom of the hole, the edge of the opening of the connection hole is irradiated with laser light, and a conductive substance is deposited from the edge to narrow the entrance of the hole. In some cases, precipitation from the bottom of the hole may be hindered, and good connection may not be obtained. In addition, after expanding the beam diameter of the laser beam with a beam expander, the laser beam is cut off except for the center of the laser beam with a rectangular aperture slit, etc., resulting in a large loss in laser power and a correspondingly high output laser oscillator. Need.

In the second and fourth prior arts described above, FIB is used for forming a connection hole. This is an effective means for forming a fine deep hole, but when it is irradiated onto an electrical insulator such as SiO ₂ that is often used for a protective film of a semiconductor device, electric charges are accumulated (charge-up), and irradiation is performed later. This causes the orbit of the ion beam to shift. When this occurs, the connection holes are formed with a shift as a matter of course, and good connection cannot be obtained. In order to prevent the charge-up, in both of the above prior arts, an electron shower is provided, and a portion to be irradiated with an ion beam (semiconductor device) is irradiated with an electron beam to neutralize the portion.
However, there is a problem that charge-up cannot always be completely prevented due to the intensity distribution and stability of the electron beam, the structure of the semiconductor device, and the like.

An object of the present invention is to eliminate the above-mentioned problems in the prior art, form a fine and deep connection hole with high precision, and fill the connection hole with a conductive material satisfactorily and electrically in a fine pattern. It is an object of the present invention to provide a repair method and a repair device suitable for a circuit change in a development process of a semiconductor device having a multi-layer structure.

[0020]

In order to achieve the above object, the present invention provides: 1. First step and means for removing contamination on the surface of the semiconductor device; 2. A second step and means for forming a conductor having excellent adhesion to the material constituting the protective film on the surface of the semiconductor device and the repair wiring material on the surface of the semiconductor device;
3. A third step and means for forming a connection hole for exposing the wiring in the semiconductor device to be connected to the correction wiring and cutting the wiring in the semiconductor device for changing the circuit; An energy beam (FIB, electron beam) is selectively irradiated into a connection hole in a CVD gas atmosphere to produce a high-resistance alloy having excellent adhesion to a wiring and a repair wiring in a semiconductor device and comprising both of the above-mentioned wiring materials. 4. A fourth step and means for forming a barrier film for preventing Energy beam (FI
5. a fifth step and means for selectively irradiating the inside of the connection hole with B, an electron beam, or a laser beam, and filling the inside of the connection hole with a conductive material that is a part of the correction wiring; 6. A sixth step and means for irradiating and scanning a buffer film on a semiconductor device with a laser beam in a CVD gas atmosphere and additionally forming a correction wiring between connection holes filled with a conductive material; The seventh step and means for removing the unnecessary buffer film other than the lower part of the correction wiring are basically configured, and at least the above steps 1 to 6 are processed without exposure to the atmosphere. Therefore, the above-mentioned means is provided in one vacuum vessel or a plurality of vacuum vessels connected by a gate valve.

In each of the above-described processes, correction data is created in advance and is performed based on the data. The correction data includes the structure of the semiconductor device, cleaning conditions, buffer film forming conditions, wiring cutting coordinates and conditions, connection hole forming coordinates and conditions, barrier film forming conditions, hole filling conditions,
Coordinates and conditions for wiring formation, unnecessary buffer film removal conditions, and the like are entered.

Then, the necessity of the barrier film forming step is determined based on the correction data. That is, when the wiring in the semiconductor device has a barrier film, the above-described barrier film forming step 4 is omitted, and the wiring in the semiconductor device and the conductive material are connected via the existing barrier film. On the other hand, if the semiconductor device wiring does not have a barrier film, FIB or an electron beam is irradiated into the connection hole in a CVD gas atmosphere to form a barrier film having a desired thickness, thereby achieving the above-described electrical and geometrical purposes. Excellent hole filling was made possible.

Also, based on the above-mentioned correction data, an energy beam for decomposing a CVD gas at the time of filling a conductive material into the connection hole is selected from FIB, electron beam, and laser light, and may be used in some cases. so,
It is possible to satisfactorily fill the conductive material into the connection holes of any shape for the above purpose.

Further, when a laser beam is selected as the energy beam at the time of filling the conductive material, the focusing state of the laser beam is changed by changing the effective NA of the objective lens according to the shape of the connection hole. By adjusting the focal position of the laser beam in the depth direction according to the depth of the connection hole, it is possible to fill the connection hole having a shape that was difficult with conventional laser CVD.

Further, after the above-described wiring forming step is completed, the corrected wiring is irradiated with laser light in a vacuum, in a reducing gas atmosphere or in an inert gas atmosphere as necessary to anneal.

[0026]

In the repairing step of the present invention, after the formation of the buffer film, the processing of forming the connection hole and cutting the wiring is performed. The buffer film formed on the surface of the semiconductor device is in contact with the conductive material filled by laser CVD or the like as in the prior art because the buffer film formed on the surface of the semiconductor device is reversed from the repairing process of the second prior art. Although it is not involved in the reduction of the resistance, as in the prior art, the adhesion between the semiconductor device surface and the repair wiring is improved by stress relaxation or the like, and the buffer film stabilizes the absorption of laser light. Contributes to reducing the impact on
In addition, charges on the surface of the semiconductor device due to FIB irradiation at the time of wiring cutting and connection hole formation in the next step and FIB or electron beam irradiation at the time of barrier film formation and hole filling are released to the ground level, so that accumulation (charge up) thereof can be prevented. In addition, it is possible to prevent the displacement of the processing caused by the charge-up, and to perform the high-precision processing of the fine deep hole. Here, what can be used as the buffer film may be any conductor as long as it has excellent physical adhesion to the protective film on the surface of the semiconductor device and the repair wiring by laser CVD. For example, metal such as Ti, Cr, Ni, Ta, W, or the like, or silicide which is an alloy of the metal and Si, or TiN is used.

In addition, based on the correction data such as the wiring structure in the semiconductor device connected to the correction wiring and the shape of the connection hole, the process and the means are selected to form the barrier film and fill the hole, so that high efficiency and high reliability are achieved. Correction is possible.

Further, a barrier film is formed on the wiring exposed by the formation of the connection hole, which has excellent adhesion to the wiring and a conductive substance to be filled in the next step, and prevents the formation of a high-resistance alloy composed of both materials. As a result, a highly reliable low resistance connection can be obtained. The barrier film is formed by FIB-CVD or electron beam CVD (EB-CVD).

As described above, the FIB and the electron beam are provided by NA.
Is small and it is easy to obtain a fine spot diameter of 0.5 μm or less, so that even if the connection hole is a very deep hole, it is possible to selectively irradiate only the bottom of the hole. Therefore, by irradiating the above energy beam in a CVD gas atmosphere, a barrier film can be favorably formed.

In addition, since the buffer film and the barrier film are separately provided, the process is slightly complicated. However, each can be formed to have a desired film thickness. Can be changed as appropriate, so that the aspect ratio can be reduced even in a fine deep hole which is difficult to fill by conventional laser CVD, and the hole can be satisfactorily filled if the opening size is larger than the laser spot diameter. Further, by selecting a barrier film having good absorption for laser light, the irradiation power when filling the hole by laser CVD can be reduced, and good deposition from the bottom of the hole can be performed without damaging the internal wiring.

In the present invention, the energy beam used for filling the hole is selected and used according to the shape of the connection hole.
The beam can be efficiently radiated to the hole bottom without being hindered by the opening of the connection hole, and the conductive material is deposited from the hole bottom. Become. In addition, a conductive material is first buried in a fine connection hole having a high aspect ratio, which cannot be filled by conventional laser CVD, using a FIB or an electron beam until the hole can be filled with a laser beam, and then a laser beam is used. By embedding it, the film formation rate of laser CVD is higher than that of FIB-CVD or electron beam CVD alone,
Correction time can be reduced.

In the hole filling by laser CVD, the focusing state of the laser beam and the position of the minimum spot diameter of the laser beam in the depth direction of the connection hole are adjusted according to the shape of the connection hole. The laser beam is not obstructed by the opening of the connection hole and the laser irradiation on the side wall is minimized, so that the bottom of the hole can be efficiently irradiated. Therefore, electrical
Good hole filling is possible in shape, and stable contact resistance is obtained.

Further, the correction wiring formed in the connection hole and on the surface of the semiconductor device is irradiated with laser light in a vacuum, in a reducing gas atmosphere, or in an inert gas atmosphere, and then annealed. Is thermally decomposed, the ratio of metal components increases, and the specific resistance decreases.

[0034]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A specific embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing an embodiment of a semiconductor device repair apparatus according to the present invention. In this apparatus, a load lock chamber 20, a cleaning chamber 30, a buffer film applying chamber 40, and a main chamber 50 are arranged in four directions around a transfer chamber 10, and the transfer chamber
10 and each chamber are connected by gate valves 12-15. Although not shown, each of the chambers is provided with an exhaust means, so that a desired degree of vacuum can be obtained.

The transfer chamber 10 is a room for transferring the holder 99 on which the semiconductor device 100 is arranged and fixed to each of the above-described chambers.
A transfer mechanism with a transfer arm 16 that can rotate and extend
17 are provided.

The load lock chamber 20 is a chamber for loading and unloading the holder 99 on which the semiconductor device 100 is mounted and fixed, and has a door 21 on the front and a transfer stage 22 inside. Furthermore, although not shown it is connected to a cylinder such as air or N ₂ or Ar through the valves and piping.

The cleaning chamber 30 is a chamber for removing contaminants adhering to the surface of the semiconductor device 100. The cleaning chamber 30 has an upper electrode 31 on the upper surface and a lower electrode 32 on which a holder 99 is mounted on the lower surface facing the upper electrode 31. I have. The upper electrode 31 is connected to the ground level, and the lower electrode 32 is connected to a high frequency power supply. Further, though not shown, it is connected to an inert gas cylinder such as He, N ₂ , Ar, or the like or a cylinder in which the inert gas and O ₂ gas are mixed via a flow rate adjusting valve and piping.

The buffer film applying chamber 40 is a room for forming a buffer film on the surface of the semiconductor device 100.
Similarly, an upper electrode 41 provided with a metal target serving as a buffer film material is provided on an upper surface, and a lower electrode 42 on which a holder 99 is mounted is provided on a lower surface facing the upper electrode 41.

The upper electrode 41 is connected to the high-frequency power source, and the lower electrode is connected to the ground level. Further, although not shown, it is connected to an Ar gas cylinder via a flow control valve and piping.

The main chamber 50 is a room for cutting the wiring in the semiconductor device 100 and additionally forming the barrier film and the correction wiring. As shown in FIG. A stage 51 movable in the Z and θ directions, an exhaust means 58 for evacuating the chamber 50 and a vacuum gauge 59 are provided, and an ion beam irradiation optical system 52 and laser irradiation are provided on the upper surface via a gate valve 56. A laser light introduction window 54 is provided.

The objective lens 53 is provided in the main chamber 50, and is separated from the atmosphere by a laser light introduction window 54. In addition, a detector 57 for detecting secondary ions or secondary electrons generated from a portion to be processed during ion beam processing is provided below the ion beam irradiation optical system 52. Furthermore, it is connected to a means for supplying a CVD gas, which is a material gas for the barrier film and the repair wiring, an inert gas cylinder such as Ar, and the like via a flow rate adjusting valve and piping. Further, a laser irradiation optical system 60 for making the optical axis the same as that of the objective lens 53 is provided above the main chamber 50.

Although the detailed description of the ion beam irradiation optical system 52 used here is omitted, the second prior art (Japanese Patent Laid-Open No. 63-164240) or the fourth prior art (Japanese Patent Laid-Open No. No. 1,257,351), and the ion beam can be irradiated when the gate valve 56 is open.

In this embodiment, the chambers for each processing are connected by a gate valve. However, the processing means may be provided in one chamber. However, with such a structure, the inside of the chamber is exposed to the atmosphere when the semiconductor device is taken in and out, so that the evacuation time for obtaining a high vacuum atmosphere is lengthened. Therefore, it is better to provide only the load lock chamber separately.

Next, details of the laser irradiation optical system 60 will be described with reference to FIG.

The optical system 60 includes a laser optical system for adjusting the laser light to an accurate power and a focused state, and an observation optical system for positioning the laser light and observing the semiconductor device 100. The laser optical system includes a laser oscillator 61, a shutter 63, a power adjuster 64, and a reflection mirror.
84a, 84b, afocal zoom optical system 65, rectangular aperture slit 66 and its driving mechanism 67, reference light source 68, infrared light cut filter 81a, dichroic mirrors 69a, 69b, power measurement mirror 70, power meter 71, It comprises an imaging lens 72a, an infinity correction system objective lens 53, and a laser light introduction window 54. Since the objective lens 53 is provided in the main chamber 50 as described above, a high NA lens can be used. On the other hand, the observation optical system includes a half mirror 73, an imaging lens 72b,
Laser cut filter 74, prisms 75a to 75e, relay lens 76, TV camera 77, cylindrical lens 78a,
78b, CCD line sensors 79a, 79b, illumination light sources 80a, 80
b, infrared cut filter 81b, visible cut filter 8
2, a striped pattern projection mask 83.

The laser light introduction window 54 is provided with a laser light 62
And an anti-reflection coating for the wavelength of various illumination lights, and are arranged so as to be inclined at a Brewster angle with respect to the optical axis of the laser light 62. With these, the laser beam 62
Since the laser beam is hardly reflected or absorbed by the introduction window 54 and enters the objective lens 53, laser irradiation can be performed efficiently. In addition, since reflected light from the introduction window 54 does not enter the TV camera 77, resolution is adversely affected. I will not give. still,
Even if the laser light introduction window 54 is not tilted until the Brewster angle is reached, it is possible to prevent the reflected light from entering the TV camera 77 from the introduction window 54 simply by inclining it by several degrees (about 3 to 5 degrees).

Next, the function of each component of the laser irradiation optical system 60 will be described.

The laser beam 62 emitted from the laser oscillator 61 passes only when the shutter 63 is open, is adjusted to a desired power by the power adjuster 64 based on the correction data, and is adjusted by the reflection mirrors 84a and 84b. It reaches the afocal zoom optical system 65. The optical system 65 adjusts the laser beam 62 to a desired light beam diameter based on the correction data. The laser beam 62 adjusted to a desired light beam diameter passes through the dichroic mirror 69a and irradiates the rectangular aperture slit 66. The opening size of the slit 66 can be arbitrarily changed by the driving mechanism 67 based on the correction data. The laser beam 62 shaped by the rectangular aperture slit 66 is reflected by a power measurement mirror 70 that freely enters and exits the laser beam path, enters the power meter 71, is measured for power, is compared with correction data, and is compared with the correction data. Is adjusted to a desired power. afterwards,
When the shutter 63 is closed, the power measurement mirror 70 is moved out of the laser light path, and the shutter 63 is opened again, the laser light 62 enters and exits the laser light path, passes through the free imaging lens 72a, is reflected by the dichroic mirror 69b, The light passes through the introduction window 54 and enters the objective lens 53. The laser beam 62 shaped by the rectangular aperture slit 66 by the imaging lens 72a and the objective lens 53 has the aperture dimension of the objective lens 53 and the imaging lens.
The image is reduced and projected on the semiconductor device 100 by a size obtained by dividing by a combination magnification with 72a. The irradiation area (spot size) of the laser light 62 reduced and projected on the semiconductor device 100 is known by the observation optical system using reference light (light from the reference light source 68) having the same optical path as the laser light 62. be able to.

On the other hand, the irradiation light emitted from the irradiation light source 80a is cut off the infrared light by the infrared light cut filter 81b, the optical path is bent by the half mirror 73, and enters the objective lens 53. The irradiation light is condensed and irradiated on the semiconductor device 100 by the objective lens 53, and the reflected light enters the objective lens 53 again, a dichroic mirror 69b, a half mirror 73, an imaging lens 72b that can freely enter and exit the optical path, and a laser beam. The light passes through the cut filter 74 and the prism 75a and is incident on the TV camera 77 as a reflected image by the relay lens 76. At this time, the reflected light of the laser light 62 applied to the semiconductor device 100 is cut by the laser light cut filter 74 and does not adversely affect the observation. Information captured by the TV camera 77 is displayed on a monitor TV (not shown).

Further, in the present optical system, it is possible to switch between laser irradiation by the above-described aperture projection method and laser irradiation by the ordinary condensing method. When performing the focusing method, the rectangular aperture slit 66 is fully opened, and the imaging lens
Simply move 72a out of the light path.

The optical system is provided with an automatic focusing mechanism. The visible light cut filter 82 transmits only the infrared light from the illumination light source 80b, and the stripe pattern projection mask 83
Is projected onto the surface of the semiconductor device 100 by the objective lens 53. The striped pattern is linearly compressed by the cylindrical lenses 78a and 78b while being imaged by the imaging lens 72b, and is imaged on the CCD line sensors 79a and 79b. At this time, the positions of the CCD line sensors 79a and 79b are slightly moved back and forth from the image forming position, and are adjusted so that the contrast signals from both sensors 79a and 79b become equal. Here, when the position of the semiconductor device 100 deviates from the focal position of the objective lens 53, one of the contrast signals becomes stronger.

Therefore, a signal for driving the Z stage is sent from the control unit so that the contrast signal becomes equal, so that the focus can be adjusted.

Next, a description will be given of a process of repairing a semiconductor device using the above device. 4 to 6 show a repair flow of the semiconductor device according to the present invention, and FIGS. 7 to 9 show respective steps.

Here, the semiconductor device 100 having the modified symmetry according to the present invention is provided with a wiring 101 and an insulating film 1 on a substrate 103 as shown in FIG.
04 are alternately stacked, upper and lower wirings 101 are connected by through-hole wiring appropriately arranged on an insulating film 104, and a protective film 105 is formed on the uppermost layer. Alternatively, as shown in FIG.
A barrier film 102 for the following effects is formed on the wiring 101 in advance.

Prevention of formation of high resistance alloy between wiring 101 and conductive material filled in connection hole by energy beam CVD Improvement of adhesion between wiring 101 and the above-mentioned conductive material Laser light when filling conductive material into connection hole by laser CVD 62. Reduction of deposition power due to improvement in absorptivity 62 The wiring 101 is mainly composed of any of Al, Au, Cu, etc., and the barrier film 102 is composed of Ti, Cr, Ni,
It is made of a metal such as Ta, W, or the like, an alloy of these metals and Si, or TiN. When a semiconductor device is prototyped, first determine the material of the wiring 101 based on the specifications, and then determine the wiring 1
The material of the barrier film 102 is determined based on 01 and compatibility with the conductive material filled in the connection hole at the time of repair (specific resistance, adhesion, etc. of the formed alloy). The formation of the barrier film 102 can be performed using a normal semiconductor manufacturing process, and is not limited to the upper surface of the wiring 101 shown in FIG.
It may be formed in a laminated shape on the upper and lower surfaces of 1.

The thickness of the barrier film 102 varies depending on the material, the filling process of the conductive material, the process of forming the connection hole, and the like, but the effect can be obtained at 10 nm or more. It is important that the barrier film 102 is used for the semiconductor device 100 at the time of development. When the barrier film 102 is manufactured as a product, eliminating the barrier film 102 can shorten the process and reduce the manufacturing cost. Conversely, if a defect occurs in the manufacturing process when the defect is employed in a product, the location and cause of the defect can be more easily specified by the present technology.

First, the semiconductor device 100 having the above-mentioned structure which needs to be repaired is mounted and fixed on the holder 99 in a state of a wafer or a chip. Then, the evacuation operation of the load / lock chamber 20 is stopped, and air or a gas such as N ₂ or Ar is introduced into the chamber to make it approximately atmospheric pressure, the door 21 is opened, and the holder 99 is placed on the transfer stage 22. Next, the evacuation operation is restarted, and after evacuation of the load / lock chamber 20, the gate valve 12 is opened.
The transfer mechanism 17 in the transfer chamber 10 is driven to transfer the holder 99 to the cleaning chamber 30.

On the other hand, data necessary for correction is also created and input to a control unit (not shown) by a magnetic medium or the like. The data includes the structure of the semiconductor device, cleaning conditions, buffer film forming conditions, coordinates and conditions for wiring cutting,
Coordinates and conditions for forming connection holes, barrier film formation conditions, hole filling conditions, coordinates and conditions for wiring formation, unnecessary buffer film removal conditions, and the like.

Step 1: Surface cleaning (FIG. 7A) Based on the correction data, the holder 99 is placed in an atmosphere of an inert gas such as He, N ₂ , Ar, or a mixed gas of an inert gas and O _2. A high-frequency power is applied to the lower electrode 32 to generate a plasma of the gas between the upper and lower electrodes to be ionized, and a sputtering action or sputtering action + chemical action on the surface of the semiconductor device 100 by the ions 33 causes
Contaminants such as water or organic substances on the surface of the semiconductor device 100 are removed. This treatment improves the adhesion of the buffer film formed in the next step. If the semiconductor device 100 is well stored and the above contaminants are not attached to the surface of the semiconductor device 100, this processing step is unnecessary.

The semiconductor device 100 may be placed in a vacuum atmosphere or an O ₂ gas atmosphere, and the surface of the semiconductor device 100 may be irradiated with ultraviolet light using a mercury lamp or the like to remove the contaminants.
It takes more time than the cleaning by sputtering.

When the cleaning is completed, the above-mentioned atmospheric gas is exhausted, and the gate valves 13 and 14 are opened, and the transport mechanism 17 is opened.
The holder 99 from the cleaning chamber 30 to the buffer film applying chamber 40
Transport to

Step 2: formation of buffer film (FIG. 7 (b)) As in the above-described cleaning step, Ar is formed based on the correction data.
In a gas atmosphere, high-frequency power is applied to an upper electrode 41 provided with a metal target to generate plasma of Ar gas to be ionized, and the metal target is sputtered with the ions. And a buffer film 43 is formed. Examples of the material of the metal target include metals such as Ti, Cr, Ni, Ta, and W, and alloys of these metals and Si. Furthermore, Ar and N
₂ to generate a plasma in a mixed gas or a mixed gas atmosphere of Ar and N ₂ and H ₂ with, sputtering a Ti target in the ion, be formed TiN film as a buffer film 43 in the semiconductor device 100 surface good.

Since the buffer film 43 is formed before the wiring is cut by the focused ion beam and the connection hole is formed in the next step, the surface of the semiconductor device 100 can be made conductive and dropped to the ground level. Even without using such an electron shower, accumulation (charge-up) of electric charges on the surface of the semiconductor device 100 during ion beam irradiation can be eliminated, and the above processing accuracy can be improved and stabilized.

The buffer film 43 does not need to be formed on the entire surface of the semiconductor device 100, as long as it covers at least the wiring laying path by laser CVD and can prevent the charge-up. The film thickness is slightly different depending on the buffer film 43 itself and the material of the wiring formed by the laser CVD described later.
The above effect can be obtained at about 100 nm.

In forming the buffer film 43, high-frequency power is applied to the upper electrode 41 using a high-frequency power source to generate plasma, but it may be performed using a DC power source. The same applies to the cleaning in the above step 1.

After the buffer film 43 is formed, the above-mentioned atmospheric gas is exhausted, the gate valves 14 and 15 are opened, and the holder 99 is transferred from the buffer film providing chamber 40 to the main chamber 50 by the transfer mechanism 17.

Step 3: Connection hole formation and wiring cutting (FIG. 7)
(c)) Place the semiconductor device 100 in a vacuum and irradiate the focused ion beam 55 on the protective film 105 and the insulating film 104 on the wiring 101 to be corrected.
Scanning and the above protective film by the sputtering action
The wiring 101 is exposed by locally removing 105 and the insulating film 104 (connection hole formation). Alternatively, the wiring 101 exposed by the above method is further irradiated with an ion beam to remove the wiring 101 (cutting the wiring). The processing state is such that secondary ions or secondary electrons generated from the processed portion are captured by the detector 57 and synchronized with the scanning signal of the ion beam 55 to be monitored by the monitor T.
By displaying the image on V (not shown), it can be observed as a scanning ion microscope image. Before processing, alignment marks in the semiconductor device 100 are captured as a scanning ion microscope image, and processing is positioned based on this image. Further, the end point of the processing can be known from the secondary ions or secondary electrons captured by the detector 57.

The above ion beam irradiation is performed in an etching gas atmosphere for the protective film 105 and the wiring 101, and the beam 55 is irradiated.
The connection hole 1 and the wiring may be cut by a chemical reaction of the etching gas enhanced by the energy of the etching gas. In that case, it is necessary to provide an etching gas supply unit in the main chamber 50. The etching gas used here is a fluorine-based gas (for example, since the protective film 105 and the insulating film 104 are removed from the protective film 105 and the insulating film 104 in the case of forming the connection hole 1, both of which are formed of Si oxide or nitride). , CF ₄ , CHF ₃ , XeF ₂ , etc.) are effective. On the other hand, regarding the cutting of the wiring 101, a chlorine-based gas (Cl ₂ , C ₂
Cl ₄ , BCl ₃ , SiCl ₄ , etc.) are effective.

After the above process, if the barrier film 102 is formed on the wiring 101 in advance, filling with a conductive material (filling the hole) is performed. If there is no barrier film 102, the filling of the hole is performed after forming the barrier film 102. Do. The distribution of the steps can be automatically performed by inputting the wiring structure (presence or absence of the barrier film) as correction data to the control unit.

Step 4: Barrier Film Formation (FIG. 8A) First, the film thickness of the barrier film 102 is determined based on the correction data. That is, if the connection hole 1 formed in the previous step 3 is not a fine deep hole as shown in FIG.
m. Conversely, in the case of a fine deep hole, connection hole 1
Compare the opening size of the laser irradiation optical system 60 and the spot size obtained, and if the opening size is larger than the spot size, form a barrier film to a depth capable of laser CVD, and set the opening size larger than the spot size. If it is smaller, a barrier film is formed up to the opening of the connection hole. The barrier film is formed by F
This is performed using IB-CVD. The reason for this is that the focused ion beam (FIB) is suitable for selectively irradiating the beam to the bottom of a fine deep hole because the focal length of the lens used is long and the obtained spot diameter is small.

As a barrier film forming procedure, first, a semiconductor device
A CVD gas is introduced while 100 is directly placed under the ion beam optical system 52. After the alignment in the atmosphere by a scanning ion microscope image or the like, the connection hole 1 formed in the previous step is formed.
The ion beam 55 is irradiated and scanned into the inside, the CVD gas is decomposed by the energy, and the barrier film 10 is inserted into the connection hole 1.
2 is formed to the predetermined thickness. CVD used in this process
The gas is decomposed by the irradiation of the ion beam 55, and any gas may be used as long as the gas exhibits the effect as the barrier film 102. For example, carbonyl compounds such as Cr (CO) ₆ , Ni (CO) ₄ , W (CO) ₆ , and halogen compounds such as TiI, WF ₆ , WCl ₆ , etc. are available.
r, Ni, W, Ti, etc. are deposited.

Step 5: Filling conductive material (filling holes) (FIG. 8)
(b) (c)) Also in this step, an energy beam to be used for filling the holes is selected based on the correction data. That is, if the connection hole 1 is not a fine deep hole as shown in FIG. 6, it is buried only by laser CVD. Conversely, in the case of a fine deep hole, the opening size of the connection hole 1 is compared with the spot diameter obtained by the laser irradiation optical system 60. If the opening size is larger than the spot diameter, FIB-CVD is performed as primary filling. Then, two-stage filling is performed to fill up the opening of the connection hole 1 by laser CVD. If the opening size is smaller than the spot diameter, the FI
Filling is performed only by B-CVD. Note that, in the barrier film forming step, the connection hole 1 in which the barrier film 102 is formed up to the opening of the connection hole 1 is not filled.

The reason why the two-stage filling of FIB-CVD and laser CVD is performed in the above-mentioned filling process is as follows.
As described above in the formation of the barrier film, CVD is suitable for selectively irradiating a beam to the bottom of a fine deep hole to form a film from the bottom of the hole, but the film forming speed is low. On the other hand, laser CVD uses FIB-CV as described in the prior art.
Although it is not as suitable for a deep hole as D, it has the advantage that the film formation rate is high. This is because these features were utilized to ensure reliable connection in the shortest possible time.

First, the filling of holes by FIB-CVD will be described. Similar to the formation of the barrier film, after introducing a CVD gas and positioning in the atmosphere, the ion beam 55 is irradiated and scanned in the connection hole 1 for a certain period of time based on the correction data, and the CVD gas is decomposed by the energy, and the connection is made. The hole 1 is filled with the conductive material 3 to the predetermined depth. FIB-C
When positioning and ion beam irradiation are repeatedly performed on all the connection holes 1 that need to be filled by VD, the stage 51 is moved to the laser irradiation optical system 60.
The semiconductor device 100 is located directly under the device.

Next, hole filling is performed by laser CVD. First, based on the correction data, as shown in FIG. 10, an afocal zoom optical system 65 in a laser irradiation optical system 60 is used to adjust the laser beam 62 having a light beam diameter D ₀ to a predetermined light beam diameter D.
Further, the rectangular aperture slit 66 is used to block the peripheral edge of the laser beam 62 narrowed to the beam diameter D ₀ , thereby further reducing the beam diameter. As a result, the effective NA of the objective lens 53 with respect to the laser beam 62 decreases, so that the minimum spot diameter of the laser beam 62 increases, but the depth of focus also increases. On the other hand, since the observation light enters the entrance pupil of the objective lens 53 without being narrowed in the beam diameter unlike the laser beam 62, the sample surface (the surface of the semiconductor device 100) )
The light is focused on a small spot diameter on the top.

When the setting of the optical system is completed as described above, the stage 51 is moved to position the connection hole 1 to be filled. Since the optical system 60 is provided with the automatic focusing mechanism as described above, the surface of the semiconductor device 100 is always at the focal position of the objective lens 53, and positioning can be performed with observation light of a minute spot. When the optical axis is aligned with the center of the connection hole 1 by the above positioning, the stage 51 is raised in the Z direction. The movement amount is determined based on the depth H of the connection hole 1 which is one of the correction data, and is １ ／ of the depth H (= H / 2).
It is. Next, the laser irradiation power is set.

After the above setting, laser irradiation is performed in the connection hole 1 in a CVD gas atmosphere. The laser beam 62 is efficiently applied to the bottom of the connection hole 1 to heat the portion, so that the conductive material 3 precipitates from the bottom of the hole. The laser irradiation may be performed for a certain period of time according to the dimensions of the connection hole 1, but the yield is better when the change in the reflection intensity or the amount of the observation light from the opening of the connection hole 1 is detected and the end point is determined. Fill in the holes.

The CVD material gas used in this hole filling step is:
Any material may be used as long as it is decomposed by irradiation of an energy beam such as an ion beam or a laser beam to generate the conductive substance 3. For example, Mo (CO) ₆ , W (CO) ₆ , Ni (CO)
_4, metal carbonyl etc., MoF _6, WF _6, halogen compounds such as triisobutylaluminum (TIBA), trimethyl aluminum halide (TMAH), alkyl compounds such as other like, dimethyl gold acetylacetonate (Me ₂ Au (acac)), dimethyl gold hexafluoroacetylacetonate _{(Me 2 Au (hfac))} , kappa-bis hexafluoroacetylacetonate (Cu (hfac) _2), and so on. Mo is a conductive material 1 from Mo (CO) ₆ or MoF _6.
It precipitates as 3, and from W (CO) ₆ and WF ₆ , W, Ni (CO)
₄ from Ni, TIBA and TMAH from Al, Me ₂ Au (a
cac) and Me ₂ Au (hfac), and Cu from Cu (hfac) _2.
Is obtained.

In addition to the focused ion beam 55 and the laser beam 62, an electron beam can be used as the energy beam.
The electron beam is also used after being finely focused on the semiconductor device 100 by a lens. Like a focused ion beam, an electron beam has a long focal length (= N.A. Is small) of the lens used, but the spot diameter of the obtained beam is small. Can be applied to the barrier film formation and hole filling in the previous process. However, since the film formation rate is slow as in the case of FIB-CVD, the larger the volume and number of the connection holes 1, the longer the correction time. Therefore, even if the electron beam is used for filling the hole, it is more efficient to use the electron beam together with the laser beam. still,
The electron beam or the focused ion beam may be irradiated and scanned in the form of a fine spot, but a beam shaping means such as a rectangular aperture slit 66 provided in the laser irradiation optical system 60 is provided, and the beam shaped by the means is connected. The light may be projected and irradiated into the hole 1. In this case, intermittent irradiation of the beam may be formed with good film quality in accordance with the replacement of the CVD gas.

When the embedding into all the connection holes 1 is completed by the above-described means, wiring is formed by using laser CVD.

Step 5: Wiring Formation (FIG. 9A) As a basic operation in this step, as shown in FIG. 9A, a laser beam 62 is irradiated in a CVD material gas atmosphere based on correction data as shown in FIG. At the same time as the irradiation, the stage 51 is moved to scan between the pair of connection holes filled with the conductive material, and the correction wiring 4 is additionally formed.

By operating the automatic focusing mechanism during the formation of the wiring, the surface of the semiconductor device 100 is always at the in-focus position, so that a stable wiring can be formed.

The laser beam used in this step may be of either the aperture projection type or the condensing type. However, when wiring of various widths is desired to be formed, the opening size of the rectangular aperture slit 66 is changed. An aperture projection method in which the size of a projection image (laser light) on the surface of the semiconductor device 100 can be changed is suitable. Also, if you want to form fine wiring,
It is advantageous to use a condensing method in which a laser beam is incident on the entire entrance pupil of the objective lens 53 having a high NA to obtain a fine spot diameter. Therefore, when the correction wiring 4 is drawn out of a complicated part, for example, a part where the connection holes 1 are densely arranged, a light-condensing method is used, and in a part that does not interfere with other correction wirings 4, an aperture projection method that can reduce the resistance is used. Is used.

After all of the correction wirings 4 are formed on the semiconductor device 100 by this step, as described in the fourth prior art, a CVD gas is exhausted in a high vacuum or in a reducing gas atmosphere such as H _2. Alternatively, annealing is performed by irradiating the wiring 4 with a laser beam 62 in an atmosphere of an inert gas such as He, N ₂ , Ar, or the like. By this annealing process, the repair wiring 4
Since the compound therein thermally decomposes and the ratio of the metal component increases, the specific resistance decreases. Therefore, logic L for performing high-speed processing
When it is desired to reduce the connection resistance as much as possible, for example, when correcting the SI, it is preferable to use this annealing process.

After the formation of all the wirings (and the annealing process), the CVD gas is exhausted to make the inside of the main chamber 50 high vacuum. Next, the gate valves 13 and 15 are opened, and the semiconductor device 100 is transferred together with the holder 99 from the chamber 50 to the cleaning chamber 30 by the transfer means.
Close 3,15.

Step 6: Removal of Unnecessary Buffer Film (FIG. 4 (c)) As in Step 1, plasma is generated in an Ar gas or halogen-based etching gas atmosphere based on the correction data, and ions or radicals are generated. Unnecessary buffer film 43 other than under the correction wiring 4 is removed by sputtering or by causing a chemical reaction and etching.

Thereafter, the gas is exhausted, and the gate valve is exhausted.
The semiconductor device 100 is transported together with the holder 99 from the cleaning chamber 30 to the load / lock chamber 20 by the transport means by opening 12 and 13, and the gate valves 12 and 13 are closed. Then, the load / lock chamber 20 is opened to the atmosphere, and the holder 99 is taken out.
The semiconductor device 100 is removed from 99 to complete the correction.

[0089]

As described above, according to the present invention, since the buffer film is formed before the wiring is cut by the focused ion beam and the connection hole is formed, the charge-up on the surface of the semiconductor device can be prevented, and the connection with high precision can be prevented. Holes can be formed. Further, since it is not necessary to provide a charge-up preventing means such as an electronic shower in the used apparatus, the apparatus cost can be reduced.

In addition, since the barrier film can be formed at an arbitrary thickness even in a fine deep hole where it is difficult to form a buffer film by the conventional technique, it is possible to prevent the formation of a high-resistance alloy between the wiring in the semiconductor device and the conductive material and to improve the adhesion. Improvement can be achieved, and highly reliable low resistance connection can be achieved.

Further, since the energy beam used for filling the hole is selected according to the dimensions of the connection hole, the conductive material can be reliably filled in the connection hole, and the repair yield is improved.

Further, since a high NA objective lens can be used for the laser irradiation optical system, high-resolution observation and high-precision positioning are possible. Moreover, according to the dimensions of the connection hole at the time of filling the hole, the effective NA for the laser beam is lowered, and the focal position is fed into the connection hole to irradiate the laser, so that the conductive material can be reliably filled into the connection hole. The repair yield is improved.

[Brief description of the drawings]

FIG. 1 shows an embodiment of the apparatus of the present invention.

FIG. 2 is a schematic view of a main chamber in the apparatus of the present invention.

FIG. 3 is a laser irradiation optical system in the apparatus of the present invention.

FIG. 4 is a flowchart of a semiconductor device modification according to the present invention.

FIG. 5 is a flowchart of forming a barrier film according to the present invention.

FIG. 6 is a flowchart for filling a hole according to the present invention.

FIG. 7 is a process (1) for repairing a semiconductor device according to the present invention;

FIG. 8 is a process (2) for repairing a semiconductor device according to the present invention.

FIG. 9 is a process (3) for repairing a semiconductor device according to the present invention;

FIG. 10 is an operation diagram of the optical system of the present invention in filling holes.

FIG. 11 is a view showing a conventional method for forming a connection hole by laser processing;

FIG. 12: Connection hole formation by focused ion beam

FIG. 13 is a relationship between buffer film thickness and contact resistance.

FIG. 14 is a problem in the second conventional technique.

FIG. 15 shows a laser irradiation method using an NA reduction method in the prior art.

[Explanation of symbols]

 1: Connection hole, 2: Wiring cut hole, 3: Conductive substance, 4: Correction wiring, 10: Transfer chamber, 12-15: Gate valve, 16: Transfer arm, 20: Load lock chamber, 30: Cleaning chamber, 33… Ion, 40… Buffer film application chamber, 43… Buffer film, 50… Main chamber, 51… Stage, 52… Ion beam irradiation optical system, 53… Objective lens, 55… Ion beam, 60… Laser irradiation optical system, 62: laser beam, 65: afocal zoom optical system, 66: rectangular aperture slit, 72: imaging lens, 78: cylindrical lens, 79: CCD line sensor, 83: stripe pattern mask, 99: holder, 100: semiconductor device, 101: semiconductor device wiring, 102: barrier film.

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Takashi Uemura 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside the Hitachi, Ltd. Production Technology Research Laboratory (72) Inventor Mikiki Kawaji 2326 Imai, Ome-shi, Tokyo (72) Inventor Toshio Yamada 2326 Imai, Ome-shi, Tokyo In-house Hitachi, Ltd. Device Development Center (56) References JP-A-64-37035 (JP, A) JP-A-63- 100746 (JP, A) JP-A-1-204448 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/3205 H01L 21/768

Claims (6)

(57) [Claims] 1. A method for correcting a wiring of a semiconductor device, the method comprising the steps of: Step 1: Cleaning the surface of the semiconductor device Step 2: Forming a buffer film on the surface of the semiconductor device Step 3: Forming connection holes in the protective film of the semiconductor device and exposing the wiring by focused ion beam processing Step 4: In a CVD material gas atmosphere Barrier film formation by selective first energy beam irradiation on the connection hole Step 5: Filling of conductive material by selective second energy beam irradiation on the connection hole in a CVD material gas atmosphere Step 6: CVD material Laser light is relatively scanned over the semiconductor device in a gas atmosphere, and a new wiring film is additionally formed on the protective film of the semiconductor device. Step 7: Removal of unnecessary buffer film 2. The method according to claim 1, wherein said first energy beam is a focused ion beam, and said second energy beam is a laser beam. 3. A semiconductor device including a connection hole in which a portion of a protective film covering a surface of a semiconductor device is removed to form a connection hole, a wiring is exposed at a bottom of the connection hole, and the wiring is exposed. The surface of the substrate is selectively irradiated with laser light in a CVD gas atmosphere to decompose the CVD gas to deposit a conductive material, and to form a new wiring film connected to the exposed wiring by the deposited conductive material. A method of additionally forming on a surface of a semiconductor device, wherein a laser beam is irradiated by changing an effective numerical aperture of an objective lens by changing a light beam diameter of a laser beam incident on the objective lens according to a size of the connection hole. A method for correcting a wiring of a semiconductor device. 4. A new wiring film the additional formation, the specific resistance of the wiring film by annealing the new wiring layer is irradiated with a laser in a vacuum or reducing gas atmosphere or an inert gas atmosphere 4. The method according to claim 1, wherein the number of lines is reduced. 5. The modified apparatus of a semiconductor device to be added forming a new wiring layer to be connected to the internal wiring of a semiconductor device inside wiring is coated with a surface formed with a protective film through a predetermined process A load lock chamber means for taking the semiconductor device in and out, a transport means for transporting the semiconductor device carried in the load lock chamber means, and an electrode for generating plasma, and Cleaning means for cleaning the surface of the semiconductor device transported by the transport means, buffer film forming means for forming a buffer film on the surface of the semiconductor device processed by the cleaning means, and generating a first energy beam An energy beam generating portion provided on a part of the protective film of the semiconductor device having an energy beam generating portion and a buffer film formed by the buffer film forming means; Removing processing means for irradiating the first energy beam generated in step 1 to remove a part of the protective film to expose a part of the wiring; and an energy beam generating unit for generating a second energy beam. A gas supply unit for supplying a first CVD gas; and a first CV on the wiring exposed by the removal processing means.
A barrier film forming unit configured to locally form a barrier film by irradiating the second energy beam generated by the energy beam generating unit with the D gas supplied, and an energy beam generating unit configured to generate a third energy beam A gas supply unit for supplying a second CVD gas; a gas supply unit configured to generate a second CVD gas on the barrier film formed by the barrier film formation unit in a state where the second CVD gas is supplied by the energy beam generation unit; And a conductive material depositing means for radiating a third energy beam to deposit a conductive material. Wherein said first energy beam and the second energy beam is a focused ion beam, of the third semiconductor device according to claim 5, wherein the energy beam is characterized in that it is a laser beam Correction device.