JP2592277B2 - Manufacturing method of bipolar semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a method suitable for manufacturing a bipolar semiconductor device using a compound semiconductor as a material and having a planar structure. A step of sequentially growing a collector layer, a base layer, an etching stop layer, and a base extraction layer on a compound semiconductor substrate, and then from the surface of the base extraction layer to the etching stop layer. Forming an opening that penetrates to the surface of the substrate; and growing an emitter layer having substantially the same height as the base layer on the etching stop layer exposed in the opening; and An emitter electrode that contacts the layer, a collector electrode that contacts the collector layer, and a contact with the base layer And a step of forming a base electrode.

[Industrial applications]

The present invention relates to a method suitable for manufacturing a bipolar semiconductor device using a compound semiconductor as a material and having a planar structure.

[Conventional technology]

Heterojunction bipolar transistors made of a compound semiconductor are expected to operate at a higher speed than silicon-based heterojunction bipolar transistors.

By the way, as for the compound semiconductor, the diffusion front is not constant because the diffusion technique is inexperienced, so that the base thickness and the emitter layer cannot be controlled.

Therefore, conventionally, a laminated structure of npn or pnp is formed,
Stepwise etching is performed to expose a part of each semiconductor layer, and an electrode is formed there.

[Problems to be solved by the invention]

In the bipolar semiconductor device manufactured according to the above-described conventional technique, there is a step between the electrodes, wiring is difficult, and a measure must be taken against the disconnection, and since the base layer is very thin, In addition, there is a possibility that the electrode metal may penetrate.

The present invention seeks to easily convert this type of bipolar semiconductor device into a planar one by employing extremely simple means.

[Means for solving the problem]

In the method for manufacturing a bipolar semiconductor device according to the present invention,
On a compound semiconductor substrate (for example, an n ⁺ -type GaAs substrate 1), a collector layer (for example, an n-type Al _x Ga _{1 -x} As collector layer 2), a base layer (for example, a p-type GaAs base layer 3), and an etching stop layer (for example, i) A step of sequentially growing a type Al _x Ga _1-x As etching stop layer 4) and a base extraction layer (for example, a p-type GaAs base extraction layer 5), and then removing the etching stop layer from the surface of the base extraction layer. Forming an opening (for example, opening 5A) penetrating to the surface; and then forming an emitter layer (for example, n-type Al) having substantially the same height as the base layer on the etching stop layer exposed in the opening. _x Ga _1-x As emitter layer 7) growing step, and then an emitter electrode (for example, emitter electrode 8) contacting the emitter layer
And a step of forming a collector electrode (for example, a collector electrode 9) that contacts the collector layer and a base electrode (for example, a base electrode 10) that contacts the base layer.

[Action]

By taking the above means, despite using a compound semiconductor for which impurity diffusion technology has not been established,
A planarized bipolar semiconductor device can be easily manufactured similarly to a normal planar type semiconductor device.

〔Example〕

FIG. 1 to FIG. 5 are cutaway side views of a main part of a semiconductor device at important process steps for explaining an embodiment of the present invention.

See Fig. 1. (1) Metal organic chemical vapor deposition
al Vapor Deposition: depending on applying MOCVD) method, n ⁺ -type GaAs n-type Al _x Ga _1-x As collector layer 2 on a semiconductor substrate 1, p-type GaAs base layer 3, i-type Al _x Ga _{1 -x} As etching stop layer 4 and p-type GaAs base extraction layer 5 are grown.

The main data of each semiconductor layer formed here is as follows.

(A) For substrate 1 Impurity: Si Impurity concentration: 1 × 10 ¹⁸ [cm ⁻³ ] (b) For collector layer 2 x value: 0.3 to 0.4 Thickness: 1000 [1000] Impurity: Si Impurity concentration: 2 × 10 ¹⁷ [cm ^-3 ] (c) About base layer 3 Thickness: 500 [Å] Impurity: Zn (Mg may be used) Impurity concentration: 4 × 10 ¹⁹ [cm ^-3 ] (d) Etching stop layer 4 x value :> 0.1 Thickness: 25 [Å] (e) About the base lead layer 5 Impurity: Zn (Mg is also acceptable) Impurity concentration: 4 × 10 ¹⁹ [cm ^-3 ] See FIG. 2 (2) Sputtering method is applied Depending on the p-type
A silicon dioxide (SiO ₂ ) film 6 having a thickness of, for example, about 2000 [Å] is formed on the GaAs base extraction layer 5.

(3) By applying a normal photolithography technique, the silicon dioxide film 6 is selectively etched to form an opening 6A in a portion where an emitter region is to be formed.
In this case, HCl may be used as an etchant.

(4) By applying a reactive ion etching (RIE) method in which the etching gas is CCl ₂ F ₂ , the silicon dioxide film 6 is used as a mask and p
Type GaAs base extraction layer 5 is etched and openings 5A
To form This etching is automatically stopped at the surface of the i-type Al _x Ga _{1 -x} As etching stop layer 4.

See Fig. 3 (5) Metal organic chemical vapor deposition
An n-type Al _x Ga _{1 -x} As emitter layer 7 is grown in the opening 5A by applying an al vapor deposition (MOCVD) method.

The main data on the emitter layer 7 is as follows.

x value: 0.3 to 0.4 Thickness: same as base layer 5 Impurity: Si Impurity concentration: 1 × 10 ¹⁸ [cm ^-3 ] See FIG. 4 (6) Apply vacuum deposition method and ordinary photolithography technology , An emitter electrode 8 and a collector electrode 9 are formed.

The main data of each of these electrodes is as follows.

Material: AuGe / Au Thickness: 200 [Å] / 2800 [Å] See FIG. 5 (7) By applying ordinary photolithography technology, the silicon dioxide film 6 is selectively etched to form a base electrode. Form a contact window. In this case, HCl may be used as an etchant.

(8) The base electrode 10 is formed by applying a vacuum deposition method and a normal photolithography technique.

Examples of main data regarding the base electrode 10 are as follows.

Material: AuZn / Au Thickness: 200 [Å] / 2800 [Å] (9) An alloying heat treatment is performed at a temperature of 450 [° C.] in a nitrogen (N ₂ ) atmosphere for 5 [minutes].

The heterojunction bipolar semiconductor device completed as described above is flattened in the same manner as a normal planar type semiconductor device, as is clear from the drawing.

〔The invention's effect〕

In the method for manufacturing a bipolar semiconductor device according to the present invention,
An etching stop layer and a base extraction layer are formed on the base layer, an opening is formed by removing the base extraction layer in a portion where the emitter layer is to be formed, and an emitter is formed in the opening at substantially the same height as the base extraction layer. A layer is formed.

By adopting the above configuration, despite using a compound semiconductor for which impurity diffusion technology has not been established,
A planarized bipolar semiconductor device can be easily manufactured similarly to a normal planar type semiconductor device.

[Brief description of the drawings]

1 to 5 are cutaway side views of a main part of a semiconductor device at important points in a process for explaining an embodiment of the present invention. In the figure, 1 is a substrate, 2 is a collector layer, 3 is a base layer, 4 is an etching stop layer, 5 is a base extraction layer, 6
Denotes a silicon dioxide film, 7 denotes an emitter layer, 8 denotes an emitter electrode, 9 denotes a collector electrode, and 10 denotes a base electrode.

Claims (1)

(57) [Claims] A step of sequentially growing a collector layer, a base layer, an etching stop layer, and a base extraction layer on a compound semiconductor substrate; and an opening penetrating from the surface of the base extraction layer to the surface of the etching stop layer. Forming an emitter layer having substantially the same height as the base layer on the etching stop layer exposed in the opening; and then forming an emitter electrode in contact with the emitter layer. Forming a collector electrode contacting the collector layer and a base electrode contacting the base layer. A method for manufacturing a bipolar semiconductor device, comprising: