JP2580982B2 - LSI power supply wiring layout system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LSI power supply wiring layout system, and more particularly to an LSI power supply wiring layout system for laying out power supply wirings including a plurality of hard power supply circuit wirings forming a semiconductor integrated circuit on one substrate. About.

[0002]

2. Description of the Related Art In recent years, in designing large-scale LSIs,
A method of arranging a circuit having a unitized function as a module having a mask pattern fixed in advance in an optimal design, that is, a hard macro, and performing a wiring layout of a power supply of the hard macro and a power supply of the entire LSI is adopted. It has become In this case, as the power supply wiring, a peripheral power supply line is provided around the circuit area of each hard macro, and these peripheral power supply lines are connected to form a power supply line of the entire LSI. FIG. 3 shows a layout diagram of an LSI in which the peripheral power supply wiring of the hard macro is laid out by the LSI power supply wiring system adopting such a power supply wiring layout method.

In the layout of the peripheral power supply wiring, a hard macro circuit area 23 of each of the hard macros constituting the LSI is arranged on one substrate 21, and the peripheral power supply wiring 2 is provided around each of these hard macro circuit areas 23.
4 are laid out.

In the layout of the peripheral power supply wiring,
When the vertical wiring was arranged in the first wiring layer as the wiring having a high priority, the horizontal wiring was arranged in the second wiring layer (broken line portion), and interconnection was performed in each wiring layer. Sometimes you need to make sure you don't bump into each other. In an LSI using a plurality of hard macros of the same circuit, there are cases where these hard macros are arranged in the long side direction in the vertical direction and the horizontal direction as shown in FIG. In this case, the peripheral power supply wiring in the long side direction is arranged on the first wiring layer as shown on the left side of FIG. 3 and on the second wiring layer as shown on the right side of FIG. 2 for hard macro
There are two circulating power supply wiring layouts.

[0005] There is an LSI power supply wiring layout system in which the layout of the peripheral power supply wiring is provided as a library, and the layout power supply wiring of the hard macro is laid out using the layout library (for example, Japanese Patent Laid-Open No. 2-291148). reference).

FIG. 4 is a block diagram showing an example of this type of LSI power supply wiring layout system, and FIG. 5 is a flowchart showing the operation thereof.

This LSI power supply wiring layout system converts a netlist including the peripheral power supply wirings of a plurality of hard macros which are formed on a single substrate and constitutes a semiconductor integrated circuit into a library of the peripheral power supply wirings corresponding to these netlists. A netlist file 1a for storing the names of the hard macros to be laid out from the netlist file 1a, a netlist reading unit 3a for reading a netlist and a library name of a hard macro to be laid out from the netlist file 1a; Library library 2a for storing the library names of the hard macros read by the netlist reading unit 3a and the layout data corresponding to the library names of the hard macros read by the netlist reading unit 3a from the layout library 2a. 4a, a circulating power supply wiring layout section 8 for laying out the circulating power supply wiring of each hard macro in accordance with the layout data read by the library reading section 4a, the net list read by the net list reading section 3a, and a predetermined design standard. A power supply wiring layout section 6a for laying out other power supply wirings of this LSI in accordance with the netlist from the netlist reading section 3a with respect to the layout result by the peripheral power supply wiring layout section 8;
and a simulation section 7 for performing a predetermined confirmation simulation on the layout result from the section a.

Next, the operation of the LSI power supply wiring layout system will be described.

In the layout library 2a, layout data of at least two orbiting power supply wirings for one hard macro is stored corresponding to each library name. The layout data of the two circuit power supply wirings is the library wirings 25a and 25b shown in FIG.
Respectively.

The circulating power supply wiring layout section 8 lays out the circulating power supply wiring layout data of the library name corresponding to the netlist read by the netlist reading section 3a in accordance with a predetermined design standard (step S13). At this time, if the wiring layer does not conform to the design standard, the library name is replaced, the layout data of the library name is read again from the layout library 2a, and the above operation is repeated (S14, S15,
S12 to S14).

After the layout of the peripheral power supply wiring of each hard macro is completed, the power supply wiring layout section 6a executes
The layout of the remaining power wiring such as the interconnection of the peripheral power wiring is performed (S16). At this point, the layout design of the power supply wiring is almost completed, and a simulation for confirming the power supply wiring is performed (S 19). (S18), and then a confirmation simulation is performed. This is because the simulation program, reference, and the like are set based on the original library name in the netlist. If the result of the confirmation simulation is good, the layout design of the power supply wiring ends.

[0012]

In this conventional LSI power supply wiring layout system, if there is a difference in layout data such as a difference in a power supply wiring formation layer even in the same hard macro in the layout library, the same is assumed. Since the layout data is stored in association with different library names, the drawback of increasing the capacity of the layout library and the change in the width and spacing of the power supply wiring, However, it is necessary to store layout data incorporating these changes in association with a new library name, which further increases the capacity of the layout library and complicates its management. Priority wiring when layout is performed based on the layout data of the library name It reads the wiring layer are different when re-layout data by interchanging the library name countercurrent, it is necessary to undo the previous confirmation simulation, the number of steps is a drawback that an increased number of design steps is increased.

An object of the present invention is to provide an LSI power supply wiring layout system that can reduce the capacity of a layout library, facilitate its management, and reduce the number of design steps.

[0014]

An LSI power supply wiring layout system according to the present invention includes a netlist including a plurality of hard power supply wirings formed on a single substrate and constituting a semiconductor integrated circuit. A netlist file to be stored together with the library name of the corresponding peripheral power supply wiring area, netlist reading means for reading a netlist and a library name of a hard macro to be layout-designed from the netlist file, A layout library for storing layout data of the peripheral power supply wiring forming area in association with the library name of the peripheral power supply wiring area; and a layout library corresponding to the library name of the hard macro read by the netlist reading means. Library reading means for reading from a library, wiring area arranging means for arranging a circulating power supply wiring area corresponding to the layout data read by the library reading means on the substrate, and circulating power supply arranging by the wiring area arranging means. Power supply wiring layout means for laying out the peripheral power supply wiring and laying out all the power supply wirings on the substrate in accordance with a predetermined design standard and a netlist read by the netlist reading means for the wiring area; Simulation means for performing a predetermined confirmation simulation on the power supply wiring laid out by the layout means.

[0015]

Next, an embodiment of the present invention will be described with reference to the drawings.

FIGS. 1A and 1B are a block diagram and an operation flowchart showing an embodiment of the present invention.

In this embodiment, a netlist including the peripheral power supply wirings of a plurality of hard macros which are formed on one substrate and constitute a semiconductor integrated circuit is stored together with the library names of the peripheral power supply wiring areas corresponding to the netlists. A netlist file to be stored; a netlist reading unit 3 for reading a netlist and a library name of a hard macro to be laid out from the netlist file 1; and layout data of an area for forming a peripheral power supply wiring of each of the plurality of hard macros Library library 2 that stores the layout data corresponding to the library name of the hard macro read by the netlist reading unit 3 from the layout library 2 and a library library 2 that stores the layout data corresponding to the library name of the circuit power supply wiring area. This live A wiring area arranging section 5 for arranging a corresponding circulating power supply wiring area on the substrate according to the layout data read by the re-reading section 4; The power supply wiring layout section 6 lays out the power supply wiring in accordance with the netlist read by the reference and netlist reading section 3 and lays out all the power supply wirings on the substrate. And a simulation unit 7 for performing a predetermined confirmation simulation on the power supply wiring.

Next, the operation of this embodiment will be described.
FIGS. 2A and 2B are layout diagrams of an LSI shown in the order of layout steps for explaining the operation of this embodiment.

The layout library 2 includes, in one hard macro, a layout of a circulating power supply wiring region 22 having an area around a hard macro circuit region 23 and capable of laying out power supply wirings corresponding to the power supply capacity to the hard macro. Data is stored in a one-to-one correspondence.

The wiring area arranging section 5 reads (S1,
S2) Based on the layout data corresponding to the library name in the netlist, the peripheral power supply wiring area 22 of each hard macro is arranged (laid out) (FIG. 2A, S3). The power supply wiring layout section 6 includes, for the peripheral power supply wiring area 22 arranged by the wiring area arrangement section 5, the definition of the wiring width of the power supply wiring, the wiring interval, the relationship between the wiring direction and the wiring layer, the priority wiring direction, and the like. After laying out the peripheral power supply wiring 24 in accordance with the design criteria and the read netlist (FIG. 2)
(B), S4), the layout of the power supply wiring of all the LSIs including the connection between these peripheral power supply wirings 24 is performed (S4).
5). Thereafter, a confirmation simulation is performed by the simulation unit 7 (S6). If the result is good, the layout design of the power supply wiring ends.

In this embodiment, the hard macro circuit area 2
The layout data of the peripheral power supply wiring region 22 in a state where the peripheral power supply wiring 24 is not disposed around the peripheral power supply line 3 is stored in the layout library 2. Since the wiring 24 is configured to be laid out, the wiring layer in the priority direction of the peripheral power supply wiring 24 can be matched even if the same hard macro has a longer side in either the vertical direction or the horizontal direction. Only one layout data of the library for one hard macro is required, and even if the width and the interval of the power supply wiring are changed, only the processing of the power supply wiring layout unit 6 is sufficient. Since the number of layout data can be reduced, the management of the layout data becomes easy, and there is no mismatch between wiring layers in the priority direction. Without replacement of the library name, it is possible to reduce the design man-hours.

[0022]

As described above, according to the present invention, in the layout library, the layout data of the peripheral power supply wiring area before the peripheral power supply wiring is arranged is stored for each hard macro. After arranging, the power supply wiring layout means lays out the circulating power supply wiring in this area, so that only one library layout data is required for one hard macro, thus reducing the capacity of the layout library. In addition, the management can be easily performed, and the number of design steps can be reduced without changing the library name.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention and its operation flowchart.

FIG. 2 is a layout diagram of an LSI shown in a layout process order for explaining the operation of the embodiment shown in FIG. 1;

FIG. 3 is an LSI layout diagram for explaining a layout method by a conventional LSI power supply wiring layout system.

FIG. 4 is a block diagram showing an example of a conventional LSI power supply wiring layout system.

FIG. 5 is an operation flowchart for explaining the operation of the LSI power supply wiring layout system shown in FIG. 4;

[Explanation of symbols]

 1, 1a Netlist file 2, 2a Layout library 3, 3a Netlist reading section 4, 4a Library reading section 5 Wiring area arranging section 6, 6a Power supply wiring layout section 7 Simulation section 8 Loop power supply wiring layout section 21 Board 22 Circuit power supply Wiring area 23 Hard macro circuit area 24 Circular power supply wiring 25a, 25b Library wiring S1 to S6, S11 to S19 Step

Claims (2)

(57) [Claims] 1. A net for storing, on a single substrate, a net list including the peripheral power supply wirings of a plurality of hard macros constituting a semiconductor integrated circuit together with the library names of the peripheral power supply wiring areas corresponding to these net lists. A list file, netlist reading means for reading a netlist and a library name of a hard macro to be layout-designed from the netlist file, and a layout power supply wiring area for forming layout power supply wiring formation areas of the plurality of hard macros. A library library for storing the layout data corresponding to the library name of the hard macro read by the netlist reading means from the layout library; Wiring area arranging means for arranging the circulating power supply wiring area corresponding to the layout data read by the stage on the substrate; predetermined design criteria and the netlist for the circulating power supply wiring area arranged by the wiring area arranging means; A power supply wiring layout means for laying out the peripheral power supply wiring in accordance with the netlist read by the reading means and laying out all the power supply wirings on the substrate; and a power supply wiring laid out by the power supply wiring layout means. An LSI power supply wiring layout system, comprising: simulation means for performing a confirmation simulation. 2. The LSI power supply wiring layout system according to claim 1, wherein the design standards include at least a definition of a wiring width, a wiring interval, a relation between a wiring direction and a wiring layer, and a priority wiring direction of the power supply wiring.