JP2580727B2 - Wiring method of multilayer printed circuit board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] Regarding a wiring method of a multilayer printed circuit board widely used in various electronic devices, providing a plurality of patterns in each wiring circuit to increase a sectional area and a surface area of a signal pattern. For the purpose, wiring is performed at a fixed interval so that at least two fine width patterns are respectively opposed to a designated path inside the signal layer laminated with a certain thickness, and the patterns are connected by VIA to connect the main surface of the substrate. To conduct.

[Industrial applications]

The present invention relates to a wiring method for a multilayer printed circuit board widely used in various electronic devices.

In recent years, in particular, semiconductor chips mounted on printed boards of various computers and the like have been increasingly integrated, and input / output terminals are arranged at a high density at a fine pitch, and high density mounting is required. Thus, a printed wiring board (hereinafter abbreviated as a substrate) has a fine wiring pattern formed at a high density.

As a result, the electrical resistance of the wiring pattern is increased, which adversely affects the transmitted signal waveform. Therefore, a new multilayer printed circuit board wiring method in which the cross-sectional area and the surface area of the wiring pattern are increased to reduce the DC resistance and the high-frequency resistance. is necessary.

[Conventional technology]

Conventionally widely used multilayer printed circuit boards, as shown in the cross-sectional view of FIG. 2, a signal layer 4 formed by laminating ceramics on which a signal pattern 4-1 is printed and having a thickness "T" of, for example, 1.8 mm. Power supply ground layers 3 (hereinafter GN)
The surface layer 2 is laminated via a D layer.

The wiring method of the substrate is, for example, as shown in the plan view of FIG. 3, mounting the input / output terminals provided on the electronic component 1 such as a semiconductor chip at the center of the main surface of the surface layer 2, or mounting the electronic component 1. A connection pad 2-1 for connecting to a lead terminal of an iC socket to be connected is provided, and connection terminals 2-2 for connection to the outside are arranged on the outer peripheral edge of the substrate, and a pattern 4-1 shown by a dotted line and not shown. VIA bonding pad 2-1 and connection terminal 2-
2 are connected.

The pattern 4-1 is formed of a conductor having a width, W = 200 μm × thickness, and t = 20 μm as shown in the cross-sectional view of FIG. It is wired on the surface that is 0.9 mm from the GND layer 3 so that the impedance of the conductor matches.

[Problems to be solved by the invention]

The problem with the conventional wiring method described above is that as the wiring density increases, the width “W” of the pattern that conducts to the bonding pad becomes increasingly finer, and the cross-sectional area and surface area of the pattern accordingly increase. As the DC resistance increases, the DC resistance increases, so the rise time (rise time) and fall time (fal
l time) is prolonged, which causes a problem that the characteristics of the transmission signal deteriorate.

Therefore, a method of suppressing an increase in the DC resistance by increasing the thickness of the pattern and increasing the cross-sectional area can be considered, but there is a problem that it is impossible to make the pattern too thick in the manufacturing process.

SUMMARY OF THE INVENTION In view of the above problems, an object of the present invention is to provide a wiring method for a multilayer printed circuit board in which a plurality of patterns are provided in each wiring circuit to increase the cross-sectional area and the surface area of a signal pattern.

[Means for solving the problem]

The present invention, as shown in FIG. 1, a first pattern 14-1 and a second pattern 14-2 having the same cross-sectional dimensions and a fine width in a designated path inside the signal layer 14 laminated to a certain thickness, Wired so as to face the center plane of the board at a fixed interval, and connect the first pattern 14-1 and the second pattern 14-2 by VIA (not shown) and arrange them on the main surface of the board. Then, it is formed so as to be electrically connected to the bonding pad and the connection terminal.

(Operation)

According to the present invention, the first pattern 14-1 and the second pattern 14-2 having the same cross-sectional view size are respectively opposed to the designated path inside the signal layer 14 at a certain interval with respect to the center plane of the plate thickness. Because of the wiring, two patterns are formed on one signal circuit, the cross-sectional area and the surface area thereof become large, and accordingly, the DC resistance and high-frequency resistance of each signal circuit become small. Signal transmission characteristics can be improved.

〔Example〕

Hereinafter, the present invention will be described in detail based on embodiments shown in the drawings.

FIG. 1 is a cross-sectional view of a wiring method for a multilayer printed circuit board according to the present embodiment. In FIG. 1, the same members as those in FIG. Is a signal layer that forms

According to the wiring method of the present invention, as shown in FIG. 1, a first pattern 14-1 having the same cross-sectional dimensions as the conventional one, that is, a width: W = 200 μm and a thickness: t = 20 μm, is designated by a designated path shown in FIG. The ceramic thin plate printed with the ceramic pattern printed on the second pattern 14-2, and the first pattern 14-1 and the second pattern 14-2 are stacked at a constant interval with respect to the center plane of the thickness of the laminated plate: By forming the signal layer 14 by laminating them so that D = 150 μm and having a constant thickness, for example, T = 1.8 mm, the first pattern 14-1 and the second pattern 14- 2 is wired.

Then, as in the conventional case, the GND layers 3 are formed on both sides of the signal layer 14.
A surface layer 2 is laminated on the substrate, and is disposed on the main surface of the substrate shown in FIG.
The first and second patterns 14-2 are formed so as to be electrically connected by VIA (not shown).

As a result, since the first pattern 14-1 and the second pattern 14-2 are wired in one signal circuit, the cross-sectional area and surface area of the signal pattern are increased, and the DC resistance and high-frequency resistance are reduced. As a result, the signal transmission characteristics of the signal circuit can be improved.

〔The invention's effect〕

As is apparent from the above description, according to the present invention, with a very simple wiring method, the cross-sectional area and the surface area of the wiring pattern are increased, the DC resistance and the high-frequency resistance are reduced, and the waveform of the signal transmitted accordingly. Thus, there can be provided a wiring method for a multilayer printed circuit board that has advantages such as not breaking down, and is expected to have a remarkable effect of improving characteristics.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a wiring method of a multilayer printed circuit board according to an embodiment of the present invention, FIG. 2 is a sectional view showing a conventional wiring method, and FIG. 3 is a plan view showing the multilayer printed circuit board. In the figure, 2 indicates a surface layer, 3 indicates a GND layer, 14 indicates a signal layer, 14-1 indicates a first pattern, and 14-2 indicates a second pattern.

Claims (1)

(57) [Claims] 1. A method according to claim 1, wherein at least two fine width patterns (14-1,
14-2,... 14-n) are wired at regular intervals so as to face each other, and the pattern (14-1, 14-2,.
4-n) to conduct to the main surface of the substrate for wiring.