JP2576987B2 - Color image reader - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color image reading apparatus, and more particularly, to a color image reading apparatus applicable to a digital copying machine, a facsimile, an electronic file, or the like which handles image information electrically. Things.

(Prior Art) An image reading apparatus in which a plurality of color line sensors are arranged in a zigzag pattern so that the read lines of adjacent color line sensors are different from each other to form one line of data is disclosed in, for example, No. 61-134168. In this publication, a one-line circuit described in detail with reference to FIG. 13 is taken as an example. In this circuit, when sampling and holding the output of the CCD, the output is distributed to each color (Cy, G, Ye), so that three circuits are required for one CCD thereafter. Therefore, if the sensor is composed of five CCDs, a total of 15 circuits are required, and the number of circuits is enormous and the cost is high.

(Purpose) The present invention has been made in order to eliminate the above-mentioned disadvantages of the conventional apparatus. The purpose of the present invention is to sequentially output each color sequentially and at high speed from a plurality of color line sensors arranged in a staggered pattern. An object of the present invention is to provide a color image reading apparatus capable of performing color classification and one-line conversion of an image signal with a simple and low-cost circuit configuration and outputting data of each color without a dot shift.

(Structure) In order to achieve the above object, the present invention provides a color image reading apparatus that converts color-sequential image data from a color line sensor into one line. Processing means for performing analog signal processing on the output from each color line sensor; analog / digital conversion means for converting the output from the processing means into a digital multi-value signal; and delaying the output from the analog / digital conversion means. Digital processing means including delay means and storage means for storing a plurality of lines of output from the delay means for each color, from the color line sensor to the delay means performs signal processing for each color line sensor, The storage means writes each image in a separate memory for each color when writing the image signal, and reads each image in the main scanning direction in reading order. The memory is read out synchronously and one line of image data of each color is formed.

Hereinafter, a specific description will be given based on an embodiment of the present invention.

First, a method of using a color 1: 1 sensor as an image sensor that photoelectrically reads a color original will be described. This method has the advantages that the imaging optical meter can be simplified and the size of the apparatus can be reduced, and that the color separation of the main scanning hold does not occur because color separation is performed by the sensor itself. As shown in Fig. 1, the color 1: 1 sensor has 16 pixels
/ mm resolution is one pixel for each color [for example, red (R),
[Green (G), Blue (B)]], and each color filter is mounted on each segment.

However, if such a sensor can read the short side (297 mm) of an A3 size document, the 4752
It requires pixels, ie, 14256 segments. Since it is technically difficult to form such a large number of light receiving elements with one color line sensor, a plurality of color line sensors are arranged in the scanning direction. In addition, as shown in FIG. 2, the CCD sensor used as a color line sensor has light insensitive portions at both ends, and if arranged in a line, the original image is not read at the joint of the sensors. As shown in the figure, color same-size sensors arranged in a staggered manner so as to form mutually overlapping portions have been proposed.

The color equal-magnification sensor shown in FIG. 3 is constituted by five CCDs, and a drive signal and an output signal are input and output independently of each other. Since the CCDs are arranged in a staggered pattern, the positions where odd-numbered and even-numbered CCDs are read in the sub-scanning direction are shifted. However, a line memory (seven stages of line shift gates are built in) to correct the shift. From the sensor, a video signal obtained by dividing the original into five parts is provided in parallel in five systems and GB
Output in R color sequence. The internal circuit of such a CCD is as shown in FIG. In the figure, 01A is the first
Phase clock, 02A is second phase clock, 02B is second phase final clock, 0V1-0V7 are line shift gates, SH is shift gate, RS is reset gate, OD is output transistor drain, OS is output transistor source, SS Is the substrate (ground), IG is the input gate, HE is the barrier electrode, SE
Is a storage electrode.

Next, FIG. 5 is a block diagram relating to image data of the color image reading apparatus used in the present invention. In the figure, 1 is a color equal magnification sensor, 2 is an analog processing unit, 3 is an analog /
A digital (A / D) conversion unit, 4 is a digital processing unit, 5 is an interface unit, and 6 is a timing control unit. The video output signals of the CCD 1 to CCD 5 from the above-described color 1 × sensor 1 are input to the analog processing unit 2. The analog processing unit 2 performs amplification after sample hold, and performs dark current correction, white level correction, and shading correction for each CCD signal. The output signal from the analog processing unit 2 is quantized by the A / D conversion unit 3 and is converted into an 8-bit digital signal. When reading the white shading plate before reading the original, the shading data SHD1 to SHD5 are stored in the shading correction memory of the analog processing unit 2.

At the time of reading a document, each of the 8-bit digital signals CCD1 to CCD5 is output to the digital processing unit 4. This digital processing 4
It comprises delay means for synchronizing the reading position of the signal from the CCD and storage means for making one line for each color. The output from the digital processing unit, which has been converted into 8-bit signals for each color of G, B, and R, is supplied to the interface unit 5 from the host side or a line synchronization signal from the reader itself.
It is output in synchronization with the pixel clock signal.

The timing control unit 6 generates a timing signal for each of these blocks to perform each function and gives the timing signal to each block.

Next, the circuit configuration and operation of the digital processing unit 4 will be described in detail with reference to the circuit diagram shown in FIG.
In the figure, the part (a) indicated by the dotted line is the delay means, and the part (b) is the one-line storage means. Because of the structure of the sensor, CCD2 and CCD4 read the earlier part of the document than CCD1, CCD3 and CCD5, so they are synchronized by the line memory in the sensor and the delay means (a), and the five signals are And outputs the same pixel signal to the one-line storage means (b). In FIG. 6, M is a line memory, and the CCD2 and CCD4 systems have N stages of line memories. N is determined by the variable magnification range. For example, if the variable magnification range is 25% to 400%, the sub-scanning measure becomes 4 to 1/4 times that at the time of the same magnification, so that a total of 16 stages of delay are required. Is required. Since seven stages of delay are possible in the line memory in the sensor, N = 9, and nine stages of line memory are required. The gates 0 to 9 corresponding to the memories are enabled according to the magnification, and delays of 0 to 9 stages are selected. As described above, the inputs to the portion (b) are aligned on the same line and the same pixel, so that the colors of G, B, and R are the same for all five systems.

MG1 to MG5 of the one-line storage means (b) are memories for storing respective G data of CCD1 to CCD5. Since the timing of writing to and reading from the memory overlap, the capacity of each memory needs to be equal to or more than the data amount of two lines of each color.

The write operation to the memory will be described with reference to the timing chart of FIG. In this example,
The memory has independent input and output ports, and uses first-in, first-out (FIFO) memory that does not require address input. Within one line cycle between the line synchronization signals LSYNC, 960 pixels, that is, 288 pixels from each system from the delay means (a).
Zero data is input in the order of G, B, and R colors. These data are written to the memories of MG1-5, MB1-5, MR1-5 sequentially. GWE, BWE, and RWE are write enable signals for each memory. If a signal is given to each memory at the timing shown in FIG. 7, data is written at the next rise of the write clock signal WCLK after the rise of the write enable signal.
As a result, the color-sequential one-line data is stored in another memory for each color. For example, if the CCD1 system, MG1 G1 ~ G
960, MB1 for B1 to B960, MR1 for R1 to R960 each 8
Bit × 960 word data is written. Since each memory stores data for two lines, the write reset signal RSW is applied once to two lines.

Next, a read operation from the memory will be described with reference to FIGS. 8 (A) and 8 (B).
This will be described with reference to the timing chart of FIG. Within one line cycle between LSYNCs, the memories of the respective colors are read out synchronously in the order of CCD1 to CCD5 to convert G, B, and R data into one line. When the read enable signal RE is "L", data is read at the rise of the read clock signal RCLK.
Therefore, as shown in FIG. 8 (A), if 960 clocks are sequentially set to “L” from RE (CCD1) to RE (CCD5), one line of data as described above can be realized. Becomes FIG. 8 (B) is an enlarged view of FIG. 8 (A), and G, B,
Indicates the data to be read from R. When RE (CCD1) is "L", the 1st to 960th data of each color are output, and then RE
When (CCD5) is "L", 961th and subsequent are output. In this manner, the data of the 1st to 4800th colors for one line is output. The read reset signal SR is given once every two lines. In the same line cycle, the memory space to be written and the memory space to be read are different, and the data to be read is data written one line cycle before. Therefore, the write reset signal RSW and the read reset signal RSR are alternately given every other line cycle. You.

Although a FIFO memory is used in this embodiment, a dual port memory can be used instead. In this case, by adding address signals for input and output, one line of data is similarly achieved.

(Effects) As described above, according to the present invention, in a color image reading apparatus that converts color-sequential image data from a color line sensor into one line, a plurality of color lines arranged in a staggered manner and output in color sequence A sensor, processing means for performing analog signal processing on the output from each color line sensor, analog / digital conversion means for converting the output from the processing means into a digital multi-valued signal, and delaying the output from the analog / digital conversion means Digital processing means including a delay means for storing and a storage means for storing a plurality of lines of output from the delay means for each color, from the color line sensor to the delay means performs signal processing for each color line sensor, The storage means writes each image to a separate memory for each color when writing an image signal, and stores each memo for each color in the main scanning direction in reading. Since the image data of each color is read out in synchronization with one line, the color-sequential image data from the color line sensor can be converted into one line of color-coded delay with a simple and low-cost circuit configuration. It is possible to provide a color image reading device that has the effect of being able to do so.

[Brief description of the drawings]

FIG. 1 is a schematic diagram for explaining a color 1: 1 sensor, FIG. 2 is an explanatory diagram showing each area of a CCD sensor used as a line sensor, and FIG. 3 is a diagram showing five CCDs arranged in a staggered pattern. FIG. 4 is a circuit diagram showing an internal circuit of a CCD, FIG. 5 is a block diagram relating to image data of a color image reading apparatus using the present invention, and FIG. 5 is a circuit diagram showing in detail the circuit configuration of the digital processing unit, FIG. 7 is a timing chart for explaining a write operation to a memory, and FIG. 8 (A) is a timing chart for explaining a read operation from a memory; Fig. 8 (B)
8 is a timing chart showing an enlarged view of FIG. DESCRIPTION OF SYMBOLS 1 ... Color line sensor (color 1: 1 sensor), 2 ... Analog processing part (means), 3 ... A / D conversion part (means), 4 ...
Digital processing unit (means).

Claims (4)

(57) [Claims] A color image reading apparatus for converting color-sequential image data from a color line sensor into one line.
A plurality of color line sensors arranged in a staggered manner and outputting in color sequence; processing means for performing analog signal processing on the output from each color line sensor; and analog / digital for converting the output from the processing means into a digital multilevel signal Conversion means; and digital processing means including delay means for delaying the output from the analog / digital conversion means and storage means for storing the output from the delay means for a plurality of lines for each color. The signal processing is performed for each color line sensor up to the delay means, and the storage means writes to a separate memory for each color when writing an image signal, and reads out the memories for each color in synchronization with the main scanning direction at the time of reading. A color image reading apparatus for converting one line of image data of each color. 2. A color image reading apparatus according to claim 1, wherein said storage means comprises a first-in-first-out memory. 3. A color image reading apparatus according to claim 1, wherein said storage means comprises a dual port memory. 4. A color image reading apparatus according to claim 2, wherein said first-in-first-out memory comprises a random access memory.