JP2567865B2 - Color image mask signal generation circuit - Google Patents

Description

DETAILED DESCRIPTION [Overview] A circuit for generating a mask signal from correlation information of R, G, B components of a color image and selectively outputting various mask signals. Only R, G, B individual mask signals are provided. The purpose is to provide a mask signal generation circuit that can generate a mask signal from R, G, B correlation information and output the mask signal by integrating or selecting these signals. , A mask signal generation circuit for each B component,
A circuit for generating a mask signal from correlation information of R, G, B image signals, and a mask signal integration circuit for outputting a mask signal by arbitrarily combining the output signals of the mask signal generation circuits according to a command from an external MPU. And a color image mask signal generation circuit including.

[Industrial applications]

The present invention relates to a mask signal generation circuit, and more particularly, to generate a mask signal from the correlation information of red (R), green (G), and blue (B) components of a color image, and select and output various mask signals. It relates to a circuit that does.

[Conventional technology]

The mask processing is to perform processing only within an area having an arbitrary shape. It has a mask processing function and sends a digital video signal that is A / D converted from a video signal input from a TV camera, etc. to a processing module group connected in a pipeline,
FIG. 4 shows a conventional example of an image processing system in which an output is continuously obtained after a certain delay time. In this figure, reference numeral 31 denotes a plurality of processing modules connected in a pipeline for receiving digital video signals and performing various kinds of processing, 32
Is a mask signal generation circuit for generating a mask signal for causing each processing module 31 to perform the mask processing. Further, a line 33 connecting between the mask signal generation circuit 32 and the processing module 31 is a data line for transmitting a digital image signal to the processing module 31, and 34 is a mask signal generation circuit.
A signal line for transmitting a mask signal from 32 to the processing module 31. The digital image output from the processing device is subjected to processing according to each processing module by various mask signals output from the mask signal generation circuit 32 while transitioning between the plurality of processing modules 31, and is masked. Output as digital image data or displayed on a display. Most conventional image processing is image gradation processing, and the mask for designating the processing area is performed by a 1-bit instruction.

[Problems to be solved by the invention]

However, in the conventional image processing apparatus configured as described above, in order to realize the processing of the color image, the gradation processing of the color information R, G, B of the image is required, but the mask signal generation circuit 32 The mask signal can be generated only from the respective signals of G, B. Therefore, there is a problem in that it is impossible to generate an integrated mask signal based on correlation information (for example, luminance and chromaticity) among R, G, and B.

The present invention has been made to solve the above problems, and its purpose is not only to mask signals for R, G, and B individually,
It is an object of the present invention to provide a mask signal generation circuit which has a circuit capable of generating a mask signal from R, G, B correlation information and further integrates or selects these to output a mask signal.

[Means for Solving Problems] FIG. 1 is a principle diagram of mask processing of the present invention. In this figure, 1 indicates the first processing module group of each of the color information R, G, B of the image, and this processing module group 1 defines the R1 processing module, G1 processing module, and B1 processing module according to each color information. Have Reference numeral 2 denotes the nth processing module group Rn, Gn, Bn, 3 denotes a mask signal generation circuit, 4
Is a signal line for transmitting a mask signal. Color image R, G,
The digital signal corresponding to each B data is input to each processing module and also to the mask signal generation circuit 3.

FIG. 2 is a block diagram of the principle of the mask signal generation circuit in the mask processing of FIG. In this figure,
Reference numeral 5 denotes R for generating a mask signal only with image data of R component.
It is a component mask signal generation circuit. Similarly, 6 is a G component mask signal generation circuit, and 7 is a B component mask signal generation circuit. Reference numeral 8 is an RGB mask signal generation circuit that generates a mask signal from the R, G, B correlation data. Reference numeral 9 is a mask plane connected to an external microprocessor (MPU).
Reference numeral 0 is a mask signal integration circuit that integrates the mask signals output from the mask signal generation circuits 5, 6, 7, and 8. 11a, 11b, 11
c indicates the output signals from the mask signal generation circuits 5, 6 and 7 for the respective R, G and B components, 11d indicates the output signal from the RGB mask signal generation circuit 8 and 11e indicates the output signal from the mask plane 9. Show. Reference numeral 11m indicates a mask control signal output from the mask signal integration circuit 10.

[Action]

The R, G, B data of the input color image are respectively R, G, B
Are input to the respective component mask signal generation circuits 5, 6, and 7 and corresponding to the RGB mask signal generation circuit 8, individually generate mask signals, and output to the mask signal integration circuit 10. The mask plane 9 is connected to an external MPU, generates a mask signal according to the coordinate information of the processing area of the screen designated by the MPU, and outputs the mask signal to the mask signal integration circuit 10. The mask signal integration circuit 10 includes mask signal generation circuits 5, 6, 7 and R for each color component.
Output signals of GB mask signal generation circuit 8 and mask plane 9
11a, 11b, 11c, 11d and 11e are input, and a mask control signal 11m which is a combination signal of the above signals or a single signal is output under the control of the external MPU.

In addition, the external MPU is a mask signal generation circuit for each R, G, B component
It is also possible to individually connect to the 7 and RGB mask signal generation circuits 8 and individually specify the mask signal.

〔Example〕

FIG. 3 is a block diagram showing an embodiment of a mask signal generation circuit according to the present invention. In this figure, 12 is an R image memory for storing input image data in the R component, and 13 is a G image memory.
Image memory, 14 is B image memory, 15,16,
Reference numeral 17 is a rewritable memory (RAM) for individually processing image data of R, G, and B components. Reference numeral 18 denotes a RAM that inputs image data of R, G, B components and generates a mask signal from the correlation information. 19 and 20 are counters that generate horizontal and vertical coordinates, 21 is a plane memory, 22 is a register, and 23 is a register 22 and selects the necessary output from the RAMs 15 to 18 and the plane memory 21 according to the output of the register 22. This is a selector that outputs a mask control signal 11m.

The operation of the mask signal generation circuit having such a configuration will be described below.

Each pixel of the digital color image is transmitted in synchronization with the clock, and the R, G, B image data are input to the RAMs 15, 16 and 17, respectively, while at the same time the respective image memories 12, 1
3 and 14 store and hold an image for one frame and output it with a delay of one frame. The RAM 15, 16 and 17 inputs the image data of R, G and B respectively and the data output from the image memories 12, 13 and 14 with a delay of one frame, and generates the mask signal of each component from the density of each image data. Output. RAM18 is R,
Each of the G and B image data is input, and a mask signal based on the correlation is generated and output under the information such as luminance and chromaticity.
The counter 19 is a counter that receives an input clock of an image signal and uses a horizontal synchronization signal of an image as a clear input,
The horizontal coordinate of each pixel of the input digital signal is output to the plane memory 21. The counter 20 is a counter that receives the horizontal synchronization signal as a clock and clears the horizontal synchronization signal, and outputs the vertical coordinate of each pixel to the plane memory 21. The plane memory 21 is an external MPU
The coordinate information of the screen provided by the MPU is held and the mask signal is generated and output to the selector 23. The register 22 is a register for storing a command from the external MPU, and the processing command information of the MPU is transmitted to the selector 23 via this register 22. The selector 23 is the RAM 15, 16, 17,
Input the output from 18 and plane memory 21, register
A mask control signal 11m is output to the processing modules 1 and 2 by arbitrarily selecting or combining mask signals to be valid according to an external MPU instruction via 22.

Further, the selector 23 has a plurality of output bits, and can specify a plurality of types of processing areas in a processing module provided at a stage subsequent to the mask signal generation circuit in the image processing apparatus. By connecting the external MPU to the RAMs 15, 16, 17, and 18, respectively, data can be arbitrarily written from the MPU and each type of mask signal can be generated.

〔The invention's effect〕

As described above, according to the present invention, in the digital color image processing, the mask signal generation circuit of each component corresponding to each of R, G, B of the color image, and the correlation information of the R, G, B image signals. A circuit for generating an RGB mask signal from, and a mask signal integration circuit for outputting a mask signal by arbitrarily combining the output signals of the mask signal generation circuit and the RGB mask signal generation circuit for each of these components. The mask signal can be output to the processing module, which makes the mask processing rich in variety, and various effects such as independent mask processing in the R, G, B component processing modules can be obtained. To be

[Brief description of drawings]

FIG. 1 is a principle diagram of mask processing in the present invention, FIG. 2 is a block diagram showing a principle configuration of a mask signal generation circuit of the present invention, and FIG. 3 is a diagram showing an embodiment of a mask signal generation circuit of the present invention. FIG. 4 is a block diagram of a conventional mask processing. 1 ... First processing module group 2 ... Nth processing module group 3 ... Mask signal generation circuit 4 ... Mask signal line 5 ... R component mask signal generation circuit 6 ... G component mask signal generation circuit 7 …… B component mask signal generation circuit 8 …… RGB mask signal generation circuit 9 …… Mask plane 10 …… Mask signal integration circuit 12 …… R image image memory 13 …… G image image memory 14 …… B image image memory 21 …… Plane memory 22 …… Register 23 …… Selector

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Masatoshi Komeiji 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited (72) Inventor, Nobu Ozaki 1015, Kamedotachu, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited ( 56) References JP-A-55-11694 (JP, A)

Claims (2)

(57) [Claims] 1. A color image processing system for performing an adjustment process of a color image by passing an input digital image signal through a group of processing modules sequentially connected in a pipeline form, Circuit to generate (5)
, A circuit (6) for generating a G component mask signal, a circuit (7) for generating a B component mask signal, and R for generating a mask signal from the correlation information of the R, G, B image signals.
It is connected to the GB mask signal generation circuit (8) and an external MPU, and the output signals of the mask signal generation circuits (5), (6), (7) and (8) are arbitrarily combined based on a command from the external MPU. A color image mask signal generation circuit comprising a mask signal integration circuit (10) for outputting a mask signal together and sequentially outputting a mask signal of an arbitrary shape to a processing module group. 2. The mask signal integration circuit has a multi-bit output function, and in each of the R, G and B processing modules, each processing module can select a different mask signal. The color image mask signal generation circuit according to claim 1.