JP2561012B2 - Semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device using high frequency current.

[0002]

2. Description of the Related Art In a semiconductor device using a high frequency current, a current flows concentrated near the surface of a wiring due to a skin effect, an apparent cross-sectional area of the wiring is reduced, and a wiring resistance is increased. In order to suppress this, the present inventor has applied for an invention of a semiconductor device having wiring having a structure in which a metal conductor surrounds an insulating film, for example, in Japanese Patent Application No. 4-130349.

As shown in FIG. 13, an insulating film 53a selectively having a contact opening 52 is provided on a semiconductor substrate 51 from the bottom as shown in FIG.
A first interlayer insulating film 53b in which a first groove 64 for burying the first wiring is selectively provided is formed thereover. Then, the insulating film 53 is formed in a state in which the contact opening 52 and the groove 64 are filled with the wiring of the first layer having gold 57 as a main wiring material and an insulator 53c made of polyimide or the like as a core.
It is provided on a.

Further, a second interlayer insulating film 53d is provided on the first layer wiring and the first interlayer insulating film 53b, and penetrates through the second interlayer insulating film 53d to form a first layer wiring. On the other hand, through holes 65 are selectively provided. The second
Has a third interlayer insulating film (not shown) in which a second groove (not shown) is selectively provided for embedding the second wiring, on the interlayer insulating film 53d of FIG. In a state in which the hole 65 and the second groove are buried, gold 57b provided on the second interlayer insulating film 53d is used as a main wiring material and a second wiring having an insulator 53e made of polyimide or the like as a core is provided. Then
An insulating film 53f for surface protection is provided on the second layer wiring and the third interlayer insulating film.

The insulating film 53a, the second interlayer insulating film 53d, the first interlayer insulating film 53b and the third interlayer insulating film are formed of a silicon oxide film and a silicon nitride film, respectively. The insulating film 53f is a silicon nitride film,
It is composed of a silicon oxide film, polyimide, or a composite film of these.

In the wiring of the first layer, gold 54a and gold 57a surround the periphery of the insulator 53c, and the gold 54a.
Platinum 55 provided on the lower layer of the platinum 55 and titanium / tungsten 56a provided on the lower layer of the platinum 55. The titanium / tungsten 56a is in direct contact with the first interlayer insulating film 53b on the side surface of the first groove 64,
The bottom surface of the wiring of the first layer and the side surface of the contact opening 52 are in direct contact with the insulating film 53a, and the bottom surface of the contact hole 52 is in direct contact with the semiconductor substrate 51.

Similarly, in the wiring of the second layer, the periphery of the insulator 53e is gold 54b and the main wiring material is gold 5b.
7b surrounds and has titanium-tungsten 56b underneath this gold 54b. The titanium / tungsten 56b directly contacts the third interlayer insulating film on the side surface of the second groove, and directly contacts the second interlayer insulating film 53d on the bottom surface of the wiring of the second layer and the side surface of the through hole 65. Contact, and at the bottom of the through hole 65,
It is in direct contact with the gold 57a of the first layer wiring.

A method of manufacturing a semiconductor device using gold as the main wiring material will be described with reference to FIGS.

First, as shown in FIG. 14, an inorganic insulating film 53a is formed on a semiconductor substrate 51 having a diffusion layer,
A contact opening 52 is provided by a photolithography process and dry etching, titanium / tungsten 56a, platinum 55, and gold 54a are formed by a sputtering method, an insulating film 53b is formed to cover the whole, and a region where wiring is formed in the future. Then, a groove 64 is formed by a photolithography process and reactive ion etching.

Next, as shown in FIG. 15, a silicon oxide film 58 is formed.
Of the silicon oxide film 5 on the side wall of the groove 64 by anisotropic reactive ion etching.
8 and spin the organic or inorganic insulating film 53c.
The insulating film 5 is formed by coating and heat treatment, and the entire surface is wet-etched or dry-etched.
Etching is performed so that 3c remains in the middle of the groove 64. As the insulating film 53c left in the groove 64, for example, a polyimide coating film is used. For example, oxidation plasma etching is used for etching the insulating film 53c,
The upper end of the insulating film 53c after etching is lower than the upper end of the insulating film 53b.

Next, as shown in FIG. 16, the silicon oxide film 58 is removed by wet etching using a hydrofluoric acid buffer solution, gold 57a is formed by a plating method, and the insulating film 5 is formed.
Make sure that the upper end of 3c is completely covered with gold 57a.

Next, as shown in FIG. 17, the insulating film 53b other than the wiring region is removed by etching, and gold 54a, platinum 55, titanium.
The tungsten 56a is removed. At this time, since the gold on the upper portion of the wiring is removed to some extent, the thickness of the plated gold is made thick so that the insulating film 53c inside the wiring is not exposed.

The above is the process flow until the wiring of the first layer is formed. To further form the second and subsequent layers, an insulating film 53d between layers is formed, and after a through hole is opened,
The desired number of wiring layers is obtained by repeating the steps of FIGS. 14 to 17 by removing the sputtering of the platinum 55 and ion milling.

[0014]

However, in the semiconductor device which operates with such a high frequency current, the insulating film to be embedded inside the wiring must be formed by the spin coating method.
An insulating film formed by such a spin coating method easily contains water, and since the insulating film is surrounded by a wiring material, there is no escape of water even in a subsequent processing step, and the wiring is heated by heating or the like. There was a risk of bursting.

Further, the formation of the wiring whose main material is gold is
Due to the plating method, the in-plane uniformity of the film pressure is not good,
Moreover, it is necessary to wrap gold around the insulating film embedded in the wiring, the shape is not stable in the plane, and there are some problems that the AC resistance partially increases when the device operates at high frequency. It was

Further, since there is a conductor at the bottom of the through hole, there is a problem that high frequency current is difficult to branch to the through hole.

[0017]

According to the present invention, there is provided a semiconductor device comprising:
In the cross-sectional shape, the inorganic insulating film is assumed to have a wiring that is completely surrounded by Al (aluminum) which is a main wiring material. Further, in a semiconductor device having a wiring layer composed of two or more layers of wiring and having a through hole for electrically connecting wirings of different layers, a conductor is provided on a side wall of the through hole, and a through hole surrounded by the conductor is provided. It was decided to have an insulator inside the hole that penetrates the through hole vertically.

[0018]

The present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.

A silicon oxide film 3a having a contact opening 2 selectively on the semiconductor substrate 1 and a film thickness of about 8000 Å.
And the silicon oxide film 3a including the contact opening 2
On top, in order from the bottom, titanium 4, titanium nitride 5, aluminum 6
a, a silicon oxide film 3b, an aluminum 6b, and a first layer wiring made of aluminum 6c existing on the side walls thereof, and an interlayer insulating film 8 which covers the first layer wiring and selectively has a through hole 7 is formed. I am doing it. Further, on the interlayer insulating film 8, the first
The second layer wiring having the same structure as the wiring is provided, and the cover film 9 is provided thereon. The inside of the through hole 7 is filled with tungsten 10.

The film thickness of each film constituting the wiring of the first layer is, for example, 600 Å for titanium 4 and 1000 for titanium nitride 5.
Å, aluminum 6a is 5000Å, silicon oxide film 3b is 4
Set 000Å and aluminum 6b to 5000Å. The formation of each is, for example, titanium 4, titanium nitride 5, aluminum 6a,
6b is a sputtering method, and the silicon oxide film 3b is plasma C
The VD method is used.

The interlayer insulating film 8 is formed by coating inorganic silica or organic silica for planarization and etching back S.
It is formed by the OG etch back method or the like. Further, the cover film 9 is made of polyimide.

In this embodiment, since the insulator surrounded by Al (aluminum) is the silicon oxide film formed by the plasma CVD method, it hardly contains moisture, and the wiring is formed in the heat treatment step after the wiring formation step. No defects such as swelling occur, and since the main wiring material is Al, the adhesion with the silicon oxide film is secured.

Further, since the surface of the conductor forming the wiring exists not only on the outside but also on the boundary surface with the insulating film embedded inside, the influence of the skin effect is suppressed even when operating at high frequency. Can suppress the increase of wiring resistance,
The effect that the high speed operation can be maintained is maintained as it is.

Next, a method of manufacturing the semiconductor device of the first embodiment will be described with reference to FIGS.

First, as shown in FIG. 2, a silicon oxide film 3a is formed on a semiconductor substrate 1 by a CVD method, a contact opening 2 is formed by a photolithography process and reactive ion etching, and a barrier metal is formed. Titanium 4 and titanium nitride 5 are formed by the sputtering method, aluminum 6a which is the main wiring material is formed by the sputtering method at 5000Å, and the silicon oxide film 3b is formed by plasma CV.
4000 Å is formed by the D method, and about 10000 Å of aluminum 6b is formed by the sputtering method, and the silicon oxide film 3c
Is formed by a plasma CVD method at 3000 .ANG., And a photoresist 11 is selectively formed where wiring will remain in the future.

Next, as shown in FIG. 3, using the photoresist as a mask material, the silicon oxide film 3c is removed by, for example, CF.
_{4 The} photoresist 11 is removed by selective removal by reactive ion etching in an atmosphere.

Next, as shown in FIG. 4, the silicon oxide film 3c is used as a mask material and the aluminum 6b is, for example, N ₂ and C.
in a mixed gas atmosphere of l _2, it is selectively removed by reactive ion etching.

Next, as shown in FIG. 5, the silicon oxide film 3b is masked with, for example, C.
It is selectively removed by reactive ion etching in an F ₄ gas atmosphere. At this time, since the silicon oxide film 3c is also etched at the same etching rate as the silicon oxide film 3b, the silicon oxide film on the aluminum 6b is completely removed.

Next, as shown in FIG. 6, using the aluminum 6b as a mask, the aluminum 6a, the titanium nitride 5, and the titanium 4 are
For example, it is selectively removed by reactive ion etching in a mixed gas atmosphere of BCl ₃ and Cl ₂ . At this time,
Since aluminum 6b is also etched at the same etching rate as aluminum 6a, it is necessary to set the thickness of aluminum 6b to about 3 times the thickness of aluminum 6a in order to leave aluminum 6b in the same thickness as aluminum 6a. is there.

Next, as shown in FIG. 7, aluminum 6 is formed on the entire surface.
c is formed by a sputtering method of about 8000Å. For example, BC
In a mixed gas atmosphere of l ₃ and Cl _2, the aluminum 6c is left only on the side wall of the wiring by the entire surface etchback by reactive ion etching.

Next, although not shown, an interlayer insulating film 8 is formed by using the SOG etch back method or the like, the through holes 7 are selectively opened by a photolithography process and reactive ion etching, and titanium 4, After the titanium nitride 5 is sputtered, the tungsten 10 is grown and etched back to leave only inside the through hole 7.

Next, the process of FIG. 7 is repeated from the sputtering of the aluminum 6a of FIG. 2 to form the second layer wiring and further the cover film 9 to complete the structure of FIG.

By adopting this manufacturing method, it is possible to use the sputtering apparatus, etching apparatus, plasma CVD apparatus, etc., which have been conventionally used, as they are, and to simplify the process.

Next, an embodiment of the semiconductor device described in claim 2 will be described with reference to FIG. On the semiconductor substrate 1, there is provided a silicon oxide film 3a having a film thickness of about 8000Å which selectively has a contact opening 2, and on the silicon oxide film 3a including the contact opening 2, titanium 4 and titanium nitride 5 are formed in order from the bottom. , The aluminum 6a, the silicon oxide film 3b, the aluminum 6b and the aluminum 6c existing on the side walls thereof, the first layer wiring. The interlayer insulating film 8 is formed so as to cover the first layer wiring.
Through holes 7 are formed through the interlayer insulating film 8 and the uppermost aluminum layer 6b of the first-layer wiring. Aluminum 6d is provided on the side wall of the through hole 7 and the interlayer insulating film 8, and silicon is provided on the aluminum 6d, the side wall of the aluminum 6d on the side wall of the through hole 7, and the silicon oxide film 3b in the first layer wiring. An oxide film 3d is formed.
A polyimide 12 is provided in the through hole 7, and a silicon oxide film 3e is formed on the polyimide 12 and the silicon oxide film 3d not including the inside of the through hole 7. Further, aluminum 6e is provided on the silicon oxide film 3e, and aluminum 6d, silicon oxide films 3d, 3e, and aluminum 6e are provided.
Aluminum 6c (not shown) is provided on the side wall of e, and a cover film 9 is provided to cover the entire surface.

The film thickness of each film forming the first layer wiring is, for example, 600 Å for titanium 4 and 1000 Å for titanium nitride 5.
Aluminum 6a is 5000 Å, silicon oxide film 3b is 400
Set 0Å and aluminum 6b to 5000Å. Further, the film thickness of each film forming the second-layer wiring is, for example, 5 mm for aluminum 6d.
000Å, silicon oxide films 3d and 3e are each 2000
Å Set aluminum 6e to 5000Å. The respective films are formed by the sputtering method for the metal film and the plasma CVD method for the silicon oxide film. The polyimide 12 filling the inside of the through hole 7 is formed by a spin coating method and a baking step, followed by etch back.

In this embodiment, the insulating film inside the first layer wiring and the insulating film inside the second layer wiring penetrate through the through holes 7 (silicon oxide film 3e, polyimide 12,
Since the silicon oxide film 3d) is connected and the side wall of the through hole 7 is covered with a metal conductor, when the semiconductor device operates at a high frequency of several tens GHz, a high frequency current flows in the through hole direction. This has the effect of making it easier to branch.

Next, a manufacturing method for manufacturing the semiconductor device of this embodiment will be described with reference to FIGS. FIG. 9 is a cross-sectional view up to the point where the interlayer insulating film 8 is formed after forming the first layer wiring. Up to this point, the step of forming the interlayer insulating film 8 is added to the process of FIGS. However, the description is omitted.

Next, as shown in FIG. 10, through holes 7 are selectively formed through the interlayer insulating film 8 and the aluminum 6b by a photolithography process and reactive ion etching.

Next, as shown in FIG. 11, an aluminum 6b of about 10000 Å is formed by a sputtering method, and is etched back by reactive ion etching to remove the aluminum 6d at the bottom of the through hole 7. At this time, about 5000 Å of aluminum 6d remains on the interlayer insulating film 8, and about 3000 Å of aluminum 6d remains on the side wall of the through hole 7.

Next, a silicon oxide film 3d is formed on the entire surface by a plasma CVD method, and a polyimide 12 is formed by a spin coating method.

Next, as shown in FIG. 12, polyimide 1
2 is etched back by reactive ion etching in an O ₂ atmosphere to leave only the inside of the through hole 7, and a silicon oxide film 3e covering the whole is removed by plasma CVD to about 2
000Å and aluminum 6e is sputtered on 5000Å.

Next, a combination of the photolithography process and the reactive ion etching was used to remove aluminum 6e,
Although the silicon oxide films 3e and 3d and the aluminum 6d are patterned, although not shown, the aluminum 6c is sputtered on the entire surface by 3000Å and etched back, and the aluminum 6c is formed on the side walls of the aluminum 6e, the silicon oxide films 3e, 3d and the aluminum 6d.
Leave. Further, the cover film 9 is formed to complete the final structure shown in FIG.

The thickness of the aluminum 6a, 6b, 6c surrounding the silicon oxide film 3b embedded in the wiring is such that the skin depth δ is 1 of the current value I _{s at} which the current I flows on the surface.
It is defined as the depth that attenuates up to / e times (e is the base of the natural logarithm), and the range is not less than (3/2) × δ and not more than (5/2) × δ.

In this case, assuming that the wiring material is aluminum, the relative permeability of the insulator around the wiring is 1, and the current frequency is 100 GHz, then δ≡ (2 / ωσμ) ^1/2 = 0.26 (μm), The thickness of aluminum 6a, 6b, 6c is 0.5 μm
The degree is desirable.

Where ω is the angular frequency (2π × f),
σ is the electrical conductivity of the conductor, and μ is the magnetic permeability of the material around the wiring. If the aluminum thickness is (3/2) × δ or more, (5/2) ×
If it is set to δ or less, the current value at the center of the conductor can be maintained at about 70% of the current value flowing on the surface, and the current density becomes nearly uniform over the entire conductor, preventing an increase in wiring resistance. be able to. If the thickness of the aluminum wiring is smaller than this range, the cross-sectional area of the conductor itself becomes small, so the resistance becomes large, and the thickness of the aluminum wiring becomes (5 /
2) If it is thicker than δ, a region where the current density becomes small occurs in the central part of the conductor, and the wiring resistance increases. In either case, it is not suitable for high speed operation.

Further, in the case of the structure having the insulator penetrating the through hole, the ratio of the high frequency current branching into the through hole is higher than that in the conventional case where the conductor is provided in the through hole or at the bottom. Improves by about 30%.

[0047]

According to the present invention, in the cross-sectional shape, since the inorganic insulating film is surrounded by Al which is the main wiring material, the wiring is embedded, so that the wiring is embedded inside the wiring. Since the insulating film does not contain water or the like, there is an effect that there is no possibility of rupturing the wiring due to evaporation and expansion of water in a heat treatment process performed later.

Further, since Al, which is the main wiring material, is easily formed by the sputtering method, the film thickness can be made uniform and a local increase in AC resistance can be prevented during device operation.

Further, there are two or more wiring layers made of wiring which is completely surrounded by the main wiring material, Al, around the inorganic insulating film, and through holes for electrically connecting different wiring layers. In the semiconductor device having, the conductor is provided on the side wall of the through hole, and the insulating film penetrating the through hole vertically is provided inside the through hole surrounded by the conductor, whereby the high frequency current is branched to the through hole. In addition, since the surface of the conductor that constitutes the wiring exists not only on the outside but also on the boundary surface with the insulating film embedded inside, the skin effect is obtained even when operated at high frequency. Is suppressed, an increase in wiring resistance can be suppressed, and the effect of maintaining high-speed operation is maintained.

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment of a semiconductor device according to the present invention.

FIG. 2 is a cross-sectional view showing a manufacturing process of the semiconductor device shown in FIG.

FIG. 3 is a cross-sectional view showing a manufacturing process of the semiconductor device shown in FIG.

FIG. 4 is a cross-sectional view showing a manufacturing process of the semiconductor device shown in FIG.

FIG. 5 is a cross-sectional view showing a manufacturing process of the semiconductor device shown in FIG.

FIG. 6 is a cross-sectional view showing a manufacturing process of the semiconductor device shown in FIG.

FIG. 7 is a cross-sectional view showing a manufacturing process of the semiconductor device shown in FIG.

FIG. 8 is a sectional view showing another embodiment of the present invention.

9 is a cross-sectional view showing the manufacturing process of the semiconductor device shown in FIG.

10 is a cross-sectional view showing the manufacturing process of the semiconductor device shown in FIG.

11 is a cross-sectional view showing the manufacturing process of the semiconductor device shown in FIG.

12 is a cross-sectional view showing the manufacturing process of the semiconductor device shown in FIG.

FIG. 13 is a cross-sectional view showing a conventional semiconductor device.

14 is a cross-sectional view showing the manufacturing process of the semiconductor device shown in FIG.

15 is a cross-sectional view showing the manufacturing process of the semiconductor device shown in FIG.

16 is a cross-sectional view showing the manufacturing process of the semiconductor device shown in FIG.

17 is a cross-sectional view showing the manufacturing process of the semiconductor device shown in FIG.

[Explanation of symbols]

1, 51 Semiconductor substrate 2, 52 Contact opening 3a, 3b, 3c, 3d, 3e Silicon oxide film 4 Titanium 5 Titanium nitride 6a, 6b, 6c, 6d, 6e Aluminum 7 Through hole 8 Interlayer insulating film 9 Cover film 10 Tungsten 11 Photoresist 12 Polyimide 53a, 53b, 53c, 53d, 53e, 53f Insulating film 54a, 54b, 57a, 57b Gold 55 Platinum 56a, 56b Titanium / tungsten 58 Silicon oxide film 64 Groove 65 Through hole

Claims (2)

(57) [Claims] 1. A semiconductor device having, in a cross-sectional shape, a wiring formed by completely surrounding an inorganic insulating film with aluminum which is a main wiring material. 2. In a semiconductor device having two or more wiring layers made of the wiring and having a through hole for electrically connecting wirings of different layers, a conductor is formed on a sidewall of the through hole, and the conductor is formed. The semiconductor device according to claim 1, wherein an insulating material that vertically penetrates the through hole is provided inside the through hole surrounded by.