JP2553726B2 - Method and apparatus for rotating image by 90 degrees - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image rotation method and apparatus for rotating image data such as characters and figures by 90 degrees.

2. Description of the Related Art A conventional method of representing image data by a matrix of N rows by N columns and rotating this by 90 degrees will be described with reference to FIG.

FIG. 3 shows the procedure for rotating a 4-row by 4-column matrix 90 degrees clockwise. The figure (a) is an original image and is called a source image.
The method of 90 degree rotation is to create a transposed matrix in which the rows and columns of the source image are exchanged with each other in steps up to phase 16 (ph16), and in phase 17, arrange the bits in each row with the center of the row as the axis of symmetry. It has been replaced with a symmetrical position.
Phase 17 is called the target image or destination image. In the case of a memory having a normal configuration, it is possible to read at a time in units of words (rows). However, since the bit of the first word has to be moved to each row, in phase 1 (ph1), 0 is moved to the first column of the first row, and in phase 2, 1 is moved to the first column of the second row. , Phase 2 to 3
In phase 4, move row 3 to column 1, column 4 in row 1, column 1. Since the second to fourth words are transferred in the same steps, 16 phases are required to transfer 4 words.

However, according to such a method, it is necessary to sequentially write each bit position of the destination image bit by bit. For example, in the case of FIG. 3, since 1 of 1 word of the source image is written, the 2nd word of phase 17 is read and 1 is written in the 4th column in which 1 of phase 17 is present. Therefore, there is a problem that the processing time becomes long. By the way, if the memory configuration is special, the processing can be performed in a shorter time. Figure 4 shows words (rows)
The method of rotating an image 90 degrees clockwise is shown when a specially-structured memory that can be read in units and columns is used.
In the figure, (a) is a source image, and phase 5 is a destination image. One column of 048C is read by one access, and the first word is written as shown in Phase 1. By doing so, it is possible to form a transposed matrix as shown in phase 4 by four accesses, and in phase 5, it is possible to obtain a 90-degree rotated image by exchanging each bit with the center of each row as the axis of symmetry. In this way, the speed can be increased by using a memory having a special structure in which the target bit position in the vertical direction (column direction) can be read or written at once.
However, there is a problem in that the circuit amount becomes large by constructing the memory having such a special structure. JP 62
Japanese Patent Laid-Open No. 111364 discloses an image data rotating device using such a memory having a special structure.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an image rotation method and apparatus capable of performing 90-degree image rotation at high speed using a normal memory that can read and write only in units of rows.

Means for Solving the Problems In order to achieve the above object, the number M of conversion modes is calculated according to the size of the original image, and according to the number of conversion modes, a matrix that forms the original image is used according to a predetermined formula. Select one row, convert it by a predetermined formula, return it to the original matrix, repeat this operation for the number of conversion modes to obtain the transposed matrix of the original image matrix, and rotate 90 degrees clockwise. In this case, the bit image of each row of the transposed matrix is replaced by the symmetrical position of each bit with the center of the row as the axis of symmetry, and the target image is obtained.When rotated 90 degrees counterclockwise, the transposed matrix The target image is obtained by converting the arrangement order of each row into the row of the reverse order.
In the image 90 ° clockwise rotation method of the present invention, when rotating N rows × N columns of image data by 90 °, the number M of conversion modes is M = [log ₂ N] (where [] is an integer whose internal value is an integer. Then the integer,
When the number including the decimal point or less is included, it is obtained by rounding up.), The N rows are numbered as O to N−1, and the A row and the B row are numbered for each conversion mode L (= 1 to M). ^{, a = k * 2 L ~k} * 2 L +2 L-1 -1 B = a + 2 L-1 k = O~ (N / 2 L) determined by -1, a number row and row bit sequence of B-number row A
(J), expressed in B (j), A '( j), B' (j) the A '(j) = A ( j) j = k * 2 L ~k * 2 L +2 L-1 -1 A '(j) = B ( j-2 L-1) j = k * 2 L +2 L-1 ~k * 2 L +2 L -1 B' (j) = B (j) j = k * 2 L +2 ^{L-1 to} k * 2 ^L +2 ^L- 1 B '(j) = A (j + 2 ^L-1 ) j = k * 2 ^{L to} k * 2 ^L +2 ^L-1 -1 k = O to (N / 2 ^L ) −1, A (j) is A ′ (j) and B (j) is B ′.
Converted image data is converted into (j) and L is changed from 1 to M to obtain converted image data of N rows × N columns, the bit sequence of each row of this converted image data is E (j), and F (j) = E (N−j−1), j = O to N−1, by converting the bit sequence of each row, N rows ×
It is characterized in that a 90-degree clockwise rotation image of N columns of image data is obtained. Further, in the image 90-degree counterclockwise rotation method of the present invention, when rotating the image data of N rows × N columns by 90 degrees, the number of conversion modes M is M = [log ₂ N] (where [] is the internal If the number is an integer,
When the number including the decimal point or less is included, it is obtained by rounding up.), The N rows are numbered as O to N−1, and the A row and the B row are numbered for each conversion mode L (= 1 to M). ^{, a = k * 2 L ~k} * 2 L +2 L-1 -1 B = a + 2 L-1 k = O~ (N / 2 L) determined by -1, a number row and row bit sequence of B-number row A
(J), expressed in B (j), A '( j), B' (j) the A '(j) = A ( j) j = k * 2 L ~k * 2 L +2 L-1 -1 A '(j) = B ( j-2 L-1) j = k * 2 L +2 L-1 ~k * 2 L +2 L -1 B' (j) = B (j) j = k * 2 L +2 ^{L-1 to} k * 2 ^L +2 ^L- 1 B '(j) = A (j + 2 ^L-1 ) j = k * 2 ^{L to} k * 2 ^L +2 ^L-1 -1 k = O to (N / 2 ^L ) −1, A (j) is A ′ (j) and B (j) is B ′.
(J) and by changing L from 1 to M, converted image data of N rows × N columns is obtained, the i row of this converted image data is represented by E (i, j), and E ′ (i , j) is converted into a row by E ′ (i, j) = E (N−i−1, j), i = 0 to N−1, thereby reversing the image data of N rows × N columns by 90 degrees. The feature is that a clockwise image is obtained. Further, in the image 90-degree rotation device of the present invention, the image data storage means for storing the image data and the number M of conversion modes of the image data of N rows × N columns are M = [log ₂ N] (where [] is an internal If the numerical value of is an integer,
Conversion mode calculation means for obtaining a conversion mode L (= 1 to M) by calculating by rounding up when there are numerical values below the decimal point and numbering the N rows as 0 to N-1;
Depending on the conversion mode L, the A-th row and the B-th row from the N-th row are A = k * 2 ^{L to} k * 2 ^L + 2 ^L-1 -1 B = A + 2 ^L-1 k = 0 to (N / 2 ^L ) -1 to calculate the row bit sequence A and B of row A
(J), B (j) for selecting a row, and A
(J), B (j) and A '(j), B' (j) are A '(j) = A (j) j = k * 2 ^{L to} k * 2 ^L +2 ^L-1 − 1 A '(j) = B (j-2 L-1) j = k * 2 L +2 L-1 ~k * 2 L +2 L -1 B' (j) = B (j) j = k * 2 ^L + 2 ^{L-1 to} k * 2 ^L + 2 ^L- 1 B '(j) = A (j + 2 ^L-1 ) j = k * 2 ^{L to} k * 2 ^L + 2 ^L-1 -1 k = 0 to (N / 2 ^L ) -1 to convert A (j) and B (j) of the image data into A '(j) and B' (j), respectively. Image conversion means for generating converted image data and E (j) as the row bit sequence of the converted image data, and F (j) = E (N-j-1), j = 0 to N A row bit arrangement conversion means for converting the bit arrangement of each row by -1, and the i row of the converted image data is represented by E (i, j), and E '(i, j) is represented by E (I, j) = E (N-j-1), is characterized in that a line conversion means by i = 0 to N-1 for converting line.

Operation With the above configuration, the conversion mode calculation means calculates the number M of conversion modes determined according to the size of the matrix of N rows × N columns representing the original image, and outputs the conversion mode L (= 1 to M). The row selecting means selects the Ath row and the Bth row from the matrix N rows according to the conversion mode L. The image conversion means is this A
The No. and No. B lines are converted into No. A'line and No. B'line according to the above formula, and No. A'line is at the position of No. A line.
Move to the position where there was a turn and create a new line. Converted image data is created by repeating such an operation from conversion mode L to 1 to M. This converted image data is the transposed matrix of the matrix representing the original image. The row bit sequence conversion means converts each row bit sequence of this converted image data to create a 90-degree clockwise rotated image, and the row conversion means converts the sequence order of each row of this converted image data to 90 degree counterclockwise. Create a clockwise rotated image.

Embodiment One embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

FIG. 1 is a block diagram showing an image 90-degree rotation device of the present invention. Reference numeral 1 is a CPU that controls the whole, and 2 is a main memory.
An image storage area 3 is provided with a cache memory. Four,
Reference numerals 5 and 6 are N-bit input latch circuits which input and latch row (or word) data consisting of N bits. A 2N-bit data conversion circuit 7 converts the word input to the N-bit input latch circuits 4 and 5 and outputs it as two words.
Reference numerals 8 and 9 denote N-bit output latch circuits which respectively latch the two words output from the 2N-bit data conversion circuit 7. A latch data select circuit 10 selects and outputs the data of the N-bit output latch circuits 8 and 9 according to an output data selection signal sent from the CPU 1. An N-bit exchange circuit 11 exchanges the bit arrangement of the word output from the N-bit input latch circuit 6 and outputs clockwise rotation data. A row order changing circuit 12 changes the order of rows (words) output from the N-bit input latch circuit 6 and outputs counterclockwise rotation data. 13 is an N-bit output latch circuit N
Latches the outputs of the bit conversion circuit 11 and the row order conversion circuit 12,
Output to the image storage area 3.

Next, the operation will be specifically described with reference to FIGS. 1 and 2. In Fig. 2, the source image has a matrix of 4 rows x 4 columns.
It shows a procedure of rotating the rotation once. First, the conversion mode will be described. The number M of conversion modes is M = n when the matrix size is represented by 2 ⁿ × 2 ⁿ . In the case of FIG. 2, since N = 4 and N = 2 ⁿ to n = 2, the number of modes M = 2. That is, there are two conversion modes.

The operation of the 2N (N = 4) bit data conversion circuit 7 in this conversion mode will be described.

The operation of the 2N-bit data conversion circuit 7 can be expressed as the following conversion rule for a 2N (N = 4) -bit data string corresponding to the conversion mode selection signal.

The data lines of the N-bit input latch circuit 4 are set to (0, 1,
2, 3) The data lines of the N-bit input latch circuit 5 are (4, 5,
6, 7) are numbered Conversion mode 1 Conversion mode 2 Input output Input output 0 → 0 0 → 0 1 → 4 1 → 1 2 → 2 2 → 4 3 → 6 3 → 5 4 → 1 4 → 2 5 → 5 5 → 3 6 → 3 6 → 6 7 → 7 7 → 7 In the compatible expression, conversion mode 1 (1, 4) (3, 6) is conversion mode 2 (2, 4) (3, 5).

 Next, the overall operation will be described.

The CPU 1 first selects the conversion mode 1 of the conversion mode selection signal shown in FIG. 1, reads the first word (0, 1, 2, 3) from the image storage area 3 and transfers it to the N-bit input latch circuit 4. . Second word (4, 5, 6, 7)
To the N-bit input latch circuit 5. The 2N-bit data conversion circuit 7 causes the N-bit output latch circuit 8 (0,
4, 2, 6) is output. N-bit output latch circuit 9
To (1, 5, 3, 7). The CPU 1 writes the contents (0, 4, 2, 6) of the N-bit output latch circuit 8 in the first word of the image storage area 3. The contents (1, 5, 3, 7) of the N-bit output latch circuit 9 are written in the second word of the image storage area 3. This state is ph1.

Similarly, from the image storage area 3, the third word (8,
9, A, B) are read and transferred to the N-bit input latch circuit 4. Next, the fourth word (C, D, E, F) is transferred to the N-bit input latch circuit 5. The 2N-bit data conversion circuit 7 includes an N-bit output latch circuit 8 (8, C, A,
E) is output. In addition, the N-bit output latch circuit 9 (9,
D, B, F) are output. The CPU 1 writes the contents (8, C, A, E) of the N-bit output latch circuit 8 into the third word of the image storage area 3, and the N-bit output latch circuit 9
(9, D, B, F) is written in the fourth word of the image storage area 3. This state is ph2.

Next, the CPU 1 selects the conversion mode 2 of the conversion mode selection signal of FIG. 1, reads the first word (0, 4, 2, 6) from the image storage area 3 and transfers it to the N-bit input latch circuit 4. To do. Then the third word (8, C, A, E)
To the N-bit input latch circuit 5. The 2N-bit data conversion circuit 7 causes the N-bit output latch circuit 8 (0,
4, 8, C) are output. N-bit output latch circuit 9
To (2, 6, A, E). The CPU 1 writes the contents (0, 4, 8, C) of the N-bit output latch circuit 8 in the first word of the image storage area 3. The contents (2, 6, A, E) of the N-bit output latch circuit 9 are written in the third word of the image storage area 3. This state is ph3.

Similarly, from the image storage area 3, the second word (1,
5, 3, 7) are read and transferred to the N-bit input latch circuit 4. Next, the fourth word (9, D, B, F) is transferred to the N-bit input latch circuit 5. The 2N-bit data conversion circuit 7 has the N-bit output latch circuit 8 (1, 5, 9,
D) is output. In addition, the N-bit output latch circuit 9 (3,
7, B, F) are output. The CPU 1 writes the contents (1, 5, 9, D) of the N-bit output latch circuit 8 in the second word of the image storage area 3. N-bit output latch circuit 9
(3, 7, B, F) is written in the fourth word of the image storage area 3. This state is ph4, and the matrix of ph4 thus obtained is the transposed matrix of the matrix of the source image shown in (a). From this transposed matrix, a clockwise or counterclockwise rotated image can be obtained.

 First, the clockwise rotated image will be described.

Next, the CPU 1 reads the first word (0, 4, 8, C) from the image storage area 3 and transfers it to the N-bit input latch circuit 6. The N-bit exchange circuit 11 exchanges the data (0, 4, 8, C) of the N-bit input latch circuit 6 with the LSB side and the MSB side to output (C, 8, 4, 0) as the N-bit output latch circuit 13. Transfer to. CPU1 is an N-bit output latch circuit
The contents of 13 (C, 8, 4, 0) are stored in the first area of the image storage area 3.
Write in the word.

Similarly, from the image storage area 3, the second word (1,
5, 9, D) are read and transferred to the N-bit input latch circuit 6. The N-bit exchange circuit 11 exchanges the data (1, 5, 9, D) of the N-bit input latch circuit 6 with the LSB side and the MSB side to output (D, 9, 5, 1) as the N-bit output latch circuit.
Transfer to 13. The CPU 1 writes the contents (D, 9, 5, 1) of the N-bit output latch circuit 13 in the second word of the image storage area 3.

Similarly, from the image storage area 3, the third word (2,
6, A, E) are read and transferred to the N-bit input latch circuit 6. The N-bit exchange circuit 11 exchanges the data (2, 6, A, E) of the N-bit input latch circuit 6 on the LSB side and the MSB side and outputs (E, A, 6, 2) to the N-bit output latch circuit.
Transfer to 13. The CPU 1 writes the contents (E, A, 6, 2) of the N-bit output latch circuit 13 in the third word of the image storage area 3.

Similarly, from the image storage area 3, the fourth word (3,
7, B, F) are read and transferred to the N-bit input latch circuit 6. The N-bit exchange circuit 11 exchanges the data (3, 7, B, F) of the N-bit input latch circuit 6 on the LSB side and the MSB side and outputs (F, B, 7, 3) to the N-bit output latch circuit.
Transfer to 13. The CPU 1 writes the contents (F, B, 7, 3) of the N-bit output latch circuit 13 in the fourth word of the image storage area 3. This state is ph5.

With the above operation, 90 ° clockwise rotation is possible.

 Next, the counterclockwise rotated image will be described.

The CPU 1 reads the first word (0, 4,
8, C) are read and transferred to the N-bit input latch circuit 6. The row order conversion circuit 12 sets the data row order of the N-bit input latch circuit 6 to the fourth word, and sets the N-bit output latch circuit.
The data is written in the fourth word of the image storage area 3 via 13.

Next, the CPU 1 reads the second word (1,
5, 9, D) are read and transferred to the N-bit input latch circuit 6.

The row order conversion circuit 12 sets the data row order of the N-bit input latch circuit 6 as the third word, and writes it in the third word of the image storage area 3 via the N-bit output latch circuit 13.

Similarly, the third word (2, 6, A, E) is changed to the second word.
By writing the fourth word (3, 7, B, F) to the first word, the state of ph6 is obtained.

With the above operation, it is possible to rotate 90 degrees counterclockwise.

Next, the operation of rotating the N-bit * N-word (N rows × N columns) source image 90 degrees clockwise or counterclockwise will be described.

First, the number M of conversion modes is represented by the following equation according to the size N of the matrix.

M = [log ₂ N] where [] represents the integer value when the internal numerical value is an integer, and represents the rounded up integer when the numerical value below the decimal point is included.

This is M = n when represented by N = 2 ⁿ (n is an integer), and M = n + 1 when 2 ⁿ <N <2 ^{n + 1} . That is,
The number of conversion modes M means that the NXN matrix is always treated as a matrix of size 2 ^M X2 ^M. In this embodiment, 4 rows x 4
Since column image data is taken as an example, M = 2. If the image data has 5 rows and 5 columns, N is 5, so that 2 ⁿ <N <2 ^{n + 1} is satisfied, so that 2 ² <N <2 ^{2 + 1} and M = n + 1, that is, M = 3. Therefore 2 ³ X2 ³
Will be treated as a matrix of size (8x8 matrix).

Next, regarding the words (rows) read out from the image storage area 3 and inputted to the N-bit input latch circuits 4 and 5 when the CPU 1 is in the conversion mode L (= 1 to M), the image data of FIG. explain.

In the case of the image data shown in FIG. 2, since it has 4 rows and 4 columns and M = 2 as described above, the conversion modes L are 1 to M, that is, 1 and 2. When the row number transferred to the N-bit input latch circuit 4 is A and the row number transferred to the N-bit input latch circuit 5 is B, A = k * 2 ^{L to} k * 2 ^L +2 ^L-1 -1 B = A + 2 ^{L-1 k = 0~ (N} / 2 L) can be represented by -1.

In this embodiment, N = 4 and L = 1 and 2, so L
When = 1 (conversion mode 1), k = 0 and 1 in the above equation for obtaining k. When L = 1 and k = 0, in the above formula for obtaining A and B, A = 0 and B = 1, and when k = 1, A = 2 and B = 3. That is, in the conversion mode 1, the rows transferred to the N-bit input latch circuit 4 are the 0-th row (the 1st word in FIG. 2) and the 2nd row (also the 3rd word) and the N-bit input latch circuit 5. The transferred lines are the first line (also the second word) and the third line (also the fourth word). Further, in the case of L = 2 (conversion mode 2), k = 0 in the above equation for obtaining k. In the case of L = 2 and k = 0, A = 0 and 1 and B = 2 and 3 in the above formula for obtaining A and B. That is, in the conversion mode 2, the rows transferred to the N-bit input latch circuit 4 are the 0th row (the 1st word in FIG. 2) and the 1st row.
Row (also second word), N-bit input latch circuit 5
The lines transferred to are the second line (also the third word) and the third line (also the fourth word).

Next, the data of rows A and B determined in this way are
A method of conversion by the bit conversion circuit 7 will be described.

j is a value from 0 to N−1 (in the present embodiment, N is 4, so j represents columns 0 to 3), and the j column of the A row is A
Assuming that (j) and the j column of the B row are represented as B (j), A (j) and B (j) of the pre-conversion image data of the post-conversion image data are expressed by the following formulas 1 to 4. A '(j),
Convert to B '(j). Equation 5 is an equation for obtaining k used in Equations 1 to 4.

<Formula ^{1> j = k * 2 L} ~k * 2 L +2 L-1 -1 A '(j) = A (j) < Formula ^{2> k * 2 L +2 L} -1 ~k * 2 L +2 L -1 A '(j) = B (j-2 ^L-1 ) <Formula 3> k * 2 ^L +2 ^{L-1 to} k * 2 ^L +2 ^L -1 B' (j) = B (j) <Formula 3>^{4> j = k * 2 L} ~k * 2 L +2 L-1 -1 B '(j) = A (j + 2 L-1) < formula 5> k = 0~ (N / 2 L) -1 equation 5 First, k is obtained. In the present embodiment, there are 1 and 2 in the conversion modes L, but the case of L = 1 (conversion mode 1) will be described first. Since N = 4, according to Equation 5, k = 0 and 1.

According to Equation 1, j = 0 when k = 0 and j = when k = 1
It becomes 2. Therefore, the value of the 0th column of the A row (the 0th row, the 2nd row) becomes the value of the 0th column of the A'row (the 0th row, the 2nd row) and the value of the A row (the 0th row, the 2nd row) The value of the second column is the value of the second column of the A'row (0th row, 2nd row).

From Equation 2, j = 1 when k = 0 and j = when k = 1
It becomes 3. B (j-2 ^L-1 ) becomes B (0) when j = 1,
When j = 3, it becomes B (2). Therefore, row B (first row,
The value of the 0th column of the 3rd row) is the value of the 1st column of the A'row (the 0th row, the 2nd row), and the value of the 2nd column of the B row (the 1st row, the 3rd row) is the A'row ( It is a value in the third column (0th row, 2nd row).

From Equation 3, j = 1 when k = 0 and j = when k = 1
It becomes 3. Therefore, the value of the 1st column of the B row (1st row, 3rd row) becomes the value of the 1st column of the B'row (1st row, 3rd row), and the value of 1st column of the B row (1st row, 3rd row) The value of the third column is the value of the third column of the B'row (first row, third row).

From Equation 4, j = 0 when k = 0 and j = when k = 1
It becomes 2. A (j + 2 ^L-1 ) becomes A (1) when j = 0,
When j = 2, it becomes A (3). Therefore, line A (line 0,
The value of the 1st column of the 2nd row) is the value of the 0th column of the B'row (the 1st row, the 3rd row), and the value of the 3rd column of the A row (the 0th row, the 2nd row) is the B'row ( It is a value in the second column (first row, third row).

By the processing of the conversion mode 1 described above, the source image of FIG. 2A is converted into the image of ph2 of FIG.

Next, the process of L = 2 (conversion mode 2) is started. N = 4
Therefore, according to the equation 5, k = 0.

From Equation 1, j = 0 and 1. Therefore, row A (0
The value of the 0th column in the 1st row is the A'row (the 0th row, the 1st row)
The value of the 1st column of the A row (the 0th row, the 1st row) is set as the value of the 1st column of the A ′ row (the 0th row, the 1st row).

From Equation 2, j = 2 and 3. B (j-2 ^L-1 ) is B (0) when j = 2 and B (1) when j = 3. Therefore, the value in the 0th column of row B (second row, third row) is A ′.
The value in the second column of the row (0th row, 1st row) is added to the B row (2nd row, 3rd row)
The value of the 1st column of the (row) is set as the value of the 3rd column of the A ′ row (0th row, 1st row).

From Equation 3, j = 2 and 3. Therefore, row B (2
The value of the 2nd column in the 3rd row) is the B'row (2nd row, 3rd row)
The value of the third column of the B row (second row, third row) is set as the value of the third column of the B ′ row (second row, third row) in the value of the second column.

From Equation 4, j = 0 and 1. A (j + 2 ^L-1 ) is A (2) when j = 0 and A (3) when j = 1. Therefore, the value in the second column of row A (row 0, row 1) is B '.
The value of column 0 of the row (2nd row, 3rd row) is set to the A row (0th row, 1st row)
The value of the 3rd column of the (row) is set as the value of the 1st column of the B ′ row (the 2nd row, the 3rd row).

As a result of the conversion mode 2 processing described above, FIG.
The ph2 image is converted to the ph4 image.

The conversion according to Expressions 1 to 5 is repeated M times for the number of conversion modes (M = 2 in this embodiment). Thus, the transposed matrix of the source image is obtained, the converted row data is latched in the N-bit output latch circuits 8 and 9, and the converted row data is transferred to the A row of the image storage area 3 by the latch data select circuit 10. , Line B.

Further, the operation of converting the ph4 image in FIG. 2B to obtain an image in which the source image is rotated 90 degrees clockwise will be described.

From the image storage area 3 to the ph4
The image is read out line by line and latched. The read row is represented as E row (j column), and the N-bit conversion circuit 11 converts it to E ′ row (j column) by the following equation. E is 0th row to N-1th row, j is 0th column to N-1th row, and E = j in this embodiment.
= 0 to 3.

E ′ (j) = E (N−j−1) E ′ = E = 0 to N−1 j = 0 to N−1 According to this formula, in the present embodiment, E row (0
The value of the 3rd column (from the 3rd row to the 3rd row) is the value of the 0th column of the E ′ row (the 0th to the 3rd row), and similarly, the value of the 2nd column is the value of the 1st column. Let the values be the values in the second column and the values in the zero column be the values in the third column.

In this way, the image of ph4 in FIG. 2 (b) is converted into the image of ph5, and an image obtained by rotating the source image of N rows and XN columns by 90 degrees clockwise is obtained.

The operation of converting the image of ph4 in FIG. 2B to obtain an image in which the source image is rotated 90 degrees counterclockwise will be described.

From the image storage area 3 to the ph4
The image is read out line by line and latched. The read row is represented as E row (j column), and the row reordering circuit 12 converts it to F row (j column) by the following equation. E = 0 to N-1
Rows, F is N-1 to 0 rows, j is 0 to N-1 columns, and in this embodiment, E = j = 0 to 3 and F = 3 to 0.

F (j) = E (j) E = 0 to N−1 F = N−1 to 0 j = 0 to N−1 According to this expression, in the present embodiment, the E row (0
The values of columns 0 to 3 of the (row) are set to the values of columns 0 to 3 of the F row (third row), and the values of columns 0 to 3 of the E row (first row) are set to the row F (2 row). The values in columns 0 to 3 of the E-th row, the values in columns 0 to 3 in the E row (second row) into the values in columns 0 to 3 in the F row (first row), and the E row (3 rows). The values in the 0th column to the 3rd column of the eye are set to the values in the 0th column to the 3rd column of the F row (the 0th row).

In this way, the image of ph4 in FIG. 2B is converted into the image of ph6, and an image obtained by rotating the source image of N rows and XN columns counterclockwise by 90 degrees is obtained.

The image obtained by rotating the source image 90 degrees clockwise or the image rotated 90 degrees counterclockwise is latched by the N-bit output latch circuit 13 and then written in the image storage area 3.

EFFECTS OF THE INVENTION As is clear from the above description, according to the present invention, the number of conversion modes is determined according to the size of the original image, and two rows are formed from a matrix forming the original image according to a predetermined formula according to the number of conversion modes. After selecting it, converting it by a predetermined formula and returning it to the original matrix, repeating this operation for the number of conversion modes, we obtain the transposed matrix, and by changing the bit arrangement order of each row of this matrix, 90 degrees A clockwise rotated image can be obtained, and a 90 ° counterclockwise rotated image can be obtained by changing the order of each row of the transposed matrix. Therefore, a 90 ° rotated image can be obtained at high speed with a normal memory configuration. .

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention, FIG. 2 is a diagram showing an embodiment when the present invention is applied to an image of 4 rows × 4 columns, and FIG. 3 is a conventional method. FIG. 4 is an explanatory diagram of a procedure for obtaining a 90 ° rotated image, and FIG. 4 is an explanatory diagram for obtaining a 90 ° rotated image using a memory having a special structure. 1 ... CPU, 2 ... main memory, 3 ... image storage area, 4, 5, 6
... N-bit input latch circuit, 7 ... 2 N-bit data exchange circuit, 8,9 ... N-bit output latch circuit, 10 ... Latch data select circuit, 11 ... N-bit exchange circuit, 12 ...
… Row order change circuit, 13 …… N-bit output latch circuit.

Claims (3)

(57) [Claims] 1. When rotating N rows × N columns of image data by 90 degrees, the number M of conversion modes is M = [log ₂ N] (where [] is the integer when the internal numerical value is an integer,
When the number including the decimal point or less is included, it is obtained by rounding up.), The N rows are numbered as O to N−1, and the A row and the B row are numbered for each conversion mode L (= 1 to M). ^{, a = k * 2 L ~k} * 2 L +2 L-1 -1 B = a + 2 L-1 k = O~ (N / 2 L) determined by -1, a number row and row bit sequence of B-number row A
(J), expressed in B (j), A '( j), B' (j) the A '(j) = A ( j) j = k * 2 L ~k * 2 L +2 L-1 -1 A '(j) = B ( j-2 L-1) j = k * 2 L +2 L-1 ~k * 2 L +2 L -1 B' (j) = B (j) j = k * 2 L +2 ^{L-1 to} k * 2 ^L +2 ^L- 1 B '(j) = A (j + 2 ^L-1 ) j = k * 2 ^{L to} k * 2 ^L +2 ^L-1 -1 k = O to (N / 2 ^L ) −1, A (j) is A ′ (j) and B (j) is B ′.
Converted image data is converted into (j) and L is changed from 1 to M to obtain converted image data of N rows × N columns, the bit sequence of each row of this converted image data is E (j), and F (j) = E (N−j−1), j = O to N−1, by converting the bit sequence of each row, N rows ×
An image 90-degree rotation method characterized by obtaining a 90-degree clockwise rotation image of N columns of image data. 2. When rotating N rows × N columns of image data by 90 degrees, the number of conversion modes M is M = [log ₂ N] (where [] is the integer when the internal numerical value is an integer,
When the number including the decimal point or less is included, it is obtained by rounding up.), The N rows are numbered as O to N−1, and the A row and the B row are numbered for each conversion mode L (= 1 to M). ^{, a = k * 2 L ~k} * 2 L +2 L-1 -1 B = a + 2 L-1 k = O~ (N / 2 L) determined by -1, a number row and row bit sequence of B-number row A
(J), expressed in B (j), A '( j), B' (j) the A '(j) = A ( j) j = k * 2 L ~k * 2 L +2 L-1 -1 A '(j) = B ( j-2 L-1) j = k * 2 L +2 L-1 ~k * 2 L +2 L -1 B' (j) = B (j) j = k * 2 L +2 ^{L-1 to} k * 2 ^L +2 ^L- 1 B '(j) = A (j + 2 ^L-1 ) j = k * 2 ^{L to} k * 2 ^L +2 ^L-1 -1 k = O to (N / 2 ^L ) −1, A (j) is A ′ (j) and B (j) is B ′.
(J) and by changing L from 1 to M, converted image data of N rows × N columns is obtained, the i row of this converted image data is represented by E (i, j), and E ′ (i , j) is converted into a row by E ′ (i, j) = E (N−i−1, j), i = 0 to N−1, thereby reversing the image data of N rows × N columns by 90 degrees. A 90-degree image rotation method characterized by obtaining a clockwise rotation image. 3. An image data storage means for storing image data, and a conversion mode number M of N rows × N columns of image data is M = [log ₂ N] (where [] is an integer when an internal value is an integer. That integer
Conversion mode calculation means for obtaining a conversion mode L (= 1 to M) by calculating by rounding up when there are numerical values below the decimal point and numbering the N rows as 0 to N-1;
Depending on the conversion mode L, the A-th row and the B-th row from the N-th row are A = k * 2 ^{L to} k * 2 ^L + 2 ^L-1 -1 B = A + 2 ^L-1 k = 0 to (N / 2 ^L ) -1 to calculate the row bit sequence A and B of row A
(J), B (j) for selecting a row, and A
(J), B (j) and A '(j), B' (j) are A '(j) = A (j) j = k * 2 ^{L to} k * 2 ^L +2 ^L-1 − 1 A '(j) = B (j-2 L-1) j = k * 2 L +2 L-1 ~k * 2 L +2 L -1 B' (j) = B (j) j = k * 2 ^L + 2 ^{L-1 to} k * 2 ^L + 2 ^L- 1 B '(j) = A (j + 2 ^L-1 ) j = k * 2 ^{L to} k * 2 ^L + 2 ^L-1 -1 k = 0 to (N / 2 ^L ) -1 to convert A (j) and B (j) of the image data into A '(j) and B' (j), respectively. Image conversion means for generating converted image data and E (j) as the row bit sequence of the converted image data, and F (j) = E (N-j-1), j = 0 to N A row bit arrangement conversion means for converting the bit arrangement of each row by -1, and the i row of the converted image data is represented by E (i, j), and E '(i, j) is represented by E (I, j) = E (N-j-1), i = image 90 degree rotation device characterized by comprising by 0 to N-1 and row conversion means for converting line.